通信原理仿真实验报告

1、舒缓/了科技/冬通信原理仿真实验报告学 院通信工程学院班级 1401014班分 组 参数 姓名 目的：(1)熟悉()通信系统的工作原理、电路组成和信息传输特点；(2)熟悉上述通信系统的设计方法与参数选择原则；(3)掌握使用参数化图符模块构建通信系统模型的设计方法；(4)熟悉各信号时域波形特点；(5)熟悉各信号频域的功率谱特点。实验内容一：(1)使用m序列为数字系统输入调试信号，采用正弦载波，码速率及载波 频率参见附表；(2)采用模拟调制或数字检控实现2PSKM制；(3)通过相干解调完成2PSKW调，恢复初始m序列；(4)从时域观测各信号点波形，获得接收端信号眼图；(5)观测各信号功率谱；(6)

2、完成串并及并用转换模块设计；实验内容二：(7)通过不少于三个频率正弦信号叠加而成的模拟信号作为系统真实输入 信号，并采用PCM编码方法实现数模转换；(8)模拟输入信号转换形成的数字信号通过 2PSKS制解调系统实现数字频带传输;(9)通过PCM解码恢复初始模拟信号;(10)从时域重点观测模拟信号点波形；(11)从频域重点观察模拟信号功率谱。万案：通信模拟信号的数字传输通信系统的组成框图如图1所示。系统输入的模拟随机信号m(t),经过该通信系统后要较好地得到恢复。附5%地)模拟随机信号 数字前机序列 数字防机序列 模拟船帆信号推荐方案:推荐的模拟信号数字频带传输通信系统的组成框图如图2所示。通过

3、PCM 方式完成数模与模数变换，采用 2/BPSK调制方式完成基本数字频带传输。在2PSK中，通常用初始相位0和 分别表示二进制“ 1”和“0”。因止匕,2PSK信号的时域表达式为：力PSK”)= A 85(0+ 外)_ 0,发送口0”时外二不发送T时, j Acos线几概率为尸%区"二Acossj概率为1 尸即发送二进制符号“1”时（anW+1）, e2PSK取0相位；发送二进制符号“ 0”时（an取-1） , e2PSK取 相位（也可以反之）。这种以载波的不同相位直接去表示相应二进制数字信号的调制方式，称为二进制（绝对）相移方式。已调信号e2PSK（t）典型波形如下图。10 0

4、1 12PSKB号的调制器原理方框图模拟调制的方法:双极性2PSK信号的解调器（想干解调）原理方框图和波形图:.资料.2PSK仿真结果及分析电路图：时域波形:输入信号:库'Slide 30Tim七 in SecQiidE与载波相乘后的波形:经过带通滤波器后的波形:经过低通滤波器后的波形:眼图:输出波形:® wit Sink 21回-功率谱图:经带通滤波器后的信号:经低通滤波器后的信号:输出信号带通幅频特性曲线:低通幅频特性曲线图符参数设置表:编号名称参数0Source: PN SeqAmp = 1vOffset = 0 vRate = 14e+3 HzLevels = 2Ph

5、ase = 0 degMax Rate = 700e+3 Hz32Multiplier: Non ParametricInputs from t0p0 t26p0Outputs to 6 28Max Rate = 700e+3 Hz26Source: SinusoidAmp = 1vFreq = 56e+3 HzPhase = 0 degOutput 0 = Sine t32Output 1 = CosineMax Rate (Port 0)= 700e+3 Hz6Adder:Non ParametricInputs from t32p0 t5p0Outputs to 7Max Rate =

6、700e+3 Hz5Source:Gauss NoiseStd Dev = 100e-3 vMean = 0 vMax Rate = 700e+3 Hz7Operator:Linear SysButterworth Bandpass IIR2 PolesLow Fc = 42e+3 HzHi Fc = 70e+3 HzQuant Bits = NoneInit Cndtn = TransientDSP Mode DisabledMax Rate = 700e+3 Hz8Multiplier:Non ParametricInputs from t7p0 t27p0Outputs to 10Max

7、 Rate = 700e+3 Hz27Source:SinusoidAmp = 1vFreq = 56e+3 HzPhase = 0 degOutput 0 = Sine t8Output 1 = CosineMax Rate (Port 0)= 700e+3 Hz10Operator:Linear SysButterworth Lowpass IIR3 PolesFc = 14e+3 HzQuant Bits = NoneInit Cndtn = TransientDSP Mode DisabledMax Rate = 700e+3 Hz11Operator:CompareCompariso

8、n ='>='True Output = 1 vFalse Output = 0 vA Input = t10 Output 0B Input = t33 Output 0Max Rate = 700e+3 Hz33Source: SinusoidAmp = 0 vFreq = 56e+3 HzPhase = 0 degOutput 0 = Sine t11Output 1 = CosineMax Rate (Port 0)= 700e+3 Hz12Operator:SamplerInterpolatingRate = 700e+3 HzAperture = 0 secA

9、perture Jitter = 0 secMax Rate = 700e+3 Hz13Operator:HoldLast ValueGain = 1Out Rate = 700e+3 HzMax Rate = 700e+3 HzPCM仿真结果及分析:电路图:用并lh Hj fiF - 阳阳卜o|-m!+aLiv erLay1J卬L Fow er 5：11pectnun o£ <三:ink signalitdBm 50 ohiri!11V-r.c一-*F II U_mn JU i54+325( FrH3equency in ;心(dr -盟,194 Hz)图符参数设置:编号名称

10、参数0Source: SinusoidAmp =1vFreq = 1e+3 HzPhase = 0 degOutput 0 = Sine t3Output 1 = CosineMax Rate (Port 0)= 1.3e+6 Hz1Source: SinusoidAmp =1vFreq = 500 HzPhase = 0 degOutput 0 = Sine t3Output 1 = CosineMax Rate (Port 0)= 1.3e+6 Hz2Source: SinusoidAmp = 2 vFreq = 800 HzPhase = 0 degOutput 0 = Sine t3O

11、utput 1 = CosineMax Rate (Port 0)= 1.3e+6 Hz3Adder: NonParametricInputs from t0p0 t1p0 t2p0Outputs to 4 6Max Rate = 1.3e+6 Hz6Comm:CompanderA-LawMax Input =±5Max Rate = 1.3e+6 Hz8Logic:ADCTwo's ComplementGate Delay = 0 secThreshold = 500e-3 vTrue Output = 1 vFalse Output = 0 vNo. Bits = 8Mi

12、n Input = -5 vMax Input = 5 vRise Time = 0 secAnalog = t6 Output 0Clock = t14 Output 014Source:Pulse TrainAmp =1vFreq = 3.25e+3 HzPulseW = 62.5e-6 secOffset = -500e-3 vPhase = 0 degMax Rate = 1.3e+6 Hz1623Operator:SamplerInterpolatingRate = 32.5e+3 HzAperture = 0 secAperture Jitter = 0 secMax Rate =

13、 32.5e+3 Hz41Comm: TD MuxNo. Inputs = 8Time per Input = 308e-6 secTime Slot 0 = t32 Output 0Time Slot 1 = t33 Output 0Time Slot 2 = t34 Output 0Time Slot 3 = t35 Output 0Time Slot 4 = t36 Output 0Time Slot 5 = t37 Output 0Time Slot 6 = t38 Output 0Time Slot 7 = t39 Output 0Max Rate = 260e+3 Hz43Oper

14、ator:HoldLast ValueGain = 1Out Rate = 1.3e+6 HzMax Rate = 1.3e+6 Hz45Comm: TD DeMuxNo. Outputs = 8Time per Output = 308e-6 secOutput 0 = Time Slot 0t9Output 1 = Time Slot 1t9Output 2 = Time Slot 2t9Output 3 = Time Slot 3t9Output 4 = Time Slot 4t9Output 5 = Time Slot 5t9Output 6 = Time Slot 6t9Output 7 = Time Slot 7t9Max Rate (Port 0)= 162.5e+3Hz9Logic: DACTwo's ComplementGate Delay = 0 secThreshold = 500e-3 vNo. Bits = 8Min Output = -5 vMax Output = 5 vD-0 = t45 Output 0D-1 = t45 Output