24秒倒计时电路的设计

《电子线路CAD》课程论文题目：24秒倒计时电路的设计

1电路功能和性能指标采用计数器74LS192作为核心部分。同时选择74LS48作为BCD码译码器来对7段数码显示管进行译码驱动，两个七段数码显示管进行显示。采用555计时器制成的多谐振荡器，进行秒脉冲的输入。因为我们需要对其进行暂停、清零、报警等控制，所以我们使用了两个开关来控制计数器的各功能的实现，从而实现各种功能.2原理图设计*叵卜日幽024秒倒计时电路PRJPCB曰口SourceDocumentsL3*叵卜日幽024秒倒计时电路PRJPCB曰口SourceDocumentsL3Sheetl.SchDoc日口Libraries曰口SchematicLibraryDocum争秒倒计时电路ZCHL旧皆GNDMDATE+——DATEUJVCCUSB母头LogicalrarameTqDisplayNameDesignatorElectricalTypeDescriptionPartNumberSymbolsInsideNoSymbolNoSymbolInsideEdgeNoSymbolOutsideEdgeOutsideVHDLParametersDisplayNameDesignatorElectricalTypeDescriptionPartNumberSymbolsInsideNoSymbolNoSymbolInsideEdgeNoSymbolOutsideEdgeOutsideVHDLParametersDefaultValuePartFormalTypeUriiqueIdRightLeftSignalFlowSwappingOptions该元器件制作简单，从工具栏放置了三种基本结构并对格式稍作修改就完成了.2.2原理图设计①新建一个项目，并保存为“24秒倒计时电路.PRJPCB”，然后新建一个原理图文件,保存为“24秒倒计时.SCHDOC”，绘图坏境已设置好.②原理图绘制如下图:Workspacel.DsnWrk▼Workspace珥秒倒计时电路PEProject@FileViewOstructureEditor国叵日日应24秒倒计时电路PRJPCB日口SourceDocumerits］为秒倒计时电路SCHDCK；皆日OLibra.ries□LJSchematicLibraryDocurrQ24秒倒计时电路.SCHLIBVCC8济苗ss-gm器蠢EQl苗smcpDODl捋嚣③原理图编译⑴编译参数设置，如下图:OptionsforPCBProject24秒倒计时电路.PRJPCBErrorReportinConnectionMaClassGeneratComparatECOGeneratiOptioniMulti-ChanmDefaultPrin1SearchPatParamet(ViolationTypeDescription|ReportModeErrorsinComponentMedelParametersExtrapinfoundincomponentdisplaymodeMismatchedhiddenpinconnectionsMismatchedpinvisibilityMissingComponentModelParametersMissingCompenentModels：MissingComponentModelsinModelFilesMissingpinfoundincomponentdisplaymodeModelsFoundinDifferentModelLocationsSheetSymbolwithduplicateentriesUn-DesignatedpartsrequiringannotationUnusedsub-partincomponeni：白Errort_|Warning菖ErrorL^lErrorLslErrorl~~lWarningC3Errort_|Warningl~~lWarningC3Errort_|Warningl~~lWarningViolationsAssociatedwithDocumentsConflictingConstraintsDuplicatesheetnumbersDuplicateSheetSymbolNamesMissingchildsheetforsheetsymbolMissingConfigurationTargetMissingsub-F'rojectsheetforcomponentMultipleConfigurationTargetsMultipleTop-LevelDocumentsPortnotlinkedtoparentsheetsymbolSheetEntrynotlinkedtochildsheetUniqueIdentifiersErrorsViolationsAssociatedwithNetsAddinghiddennettosheetAddingItemsfromhiddennettonetAuto-AssignedPortsToDevicePinsDuplicateNetsFloatingnetlabelsFloatingpowerobjectsGlobalF'o'Aier-0bjectscopechangesNetParamelerswithnonameNetParameterswithnovalueNetscontainingfloatinginputpinsmiiIHhIpsimilarchiaZeForarrrorrorrorarrrorrorrorrorarrErwErErErwErErErErw「_1_1_1_1_1_1_1「,_|Warningl~~lWarning,_IWarningLslErrorl~~lWarning,_IWarning,_|Warningl~~lWarningt_|Warning菖ErrorIFrrrirFatalErrorErrorWarningNoReportErrorReportiiConnectionMatiClassGeneratComparatECOGeneratiOptioruMulti-ChanmDefaultPrin-SearchPatParamettSetToDefaults□□□□□□□□□□□□□□□□□B一d=ect_ona-ShWEng□□□□□□□□□□□□□□□mpnshs-Enw□□□□□□□□□□□□□Unspec富dpolt■oiport口口□□□□口□口口n□□B3Q3B33p。巨e-p_n□□□国口质田口OpenEmMp-n□□gaaagHNP_nJJ□□□□P8S8Sp-n曰口口口JOpenco=ectorp-ni-1-口0导云p_n口口□-op_n口□一npu-p_n口■3□□InputPinIOPinOutputPinOpenCollectorPinPassivePinHiZPinOpenEmitterPinPow«PinInputPortOutputPortBidirectionalPortUnspecifiedPortInputSheetEntryOutputSheetEntryBidirectionalSheetEntryUnspecifiedSheetEntiyUnconnectedSetToDefaults)ptionsforPCBProject电路.PRJPCBErrorReportirConnectionM&ClassGeneratComparatECOGeneratOptionsMulti-ChanrnDefaultPritrSearchPatParamet(OutputPath:C:\UsersV^dministrator\Desktop\^|f建文件夹'ProjectOutputsfor2曲倒计时电路OutputOptions|^Tirnestampfolder|^Use|^Tirnestampfolder|^Useseparatefolderforeachoutputtype|~~rchgeprojectdocumentNetlistOptionsI[AllowNetlistOptionsI[AllowPortstoNameNetsF/]aIIowSheetEntriestoNameNetsIAppendSheetNumberstoLocalNetsNetIdentifierScope.Automatic(Basedonprajectcontents]OKSetToDefaults⑵项目编译OK打开"Messages”工作面板，报告提示全部为“Warning”，没有“Error”故可以忽略，如下图.ClassDocumentSou...MessageTimeDateN..A□[Warn...华秒倒计时...Co...OffgridPin-5at230.6111432:582017/4/...6r□[Warn...24秒倒计时...Co...OffgridPin-6at230,6011432:582017/V..7p为□[Warn...羽秒倒计时...Co...OffgridPin-7at230,5911432:582017/<..8□[Warn...农秒倒计时...Co...OffgridPin-8at230,5811432:582017W...9□[Warn...承秒倒计时...Co...OffgridPin-9at6^10,5891432:582017/V-10耳rNL□[Warn...叫秒倒计时...Co...OffgridPin-10at6^0,5991432:582017/V..11^4□[Warn...州秒倒计时...Co...OffgridPin-11at6^0,6091432:582017/V..12□[Warn...日秒倒计时...Co...OffgridPin-12at6^10,61914:32:58257/4/...13□[Warn...农秒倒计时...Co...OffgridPin-13at6^10,62914:32:582017/V-14□[Warn...华秒倒计时…Co...OffgridPin-1^at6^10.6391432:582017/4/...15RP□[Warn...叫秒倒计时...Co...OffgridPin-15at6^10,6^91432:582017/V..16JQ□[Warn...羽秒倒计时...Co...OffgridPin-16at6^0,6591432:582017/V..17□[Warn...农秒倒计时...Co...Offgridait250,4411432:582017W...18□[Warn...农秒倒计时...Co...OffgridPin-1at230,52114:32:582017/V-19rNI□[Warn...华秒倒计时…Co...OffgridPin-2at230.5111432:582017/4/...20.■SL匚1[Warn...州秒倒计时...Co...OffgridPin-3at230,5011432:582017/V..21口[Warn...羽秒倒计时...Co...OffgridPin-^lat230^911432:582017/<..22匚1[Warn...农秒倒计时...Co...OffgridPin-5at230J811432:582017W...23□[Warn...承秒倒计时...Co...OffgridPin-6at230^711432:582017/V-2A□[Warn...叫秒倒计时...Co...OffgridPin-7at230^611432:582017/V..25匚1[Warn...州秒倒计时...Co...OffgridPin-8at230^511432:582017/V..26F口[Warn...日秒倒计时...Co...Offgrid或560,43114:32:582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④项目元器件库的生成在原理图文件界面，在上面“Design”选项中点击“MakeSchematicLibrary”然后在弹出窗口确定，就生成当前原理图元器件库.日财24秒倒计时电路PRJPCB日财24秒倒计时电路PRJPCB日7SourceDocuments324秒倒计时电路.SCHDOC日口Libraries□匚SchematicLibraryDocum合24秒倒计时电路.SCHLIBV日口Gener8.tedSLUNetlistFiles司24秒倒计时电路NET324秒倒计时电路_1.SCHLI皆Components/|DescriptionQ|LEDNE5532NPN9013RES0Res2ResistorUE旧骨头fl拷涯74LS161Aliases2.3原理图报表Model2.3原理图报表Model/TypeDescription0DI...Footpr...0S...Footpr...AddDeleteEditAddDeleteEditPinsNameType|DIP16s...71CR-Passi...11成CPPassi...22DOPassi...33DIPassi...A47D2Passi...55D3Passi...66T7CTpPassi...71178GNDPassi...88AddDeleteEdit①网络表的生成在原理图界面，执行“Design一NetlistForProject一Protel”菜单命令，系统自动生成Protel网络表，网络表主要包含两个重要信息，一是元器件信息，由一对方括号括起来:二是元器件的电气连接，即属于同一个网络的引脚有哪些，由一对圆括号括起来，网络表文件可以显示为一个文本文件,部分图如下：♦Home其24秒倒计时电路.SCHLIBQ24秒倒计时电路.SCHDOC@24秒倒iffHome琶24秒倒计时电路.SCHLIB324秒倒计时电路一SCHDOC同2熨隹1苴]VCC[IC1-14IClIC2-16DIP14IC3-165IC2IC4-16TC5-16Kl-1K2-2R2-1R3-2DIP16R4-174LS48R5-1R6-1R7-1R16-2]R18-1[R19-1ICSR20-1DIP16R21-174LS192R22-2R31-2Tl-1Ul-4]Ul-8IC4)DIP16Net*l174LS48^1-1一Ul-5]NetDl1IC5Dl-1DIP16R2-274LS192D2-1]R16-1JIUSBNetICl1USB母头ICl-1<IC2-6IC3-7

⑴元器件信息:例如，第一对方括号内的内容表示元器件IC1的相关信息，即名称为IC1，封装形式为DIP14，描述为74LS00.⑵电气连接:第一对圆括号内的内容表示网络名称为VCC,和该网络相连接得引脚有23个,IC1的14脚,IC2的16脚,IC3的16脚……不——列举了.②简易元器件清单报表在“Reports^下拉菜单中选择点击“SimpleBOM”，系统会生成简易材料清单报表,保持默认设置时，生成2个报表文件,分别为“24秒倒计时电路.BOM”和“24秒倒计时电路.CSV”.Workspace1.DsnWrk▼Workspace"秒倒计时电路PR』Project©FileViewOstructureEditor国恒Workspace1.DsnWrk▼Workspace"秒倒计时电路PR』Project©FileViewOstructureEditor国恒B日虹24秒倒计时电K.PRJPCB*D日□SourceDocuments324秒倒计时电路.SCHDOC粤日口LibrariesB菖SchematicLibraryDocum合24秒倒计时电路.SCHLIBrur毯24秒倒计时电路J.SCHLI登日口Generated□L^NetlistFiles司24秒倒计时电路.NETiSfiiTextDocuments夺Home甥24秒倒计时电路一SCHL旧芸24秒倒计时电路一SCHDOC耐24秒倒计时电路一NET盅24秒倒计时电路_1.SCHLIB日24秒倒计时电路一BOM024秒倒计时电路CSV-"BillofMaterialfor24^®VpM!^J^TpRJPCB""On2017/4/21at15:20:39"Comment","Pattern","Quantity","Components""1.5k","AXIAL-0.4","1","Rl€n,"Resistor""103"r"无极性电"极性电容"，"1","Cl",""位薮码管七"工位数码管","2LED1,LED2",""n20k","AXIAL-0.4","I"r"R22","Resistor"”3.7k”，"AXIAL-0.4","l”,"R8","Re3istor""AXiaL-O.4"Rl","Resistor""62k","1","R23","Resistor""V^SOO",,,DIP14","I","ICl",,,n"74LS192","DIP16","2n,"IC3,IC5",nn,,74LS48n,"DIPIG",n2nr"IC2,IC4",,'9013,,,"901#,\"I","QI",""“LED","LED","2“，"DI,D2","""NE555","DIPS","I","Ul","""RES","AXIAL-0.4","I"r"R2","""Res2","AXIAL-0.4","25","R3,R4,R5,R6,R7rR9,R10rRll,R12,R13,R14,R15,R"USB每头七"USB","F,"JI",,,n"按键"/按键"KS","""蜂鸣暮"蜂晦器L"l"r"H"f"开关”，”开关"，"3”，"KI,K2,K4”，””17,R18,RL9rR20,R21,R24,R25,R26,R27,R28,R29,R30,R31",nRe在“Tools”下拉菜单点击“NewComponent”开始元器件封装,步骤如下图:workspaceI.usnwrK24秒倒计时电路FRJI§>FileViewOstructureEditor9/1S.hrtil；±D4l±>o<?CSC，BLibraryvlask□MaskComponentPrimitives24秒倒计时电路PRJI9/1J.hrt；il；±D4c±ii>5?QOkjl*CBLibraryMaskComponentsComponentPrimitives_jPcbLib1.PcbLibiPcbLibl.PcbLib□fiTextDocuments13日口SchematicLibraryDoc邑24秒倒计时电路.SCHL合诳秒倒计时电路j.sciUPcbLibl.PcbLib&日MLibraries□LJPCBLibraryDocumen-EILdLibrariesElli-JPCBLibraryDocui©FileViewOstructureEditor日=Generated曰gNmtlistFiles司24秒倒计时电路NET日虹24秒倒计时电路PRJPCB曰LJSourceDocuments二24秒倒计时电路.SCHDC日或24秒倒计时电路PRJPCB曰=SourceDocuments324秒倒计时电路SCHDC1□Libraries曰勺PCBLibraryDocumerr□Generated曰归NetlistFiles同24秒倒计时电路.NETElTextDocumentsa曰=SchematicLibraryDoc忿24秒倒计时电路SCHL蓉品秒倒计时电路j.sci/ApplyXzClearQMagnify^SelectHZoomZomponentsMarinePadsPrimitivesf:CBCOfv1PONENn|vApplyX，ClearMagnifyOMaskT£24秒倒计时电路PRJPCB

曰□SourceDocumentslJ24秒倒计时电路SCHDCE1LJSchematicLibraryDoc存24秒倒计时电路SCHL合24秒倒计时电路_1.SC曰UGeneratedIlJNetlistFiles0]24秒侧计时电路.NETLJTextDocumentsBLibrarydask*1-/ApplyXzClearQMagnifyZlMaskQSelectEtoomomponentsamePadsPrimitives)IP4o0:CBC0MP0NEN100omponentPrimitivesype:NameX-SizeY-SizeLayerSpecifythepaddimensionsISpecifythenumberofpadsforthecomponentm画24秒倒计时电路PRJPCBSi_lSourceDocumentsJ24秒倒计时电路.SCHDC日MLibraries曰=PCBLibraryDocumerrSelectavalueforthetotalnumerofpads.□PcbLibl.PcbLib*省日!_□TextDocuments•••••日lidSchematicLibraryDoc合24秒倒计时电路SCHL在用秒倒计时电路」5日!_□TextDocuments•••••日MN顷listFiles司24秒倒计时电路NET■Libraryask、'<BackNext>Cancel/ApplyX1^ClearMagnify]Mask0Select0ZoomDmponentsame|PadsIFMJoPrimitivesJoCBC0MP0NEN10DmponentPrimitivesjpeName/|X-Size|Y-SizeLayer3.2PCB设计①新建一个PCB文件，并保存为“24秒倒计时电路.PCBDOC”,物理边界，绘图••••••••••环境已设置好,PCB图如下:O河一君w三嚣••oee••••••••••••环境已设置好,PCB图如下:O河一君w三嚣••oee••②生成该项目封装库在PCB工作界面,在上面“Design”下拉菜单中选择点击“MakePCBLibrary"，然后在弹出窗口确定，就生成当前元器件封装库，截图如下：

PCBLibrary面具*清除QBfc^元件的图元类型岳称刁XSizev—SizePCBLibrary面具*清除QBfc^元件的图元类型岳称刁XSizev—SizeArc10milTrack10milTrack10milTrack10milTrack10milTrack10mil构k10milTrack10mil③目录结层TopOverlcTopOverlcTopOverlcTopOverlcTopOverlcTopOverlcTopOverlcTopOverlc/eric/prls.①补滴泪操作执行“Tools一Teardrops，菜单命令，打开泪滴设置对话框，这里采用默认设置，补滴泪后PCB截图如下:

ooooOSoqSLED2OOOOO-EDIOOOOOooo0—rL-oO?丁。OooooOSoqSLED2OOOOO-EDIOOOOOooo0—rL-oO?丁。O-J_^~FOO_L〒。OO_L~TOo?，-r・.②放置敷铜为PCB的顶层和底层放置电源地网络敷铜，已顶层为例，将PCB工作界面工作层切换到“TopLayer”,执行“Place—PolygonPour”菜单命令.打开敷铜属性设置对话框,这里采用默认设置,敷铜后PCB截图如下：oooooo电o-l~—1-0o

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mo^Huloooooo000000oo«]ooo③生成PCB信息报表执行“Peports一BoardInformation”菜单命令，打开PCB信息对话框，该对话框共有三个标签页,如下图PCBInformationGeneralComponentsNetsLED1LED2<>Total:50Top:50Bottom:0Report...|④生成网络状态报表执行“Peports一NetlistStatus”菜单命令,系统自动生成网络状态报表，如下图:NetsreportForOn2017/4/23at17:08:23AlA2A3A4A5AGA7ABCABCD1234567NBEEEBBECFGGHSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalSignalLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersLayersOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnlyOnly1250-355mi11244.497mil1338.640mil940-355nil620-355nil1431-569mi11056.213mi1341-421nil300>il903-640jnil912-426nil1167.782>il1653-137milI960-711nil918-284nil1228.284mil862-OTlnil7879.336mil3729-619nil11760-968mil499.142nilNet+l_lSignalLayersOnly2331.965uiilNetDl_lSignalLayersOnly257.071nilNetD2_lSignalLayersOnly195.355niilNetICl_1SignalLayersOnly2868.416milNetlCl2SignalLayersOnly7104.105milNetlCl5SignalLayersOnly1886.569uiilNetIC21SignalLayersOnly1027.279milNetIC210SignalLay