WAT电性参数介绍-2022年学习资料

WATParametersreview-Speaker:AlanHuang-1Flow-WhyWAT?-WATParameterReview.-1ProcesstestMetodology.-2DevicetestMethodology.-3ProcessFactorInluenceonWATPara.-WATApplication-1GeneralGuide-liewhenWATfail-2ExampleintroduceWhyWAT?-DebugtheProcessError.-MonitorProcessWinow.-CheckDesignRule-ControltheProcessParametersSC-ReliabilityCharacterization.-DeviceModelingforCrcuitDesign.-DevelopnextGeneration.-3TestsiteandTestlinelocation-in=13206.24614.8-out13326.2434.-TST1-TST2-TST7-TST3-TST4-TST8-TST9-TST5-TT6-0.0-frame=120x120DeviceCategorization-Activedevice-Resistor-MOSFETN/,Field-1Diffusionregions-Transistor,BJT,Diode-N+,N-,+.N-Well.P--Passivedevice-Well,Deep-NW-2-Thinfilms-esistor,Capacitors-P1,P2,M1,M2,M3-Designrules-Contac:-Isolation,linesSpacing,Continuity-C3toN+/P+,Via-cntact,extension-C3toP1.P2-5WaTparameterreview-ProcessPart:-DevicePart:-1SpacngBridge,short-GmVth.CurrentGain-2-ContinuityOpenIdsatAsym-3-Isolation-loff-4-SheetRs-Swing-5-ContacRc-Gammafactor-6-KelvinStructureforResistance-BK-7-IntegrityInterlayerdielectric-Isub-8-Extensionulecheck-Leff,Rext,Weff-9-CDmeasurement-FieldDevictest-10Junctionleakage-CapacitanceProcessPart:-1SpacingBridge,short-Define:验证在Process，同层/同层之间的隔绝能力！-Measurementmethod:-Force1uA电流到导线上，假若线中有short,.则测量出的电压值就偏低<7volt.需注-意此Structure之bottomlaye可垫其它layers,以模拟不同topography下Photo..&Etching-的能力！-Pad1-pacing:P1,P2,M1,M2,M3Pad2-Width:P1,P2,M1,M2,M3ProcessPart:-2ContinuityOpen-Continuity的值可反映出Metal,Poly1orPoly2CD的控制能力！一般来说，此项参数-要与Spacing?要同时来看，如此才能判Layer的status是否正常！-Pad1-Spacing:P1,P2,M1,M2,M3Pad2-Widh:P1,P2,M1,M2,M3-8ProcessPart:-3Isolation-Define:验证在Process中，两不同层之间的隔绝力！-PS:此Pattern要注意，若oxidationquality太差，亦会影响到Pl/C3是否shrt的误判-Isolationexample:P1/C3,P2/C3,P1/P2,M1/M2...-MIPoly1-PAA-NW外框PFM-PAA外框P+IM,P-IM-9ProcessPart:-4Sheet薄层电阻Rs-Define:因厚度测量不易，故Define.之-61/p=nqμl-R=V/I-pL/WT-p/TxL/W-Rs=p/T-RxW/L-PS:sConductvity传导系数；pResistivity电阻率；μmobility迁移率；-nconcentration度；Tthickness厚度；-MI-N+IMP-N-IMP-C3-NAA-PW-Poly2-X

-Pol1-10ProcessPart:-SContact接触电阻Rc-Define:利用Chain的结构，将contat的阻值以Patterndesign的方式模拟出实际的-contactRc大小！-PS:1RcNoralize后的大小，往往会失真，故当个数过多时，不建议Normalize!-2以patterndesig而言，有垫其它layer（如右下的Structure在CMP的process-中已失去参考价值了！-1.1-M2-☒-HP1P2-Via-1.25-MI-0.4651-11ProcessPart:-6KelvinStructureforResistance-Define以ForceCurrentthenSenseVoltagedrop的方式，测量低阻值的导线或Cotact-的四端电阻测量法！-PS:一般来说在Req>50的结构中，ForceI=0.01uAandVoltagelim=10V!Req=LW-15um-Pad1-Pad2-Pad3-Pad4-lum-7um-2umW-1000-12ProcessPart:-7IntegrityGate-Oxide-Integrity-Define:验Gateoxide的Quality好坏之一项参数当Gateoxideuniformity不均，-或Iterfacel间有defectsk时，会形成一漏电流路径失去OxideIsolation的能-力！-Masurementmethod:-PolyGate-一般测量法不外乎ForceV/IandmeaureI/V-1.ForceVandmeasureI:-SweepVoltonPolygte,andVb=ground-thenmeasureIgabout~pA,IfIgincreae-WELL-toluA,thisSweepVoltisBKVnormallarge7V-.ForceIandmeasureV:-ForceluAonPolygatethenmasureVoltage-PS:测量方式取决于Patterndesigncommonpadissu-13ProcessPart:-8Extensionrulecheck-Define:以sense漏电流的式，测量Contactoverlay的Designrulecheck!-PS:I一般来说，layou的结构会采用十字架的形式，最大的好处是在把shotissues-的问题抓出！-2miss-align与cntactnumber无关！-M24-Via-用Poly4垫-MI-Mlexttovia-14ProcessPart:-9CDmeasurement-Define:籍由测量两条同长度，不同宽度的电，换算出其宽度CD大小！-PS:当W=W1时可测量得电阻R1-W=W2时可测量得电阻R2-R1=Rs*L/1-△W-R2=Rs*L/W2-△W-R1/R2=W2-△W/W1-△W-则△WCD1oss,Rs皆可求得-P1CD大小影响到Channellength的长短，需特别注意-15ProcessPart:-10Junctionleakage-Define:一般来说leakage指的反向偏压时的漏电流测量，通常有以下三种分类：-1.Contactleak2.DielectriclekusuallyforDRAM3.Junctionleakbulkorperi-PS:I-blkmeas=A-bulk*J-areacurrent/um2+L-peri*J-pericurrent/m-I-fingermeas=A-fing*J-areacurrent/um2+L-pericurrentumJ-area,J-peri-C3-PW拉出-NAA有打BlanketN+imp-N-imp-16DevicePart:-1GmVth,Current-Gain-Define:Gm=△Id/△Vg-inear:-Id=1/2uCoxW/L2Vgs-VtVds-Vds2-Gm=uCoxW/Locu--Saturation:-Id=1/2uCoxW/LVgs-Vt2-Gm=uCoxW/LVgs-Vt-cPnch-Off:Vds=Vgs-Vt-Gm=uCoxW/LVds-β=uCoxWL-PS:IfBvaleabnormal,ItmayhaveGox,Leff-orimplantissues.-VtMeasuremethod:-Stepl:Vds=0.1Vs=Vb=0andswoopVg-Sep2:PlotIdsocVgsandGmocVgscurves-3-Step3:findGmmax,plotslopofthispointon-IdsVgs-FromLinearunctionsetId=OthenVth=Vgs-V-17DevicePart:-2IdsatAsym-Define:Idsat=IdsatVgs=Vds=cc-IdsMeasuremethod:-Stepl:Vs=Vb=0,Vd=VccandSweepVg-Sub-Step2:PlotIdsocVgs-Step3:FindIdsatVg=Vd=cc-Vsub-IdsAsymmetrycheck:-SMU2-Stepl:FollowingtheIdsmeasurement.-SMU3-SMUI-Step2:ChangeDrainandSoucePin--assign,thenmeasureIds'.-Step3:Asym=ABSIds-Is'/Ids-和-丽-PS:IfIdsAsymmetryAvnormal,Itmay-haveteIsub,orPolygatenon-overlap-issuesorLDDN-Rs,orontactRc-somethingstrouble!-18DevicePart:-3Ioff-Define:Ids=IoffatVgs=Vs=Vb=0,VdsVecl0gId-Vd=Vcc-IoffMeasuremethodDirectmeas.:-Stpl:Vs=Vb=0,Vd=VccandSweepVg-Step2:PlotIdsocVgs-top3:FindIdsatVg=0-Ps:测量机台的灵敏度，须注意与曲线的相-关联性！-Ioffeasuremethod外插法：-logId-Stepl:FollowtheIoffDirecteas.method-Step2:PlotMaxslopofthiscurveonlogId-Step3:FindtheIdsatVg=0intercept-19DevicePart:-4SwingSubthresholdSlop,St-Define:SwingAlogIds/AVgs-1=2kt/q1+Cd/Cox-*当Vg逐渐增加，channelaccumultion>deplation>weak-ID-inversion>stronginversion,Swig既是测量weakinversion时-VDS-5V-Id与Vg的变化程度！exponential-DIleffectmeasurement:-Step1:Vs=Vb=,Vd=andSweepVg-VD-0.1V-Step2:PlotlogIdsVgs-Step3:PlotMaxslopofthicurveonlogIdsocVgs-Step4:RepeatabutVd=Vcc-VG-Stp5:Repeatb,©-PS:如果发生punch-throughSubsurface-DIBL,HighdrainSt-willlargerthanLowdrain..Swing越大，Leakage越-20DevicePart:-5Gammafactor-Define::y=2eqNa12Cox=△Vt/2+Vbsl1n--2Φ+Vbs212-Vt=-Vf+2Φ+2εqNb2Φ+Vsb12/Cox-*Gammafactor是在计算Substrate-与Source-间非等电位时，对Vt变化的影响.Vt值需依-Vbs大小改变来计算-Measurementmethod:-Step1:FixedVd=V-VG-N2-Stp2:MeasureVtundervariousSubstatebias.-Step3:PlotVtversus2+Vbs12curve-Step4:slopeofthecurveistaentobeGammar-factor.-Ni-PS:Vtadjusment,Deepimplat,wellimplant,-wellimplant都会影响此一参数，通常Vt浓-度越高，y值越大！同，不同的device在相-同的Back-bias测量下，△Vt差值，亦代表着-Y值的影响DevicePart:-6BKV-Define:DrainvoltagewhichproducesluA-DrainCurrent.-BreakdownVoltage是用来testMOS的耐压程度。I在Longchannel的Device,看的是S/Dtowell-VG-间junction的崩溃电-VD-2在Shortchannell的status,看到的BKV,有可-能是来自draintosorce因punch-through造成-的低电压现象！-N+-PS:可籍由Id流到IsorIb来判断BV由何种造成！-Measurementmethod:-Step1:Vs=Vg=Vb=V-Step2:seupDraincurrentlimitedatluA.-Step3:PlotIdsocVs-Step4:SweepVdandfindtheVoltageatId=luA-22DevicePart:-7Isub-MeasurementCircuit-Define:IsubMesureMOShotcarrier-effect.-Id-Isub=fVds,Vgs-Sub-1Vd对Isubimpact:.-PinchoffpointVDsat=Vgs-Vt-IfVds↑，V-Vdsat↑thenEmax↑，at,Isub↑-SMU2-2Vgs对Isubimpact::-SMI-一开始Vgst,Id↑thenIsub↑，但当过pinch-Vsub-offpointh时Vgs↑VD-Vdsat.↓，thenEmax↓-SMU3-Isub↓-Measurementmethod:-tepl:Vs=Vb=0V,andVd=Vcc-Method,Characteristics-Step2SweepVgVgmin>1/2Vd-Isub+-PeakPoint-Step3:PlotIsubocVgs-Step4:Isub=Isubmax-PS:IfIsubabnormal,itmayausefromhot-carrier,Polygatenon-overlap,Contactoer-IVglimit=Vd-etching...andsoon.-23DevicePart:-8Leff,WeffandRext-Define:Leff=Lmask-2A,Rext=Rm--200-Rchannel,Weff=Wmask-2AW-VDS=0.1V-公式推导：Vgs=0-Ips=Weff/Leff*Cox**Vgs-Vt-0.5VDsVDs-Rch=VDs/IpsLeff/Weff*Cox*un*Vgs-Vt--150-0.5Vps-VGS=6V-Rm=Vf/Im=Rxt+Rch=Rext+ALmask-2AL-VGS=8V-A=1/Weff*Cox*u*Vgs-Vt-.5Vps-Measurementmethod:-100-VGS=10V-Step1:FixedVDS0.1V,Vb=Vs=0V-VGS=12V-Step2:变化Vgs-Vt=2,3V-Step3:PlotmLmask-VGS=14V-50f-Step4:选相同的ChannelWidth不同的1ength-device测量不同的Vgs-VtBias下的Ips,计算-Rext-160-Rm=VDs/IDs-Sep5:计算两直线交点-X轴截距=2△L2△W算法同-Y轴截距=Rext-24DevicePart:-9FieldDevicetest-Define::测量Activeregin与fieldoxide所-Poly-形成的寄生元件之Isolation能力测-试！-AA-考虑不同的lyout结构，有以下两种测量-法：-Measurementmethod:-1-FieldOxide上有电材料覆盖：-此结构如同一AMOS元件，MOSVt的大-小，即反映出FieldIsolation能力的坏！-PS:测量方法同Vth测量法！-FOX-2Fieldoxide上无导电材料覆盖：-此结构考虑Aciverange间implant浓度的-Isolation能力，一般是测量Constant-currentuA下的耐压度-25DevicePart:-10Capacitance-thicknessmeas-Define:电容的结常见的有一般介质电-容与MOS电容两大类，差别在参-考极板的组成成分！-Measurementmetho:HP4284-1For一般介质电容：-ForceVoltage的极性与电容大小无关！-2forMOS容：-G0x电容的测量方面，要避免空乏层-电容的形成，才能算出Thickness-PolyonPW:加压于Polygate上，PW-接地！-PolyonNW:加正压于Polygate上，NW-26ProcessFactorinfluenceonWATPara-ThresholdVoltagVt=VEB+/-2F+QBoCox-QBo=2EqNB2F+VSB12-1NBtWellandSbCon.,QBot,V.t-2GateOxide-aThickness:tox↑，Cox↓，Vtt-Quality:Qfc↑，Vt↓VFB=Φms-Qfc/CoX-3VtadjustVtimp,dee-imp.-4Poly1CD↑Leff,QBo↑，V,tforshortchannel-5S/Diplant↑，VtlForshortchannel-27ProcessFactorinfluenceonWATPara-Gainfactor:B-uCXW/L-1Mobilityut,Idt-aGox/Siinterfacequality↓，obilty↓，curr