ModelSim实验报告5

1、CP LD/F PG般计实验报告实验名称:时序电路设计基础实验目的:掌握ModelSim软件的基本使用方法，完成基本时序电路设计实验内容:实验一八位全加器创建工程工程名称:t add8二、编写一个测试文件，完成对8位全加器的仿真。'timescale 1ns/1ns module t_add8;reg cin;reg7:0 in a,i nb;wire 7:0 sum;wire cout;p arameter delay=100;add_8u1(cout,sum,i na,i nb,c in);in itialbeginin a=8'd0;i nb=8'd0;ci n=

2、1'dO;#delay#delay#delay#delay#delay#delay#delay#delay#delayendin a=8'd0;i nb=8'd0;ci n=8'd0;in a=8'd50;i nb=8'd200;ci n=1'b1;in a=8'd150;i nb=8'd230;ci n=1'b0;in a=8'd200;i nb=80;ci n=1'b0;in a=8'd220;i nb=60;ci n=1'b1;in a=8'd100;i nb=8

3、9;d80;in a=8'd240;i nb=8'd20;in a=8'd255;i nb=8'd255;ci n=1'b1; $st op;in itial $mo ni tor($time,"%d+%d+%d=%b,%d",i na,i nb,ci n,cout,sum); en dmodule三、源码。module add_8(cout,sum,i na,i nb,c in); input cin;inpu t7:O in a,i nb;outpu t7:O sum;output cout;assig ncout,sum=ina

4、+in b+ci n; en dmodule四、仿真结果。0代_3也址inD-0-/t-mcld8/inb今 /t=add3启um /t_addeycout2552S5JOZSLI SI五、RTL视图。AddOina7.Oinb7.OA7.OB7.OAdd1ADDERIrBb8' hOO -coutum7.OADDER实验4选1数据选择器、创建工程工程名称：t_mux4_1、编写一个测试文件，完成对 4选1数据选择器的仿真。'timescale 1ns/1ns module t_mux4_1; reg in O,i n1,i n2,i n3; reg 1:O sel;wire

5、out;p arameter delay=1OO;mux4_1u1(out, in O,i n1,i n2,i n3,sel);in itialbegin#delay#delay#delay#delay#delay#delay ; endin O=O;i n1=O;i n2=O;i n3=O;sel=O;in O=O;i n1=O;i n2=O;i n3=O;sel=O;in 0=0;i n1=1;i n2=0;i n3=0;sel=1;in O=O;i n1=O;i n2=1;i n3=O;sel=2;in O=O;i n1=O;i n2=O;i n3=1;sel=3;in O=O;i n1

6、=O;i n2=O;i n3=O;sel=O;en dmodule三、源码。module mux4_1(out, in 0,i n1,i n2,i n3,sel); input in 0,i n1,i n2,i n3;inp ut 1:0 sel;out put reg out;always (in 0,i n1,in 2,i n3,sel)case (sel)2'b00: out=in 0;2'b01: out=i n1;2'b10: out=i n2;2'b11: out=i n3;default: out=1'b11;endcase四、仿真结果。d

7、elay100inO0ini0in20JIn30哪00OlJt5t0五、RTL视图。en dmodulesel仁問曲MessagesJ yt J /tJ yt* ItytJ itmu关斗 I.mux4 rnux4 mu5c4mux4,1/inO1/inl 1简2 脚3 1占el 1/cutMuxOnigO JTOATApn000005t0>out实验三 3-8译码器、创建工程工程名称：t_d38二、编写一个测试文件，完成对3-8译码器(使用Assign语句实现74138功能) 的仿真。'timescale 1ns/1nsmodule t_d38;reg 2:0 a;reg g1,

8、g2a,g2b;wire 7:0 y;p arameter delay=100;decoder3_8 u1(a,y,g1,g2a,g2b);in itiala=3'b000;g1=0;g2a=0;g2b=0; a=3'b000;g1=0;g2a=0;g2b=0; a=3'b000;g1=1;g2a=0;g2b=0; a=3'b001;g1=1;g2a=0;g2b=0; a=3'b010;g1=1;g2a=0;g2b=0; a=3'b011;g1=1;g2a=0;g2b=0; a=3'b100;g1=1;g2a=0;g2b=0; a=3&#

9、39;b101;g1=1;g2a=0;g2b=0; a=3'b110;g1=1;g2a=0;g2b=0; a=3'b111;g1=1;g2a=0;g2b=0;begi n#delay#delay#delay#delay#delay#delay#delay#delay#delay#delay;enden dmodule三、源码。module decoder3_8(a,y,g1,g2a,g2b);inp ut 2:0 a;inp ut g1,g2a,g2b;out put 7:0 y;assig n y=(g1 && !g2a && !g2b)?(1'b1<<a):8'b1111_1111); en dmodule四、仿真结果。Mes-jagejD-> /Ldse/a> 3 印丿宾/t_d38/