pscad包学习笔记0interpolation开关器件与插值处理_第1页
pscad包学习笔记0interpolation开关器件与插值处理_第2页
pscad包学习笔记0interpolation开关器件与插值处理_第3页
已阅读5页,还剩4页未读 继续免费阅读

下载本文档

版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领

文档简介

1、Interpolationand开关器件与插值处理As discussed in Chapter 3, transient simulation of an electric network, over a certain period of time, isplished by solving thenetworkequationsataseriesofdiscreteintervals(timesteps) over that period.EMTDC is a fixed time step transient simulation program and therefore, the

2、time step is chosen at the beginning of the simulation, and remains constant thereafter.成,得到特定时间段内一系列时间间隔(仿真步长)上的离散解。EMTDCDue to the fixed nature of the time step, network events such as a fault or thyristor switching, can occur only on these discrete instants(紧急的) of time (if not corrected).Thismea

3、nsthatifa switching event occurs directly after a time step interval, then the actualeventwillnotberepresented(表现)untilthefollowingtime 仿真时间点中间,真实发生的事件直到下一个时间步长到来才会被来。This phenomenon can introduce inaccuracies and undesired switching Inmanysituations,suchasabreakertripevent,adelay of one time step (

4、say about 50 s) is of hardly anyHowever, in power electronic circuit simulation, such a delay can produce very inaccurate results (i.e. 50 s at 60 Hz is y 1 electrical degree).Onewaytoreducethisdelayis to reduce the time step.However, this will also increase the computation time proportionay, and st

5、ill may not give good enough 50us)导致仿真出来几乎没有任何结果。而且在电力电子电路仿真中,这样的一个延迟会导致非常确的结果(50us在60HzAnother method is to use a variable time step solution, where if a switching event is detected; the program will sub-divide the time step into smaller intervals.However,thisdoesnotcircumventthe problem of spuriou

6、s voltage and current es, due to current and voltage differentials when switching inductive and capacitive 的更小。然而这种方法不能涵盖spurious voltage and current es问EMTDCusesaninterpolationalgorithmtofindtheexactinstantof theeventifitoccursbetweentimesteps.Thisismuchfasterand moreaccuratethanreducingthetimestep

7、andinterpolationallows EMTDC to accuray simulate any switching event, while still allowing the use of a larger time step.EMTDCHere is how it Each switching device adds its criteria to a polling(轮询) list when called by the DSDYN subroutine.The main program then solves for the voltages and currents at

8、 of the timestep,whilestoringtheswitchingdeviceconditionatthe beginning of the time step.These devices may specify a switching instant by time directly, or by voltage or current crossing levels.每一个开关器件都在被 DSDYN 子程序调用时将自己的开关状态条件添加到一个轮询列表里。主程序在时间步长开始的时候开关器件的状态The main program determines the switching

9、device, whose criteria for switching has been met , and then interpolates all voltages and currents in this subsystem to that instant in time.Thebranchisthenswitched,requiring a re-triagularization of the conductance matrix.要对导纳矩阵重新 LU 分解。EMTDC then solves for all history terms, increments(增量) forwa

10、rdbyonetimestep()pasttheinterpolatedpoint(time step的定语), and solves for the node voltages.Alldevices are polled to see if more interpolated switching is required before of the original time step.EMTDC历史条目求解,求解Ifnofurtherswitchingisrequired,onefinalinterpolationis executed to return the solution to t

11、he original time step These steps are illustrated in Figure 4-Figure4-1 - Illustration of Interpolation Ifthereismoreswitchinginthisparticulartimestep,then steps 1 to 3 are repeated.EXAMPLE 4-ReferringtoFigure4-2,letusconsideradiodethatisconducting, but should turn off when the current reaches zero.

12、 When the diode subroutineiscalledfromDSDYNattimestep1,thecurrentisstill positive, so no switching occurs.根据图 4-2,来考虑一个二极管导通,但应该在电流达到零的时候关 If interpolation is not available (or turned off in EMTDC), a solution at time step 2 would be generated. The diode subroutine would then recognize that its curr

13、ent is negative, and subsequently switchitselfofffortimestep3-thusallowinganegativecurrent to flow through the device.如果没有插值处理(EMTDC)22,3Figure 4-2 - Non-Interpolated Diode InEMTDC(withinterpolationturnedon),whenthediodesubroutineis called from DSDYN at time = 1, it still of course would not switch

14、the device off because the current is positive.However, because this is a switch-able branch, it would be part of a list indicating tothemainprogramthatifthecurrentthroughthisbranchshouldgo through zero, it should switch the branch off before of the time step.The main program would generate a soluti

15、on at time = 2 (as it did above),butwouldthencheckitslistforinterpolation requirements.Since the new diode current is negative at time = 2, the mainprogram would calculate when the current actually crossed Itwouldinterpolateallvoltagesandcurrentstothistime (say time = 1.2), and then switch the diode

16、 off.Assuming that there is no further switching in this time step, the mainprogramwouldappropriaycalculatethevoltagesattime=1.2 and 2.2 (1.2 + t), and then interpolate the voltage back to time = 2 to bring the simulation back on track with integral time steps.Figure 4-3 - Interpolated Diode DSDYNan

17、dDSOUTarestillonlycalledattimes,1,2and3, yet the diode is still turned off at 1.2, so therefore no negative current is observed.The main program would then call DSOUT so that the voltages and currents at time = 2 can be output.ItwouldthencallDSDYNat time = 2, and continue the normal solution to time

18、 = 3.着在时间 2DSDYN,然后继续在时间 3 点的正常解。There is one additional complication to the above procedure:chatter removal flag (see Chatter Detection and Removal) is automaticallysetanytimeaswitchoccurs.Theflagisclearedas soon as an uninterrupted half time step interpolation is In the example above, this means t

19、hat an additional interpolation would be performed to 1.7 (half way between 1.2 and 2.2), a solution at 2.7, and then the final interpolation would return the solution to 2.0 as before.半个步长)2.72.0 时的解。To prevent an excessive number of switches in one time step, the solutionwillalwaysproceedforwardby

20、atleast0.01%ofthetime In addition, any two (or more) devices, which require switchingwithin0.01%ofeachother,willbeswitchedatthesame 为了大量的开关状态发生在同一个步长,求解往往会在时间步长0.01%之时开关。 (?)As an example of the application of interpolation, a simple HVDC system, where the differences in measured alpha (at the recti

21、fier) foraconstantalphaorderisillustratedinFigures4-4(a)and(b), with a 50 s simulation time step.While the interpolated firing produces less than 0.001 fluctuation, the non-interpolated firing results in about 1 fluctuation.Such large fluctuations (of one or more degrees) in firing will introduce non-characteristicharmonics and will prevent fine adjustments in firing angles. In thesetwoexamples,EMTDCautomatica

温馨提示

  • 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
  • 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
  • 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
  • 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
  • 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
  • 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
  • 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

评论

0/150

提交评论