西北工业大学-CMOS实验报告-实验四-运放的仿真

1、 实验四 运放的仿真方法实验运放：仿真前，直流扫描，确定工作点sp文件(部分）.GLOBAL VDD IREF VDD NET3 DC=25u M1 NET1 1 NET2 NET2 NMOS L=2u W=47u M2 VOUT 2 NET2 NET2 NMOS L=2u W=47u M3 NET1 NET1 VDD VDD PMOS L=2u W=22uM4 VOUT NET1 VDD VDD PMOS L=2u W=22uM5 NET2 NET3 GND GND NMOS L=2u W=20u M6 NET3 NET3 GND GND NMOS L=2u W=20u V1 1 VIN 0

2、V2 2 VOUT 0VGND GND 0 0VVDD VDD 0 3.3VVIN VIN 0 0.DC VVIN 0 3.3 0.05.options post acct be V(Vout) I(M5).END结果如下图图1.运放直流工作点扫描工作点选定为2.0VAMP文件.GLOBAL VDD GND .SUBCKT AMP1 GND VDD Vin+ Vin- VOUT IREF VDD NET3 DC=25E-6 M1 NET1 Vin+ NET2 GND NMOS L=2E-6 W=47E-6 M2 VOUT Vin- NET2 GND NMOS L=2E-6 W

3、=47E-6 M3 NET1 NET1 VDD VDD PMOS L=2E-6 W=22E-6 M4 VOUT NET1 VDD VDD PMOS L=2E-6 W=22E-6 M5 NET2 NET3 GND GND NMOS L=2E-6 W=20E-6 M6 NET3 NET3 GND GND NMOS L=2E-6 W=20E-6 .ENDS AMP1LIB文件*model NMOS*.MODEL NMOS NMOS(+LEVEL=1 VT0=0.7 GAMMA=0.45 PHI=0.9 +NSUB=9e+14 LD=0.08e-6 U0=350 LAMBDA=0.1+TOX=9e-9

4、 PB=0.9 CJ=0.56e-3 CJSW=0.35e-11+MJ=0.45 MJSW=0.2 CGDO=0.4e-9 JS=1.0e-8)*model PMOS*.MODEL PMOS PMOS(+LEVEL=1 VT0=-0.8 GAMMA=0.4 PHI=0.8 +NSUB=5e+14 LD=0.09e-6 U0=100 LAMBDA=0.2+TOX=9e-9 PB=0.9 CJ=0.94e-3 CJSW=0.32e-11+MJ=0.5 MJSW=0.3 CGDO=0.3e-9 JS=0.5e-8)一、输入失调电压(Voltage Offset)的仿真1.sp文件.title tes

5、t1.include './lib.txt'.include './'XI0 0 VDD VIN VOUT VOUT AMP1 * VVDD VDD 0 3.3VVIN VIN 0 0.DC VVIN 0 3.3 0.05*.DC temp -40 120 1.options post acct probe.PROBE V(VOUT) *V(VIN) VOS=parV(VOUT)-V(VIN).op.END2.仿真结果温度对失调电压的影响1.sp文件.title test1.include './lib.txt'.include './&

6、#39;XI0 0 VDD VIN VOUT VOUT AMP1 * VVDD VDD 0 3.3VVIN VIN 0 0*.DC VVIN 0 3.3 0.05.DC temp -40 120 1.options post acct probe.PROBE V(VOUT) *V(VIN) VOS=parV(VOUT)-V(VIN).op.END2.仿真结果二、开环增益的仿真1.sp文件.title test2.include './lib.txt'.include './'XI0 0 VDD VIN VOUT VOUT AMP1 * R0 VIN- VOUT

7、1GC0 VIN- 0 1GVVDD VDD 0 3.3VVIN VIN 0 DC=2 AC=1, 0 .ac dec 100 0.001 10G.options post acct be Vdb(Vout) Vp(Vout).op.END2.仿真结果三、CMRR的仿真1.sp文件.title test3.include './lib.txt'.include './'XI1 0 VDD VIN VOUT1 VOUT1 AMP1 XI2 0 VDD VIN VOUT2 VOUT2 AMP1 * R0 VIN1- VOUT1 1GR1 VIN2-

8、 VOUT2 1GC0 VIN1- 0 1GC1 VIN VIN2- 1GVVDD VDD 0 3.3VVIN VIN 0 DC=2 AC=1, 0 .ac dec 100 0.001 10G.options post acct probe.PROBE VDB(VOUT1) VDB(VOUT2) CMRR=Vdb(Vout1)-Vdb(Vout2) =Vp(Vout1)-Vp(Vout2).op.END2.仿真结果四、PSRR的仿真1.sp文件.title test4.include './lib.txt'.include './'XI0 0 VDD VIN V

9、OUT VOUT AMP1 * VVDD VDD 0 3.3 AC=1,0VVIN VIN 0 2.ac dec 100 0.001 10G.options post acct probe.PROBE VDB(VOUT) VP(VOUT).op.END2.仿真结果五、输出阻抗的分析1.sp文件.title test5.include './lib.txt'.include './'XI0 0 VDD VIN VOUT VOUT AMP1 * VVDD VDD 0 3.3 AC=1,0VVIN VIN 0 2I0 VOUT 0 DC=5U AC=1,0 .ac dec 100 0.001 10G.options post acct probe.PROBE VDB(VOUT) VP(VOUT).op.END2.仿真结果六、SR及建立时间的仿真1.sp文件.title test6.include './lib.txt'.include './'XI0 0 VDD VIN VOUT VOUT AMP1 * VVDD VDD 0 3.3 VVIN VIN 0 PULSE