密勒码编译码器的Verilog实现_直接转换

1、直接转换的方法1.1编码timescale Ins / Ips/ Company:/ Engineer:/ Create Date:22:12:12 03/28/2011/ Design Name:/ Module Name:miller_encode/ Project Name:/ Target Devices:/ Tool versions:/ Description:/ Dependencies:/ Revision:/ Revision 0.01 File Created/ Additional Comments:/ llllllllllllllllllllllllllllllllll

2、llllllllllllllllllllllllllllllllllllllllllllllll module encode(ini,fin);input 7:0ini;output 15:0fin;reg 15:0 fin;integer i;always (ini)begincase(ini7:6)2,b00:fin15:12 = 40011;2,b01:fin15:12 = 40001;2,bl0:fin15:12 = 4,b0111;2,bll:fin15:12 = 4,b0110;default:fin15:12 = 4b0000;endcasefor(i = 5;i = 0; i

3、= i-1)case(i nii)bl:begincase(inii+l)bl:begin case(fin2*i+3,fin2*i+2)2,bl0:fin2*i+l/fin2*i = 2b01;2,b01:fin2*i+l/fin2*i = 2blO;endcaseendbO:begincase(fin2*i+3zfin2*i+2)2bOO:f 叫 2*i+l,fin2*i = 2b01;2,bll:fin2*i+l/fin2*i = 2blO;endcaseendendcaseendbO:begincase(inii+l)bl:begincase(fin2*i+3zfin2*i+2)2,b

4、l0:fin2*i+l/fin2*i = 2bOO;2,bOl:fin2*i+l/fin2*i = 2bll;endcaseendbO:begincase(fin2*i+3zfin2*i+2)2bOO:f 叫 2*i+l,fin2*i = 2bll;2,bll:fin2*i+l/fin2*i = 2bOO;endcaseendendcaseendendcaseendend module1.2译码timescale Ins / Ips lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll

5、l / Company:/ Engineer:/ Create Date:22:15:53 03/28/2011/ Design Name:/ Module Name:miller_decode/ Project Name:/ Target Devices:/ Tool versions:/ Description:/ Dependencies:/ Revision:/ Revision 0.01 - File Created/ Additional Comments:/llllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllmodule decode(ini,fin);input 16:lini;output 8:lfin;reg 8:lfin;integer ij;always (ini)beginfor(i = 16;i = 3;i = i - 2)case(iniinikL)2lbOO:fini/2=2,bO;2lb01:fini/2=2,bl;2blO:fini/2=2,bl;2bll:fini/2=2bO;endcasecase (ini2nil)2,bOO:fi