电气专业毕业设计外文文献与中文翻译

河南理工大学万方科技学院本科毕业论文PAGE1附录：外文资料与中文翻译外文资料：NeedsofMultimediaProcessorDynamicPowerManagementTechnologyActivePowerManagementOn-chippowermanagementtechniquesfallintotwobroadcategories,themanagementofsystempowerconsumptionandstandbypowerconsumptionmanagement.ActivePowerManagementisdividedintothreeareas:dynamicvoltageandfrequencyscaling(DVFS),adaptivevoltagescaling(AVS)anddynamicpowerswitching(DPS).Staticpowermanagementsystemsneedtoensurethattheidleprocessingpowerneededbeforeahigherpowerinthestate,thatis,theuseoftheso-calledstaticleakagemanagement(SLM)technology,thiskindofmanagementisusuallydependentonpowerfromstandbytoseverallowpowerconsumptionpatterns.Let'stakealookattheactivemode.UsingDVFStechniques,applicationperformancecanbebasedondemandsoftwaretoreducetheclockspeedandvoltage.Forexample,wemayenvisageahigh-levelintegratedRISCmicroprocessor(ARM)anddigitalsignalprocessor(DSP)applicationsprocessor.AlthoughtheARMspeedcomponentscanbeashighas600MHz,butthesystemdoesnotalwaysneedsuchahighcomputingpower.Usually,wecanchoosesoftwaretopredefinedperformancepointprocessor(OPP),thevoltageatthistimetoensurethattheprocessorinthesystemcanmeetperformancerequirementsontheminimumfrequency.Inordertoadapttodifferentapplicationstofurtherenhancetheflexibilitytooptimizepower,wecaninterconnectforprocessorsandperipheralsinadditionasetofpredefinedcoredevicesOPP.OPPsoftwareinaccordancewithanexternalregulatorisrequiredtosendcontrolsignalstosettheminimumvoltage.Forexample,DVFSapplytothetwosupplyvoltageVDD1(DSPandARMprocessorssupplyvoltage)andVDD2(peripheralsubsystemsinterconnectionandpowersupplyvoltage),thetwovoltagerailstoprovidethemajorityofchippower(usually75%to80%).IntheimplementationofMP3decoder,theDSPprocessorcanbetransferredtolow-performancepoint,thusgreatlyreducingthepowerconsumptionforothertasks,whentheARMoperatingfrequencyupto125MHz.Inordertoachievethebestpowernecessaryfunctionality,weVDD1canbereducedto0.95voltsinsteadofthemaximumvoltageof1.35voltstoensurethattheworkingfrequencyof600MHz.Adaptivevoltagescaling(AVS)asasecondactivepowermanagementtechnology,basedonthechipmanufacturingprocess,aswellasthelifecycleofdeviceoperationgeneratedbasedonthedifference.Thetechnologyandallprocessorssharethesamepre-programmeddifferentDVFStheOPP.Itcanbeinferredthatthemajorityofthemanufacturingprocesshasmatured,thechip'sperformanceintheestablishedfrequencytofollowacertainrequestdistribution.Somedevices(theso-called"hot"devices)comparedtootherdevices(theso-called"cold"devices),thelowervoltagetoachieveagivenfrequency,andthisistheroleoftheprincipleofAVS-Processorsensorstotheirownperformancelevel,andadjustthesupplyvoltage.AVSdedicatedhardwarechipfeedbackloopcanbeimplementedwithoutprocessorinterventionvoltageleveldynamicoptimizationtomeettheneedsoftheprocess,temperatureandsiliconattenuationdifferencecausedbytherequirements(Figure1).Figure1Giventheperformanceofthedistributionofatypicalprocessor.Here's"cool"deviceinthefrequencyof125MHzneedto0.94volts,whilethe"hot"deviceinthefrequencyofonly0.83volts.Adaptivevoltagescaling(AVS)technologyusesthecorrespondingfeedbackloopsupplyvoltageregulatortoensurethatalldevicesrunningtasksinaspecificfrequencyrequiredSoftwarecanworkforeachOPPsetupAVShardware,andcontrolalgorithmsthroughI2Cbustosendcommandstoexternalvoltageregulatorinordertograduallyreducetheoutputoftheappropriateregulator,untiljustoverthetargetprocessorfrequencyrequirement.Forexample,developerscandesignafirsttomeetallofthevoltage,frequencyof125MHzat0.95volts(inFigure1inthetopoftheV1).However,ifthesystemusingAVStechnologytoinsertthe"hot"device,thenthefeedbackmechanismon-chipARMwillautomaticallybereducedto0.85voltsofthevoltageorlower(V2inFigure1above).Thefirsttwoactivepowermanagementtechnologycanminimizetheoperatingvoltagesothatacertainpartofthedeviceinthedesiredspeed.Incontrast,thethirdmethod-Dynamicpowerswitching(DPS)todeterminethedevicewhenitcancompletethecalculationofthecurrenttask,ifnoneed,thenallowthedevicetoenterlow-powerstandbymode(Figure2).Forexample,theprocessorsarewaitingforDMAtransfertocompletetheprocesswillenteralow-powerstate.Processorinafewmicrosecondsafterthewake-upcallwillbeabletoreturntonormalworkingcondition.Figure2Dynamicpowerswitching(DPS)inagivenpartofadeviceafterthecompletionofthetasktoenterthelow-powerstatePassivepowermanagementAlthoughtheDPSwillallowmulti-mediasystem-on-chip(SoC)aspartofenteringthelow-powerstate,butinsomecases,wecanhavetheentiredeviceintothelowpowermode-intheabsenceoftheapplicationtorunautomaticallyorthroughuserrequestsaccesstolow-power.Toachievethisend,wecanbestaticleakagemanagement(SLM)technology,startthestandbymodeorturnoffthedevice.Thesetwomodelsofakeydifferenceis:Instandbymode,thedeviceisstilloccupiedbytheinternalmemoryandlogic,andintheclosedmodeofthedevice,allthesystemstateisstoredinexternalmemory.TheuseofSLMtechnology,wake-uptimemuchfasterthanthespeedofcoldstartbecausetheprocedureshavebeenloadedintotheexternalmemory,theuserhavingtowaitfortheoperatingsystem(OS)completelyrestarted.InthecaseoftheuseofSLMtechnology,wemediaplayerasanexample,ifaftertensecondstoopenhasnotbeenprocessinginstructionoruserinput,itwillclosethedisplaydevicetoenterstandbyorshutdownmode.Forexample,TIusingARMCortex-A8coreOMAP35xdevicesonasinglechipprocessortosupportthedeviceshutdownmode,thedevicecanautomaticallywake-upcallthatthelowestpowermode.Inadditiontowake-updomain,allpowerdomainareclosed,powerconsumption,onlytowakeupthedomainwiththeI/Oleakagecurrent.Shutdownthesystemclock,inthecircumstances,thewake-upclockdomainbyaseparatesetof32kHz.Inaddition,OMAP35xcanautomaticallysendsignalstoexternalregulators,voltageregulatorscanshutdownthedepthofsleep.Processordoesnotsavetheinternalmemoryorlogic.Intheelectricmodeintothedevicebeforetheclosure,thesystemstateisstoredinexternalmemory.Afterthewake-upreset,themicroprocessorunit(MPU)willactivatetheuser-definedfunctions,SDRAMcontrollerconfigurationfromthehigh-speedtemporarymemory(SPM)torecover.TomeetavarietyofusesoftechnologyThroughacombinationoftheabove-mentionedpowermanagementtechnology,wecanbeawiderangeofoperatingconditionstoachievethebestpower.Ifthesystemwasbusydealingwithhigh-resolutionvideoplaybackforportableplayerssuchastasks,thensetupinover-voltageVDD1onOPP.Ifitisamoderate-powerwebbrowsing,canbesetforVDD1andVDD2ratedtheOPP.Iflow-powermusiccanbesetforVDD1andVDD2lowestOPP.Inallthesecircumstances,wecanstarttheAVStobalancethe"cold""hot"powerdifferentialdevices.Finally,ifusersopenthemediaplayerbutnotafewhoursorafewdaysuse,itsadoptionofSLMtechnologywillautomaticallyshutdownthedeviceintothemodel.Tobetterunderstandtheuseoftechnologybroughtaboutbytheabove-mentionedenergy-savingadvantages,thefollowingcasesneedtobetakenintoaccount.Inthefollowingcases,unlesstherearespecificdescription,orwealldonotuseTI'sAVS/SmartReflextechnology.Inthesedescriptions,IVAreferstoimages,videoandaudioacceleratorsubsystem.CaseI:device-downmode-0.590mW.ThisisaTIOMAPcanautomaticallywakeuptheminimumpowermode.Inthismode,theentiredeviceinadditiontowake-upoutsidethecloseddomain,andthewake-upfrequencydomainislessthan32kHz.Closetheregulatordoesnotuse(VDD1=VDD2=0),auto-refreshSDRAM,specialstartsequencewhenthewake-upcalltorestorethesystemstatecontrollerandtheSDRAM.CaseII:standbymode-7mW.Devicesinthestate,onlytowakeupthedomain,allothernon-powerdomainwake-upareinalow-powerstateofpreservation(VDD1=VDD2=0.9V).Alllogicandmemorywillberetained.AVSclosed.CaseIII:AudioDecoder-22mW(excludingDPLLpowerandIO).AlthoughtheARMinthe125MHzfrequency,butonlyfromtheDMAsetmultimediacardreaderinputdata,andthenenterhibernation.MP3decoderIVAframe(44.1kHz,128kbpsstereo),anddecodingthedatasenttoabufferinSDRAM.Chipmulti-channelbufferedserialporttosenddatatotheaudiocodecforplayback.Onthesystemconfigurationisconcerned,DSP'soperatingfrequencyis90MHz,intheprocessingcyclewithoutenteringthelowpowermodetoreducepowerconsumption.Atthistime,VDD10.9V,VDD2voltsto1.Casefour:audio/videoencoding-540mW(non-DPLLpowerandIO).Inthatcase,wecaptureandencodeaudio(AACe+,48kHz,32kbpsstereo),videocaptureandencoding(H.264VGAresolution,20framespersecond,2.4Mbsp),audioandvideoarepreserved,Atthesametimetodisplayvideo.Intheconfiguration,ARMoperatesat500MHz,DSPoperatingfrequencyis360MHz,VDD11.2V,VDD2to1.15volts.Inaddition,thesubsystem-chipcamerasensorcancapturevideofromanexternalinput,multi-channelbufferedserialportinputPCMaudiocapture,IVAimplementationofaudioandvideoencoding,encodingdatastoredinthemultimediacard,whichmakesvideodisplaysubsystemcycle,andvideosenttotheLCDandTVoutputinterface.ImplementationofpowermanagementInordertoachievethefullflexibilityofpowermanagement,DSPprocessorchippowerdeviceresetandclockmanagement(PRCM).OMAP3530processorfunctionmoduleisdividedinto18powerdomains,eachdomainhasitsownpowerswitch.PRCMcanswitchallthepowerdomain,butmanypowersuppliesmayalsobeuser-controlleddomain.Inaddition,eachpowerdomaincanbebasedonwhetherthelogicandmemorypower,andtheclockisinworkingconditionandenterthefourstates:theworkofstate,non-workingcondition,andmaintainonoroff.OntheARMandDSPdevices,theabove-mentionedstateregulatorsusuallyrequireauxiliary.Manyofthemarketregulatorstomeettheserequirementscan,ofcourse,needtomeettheprocessor'svoltage,current,powerconversionrateofdeclineinnormsaswellasincreasedpowersequencingrequirements.InordertoARMprocessorandDSPimplementationofDVFSandAVSoperation,therelevantregulatormustsupportI2Cprogrammability.Inthedeviceshutdownmode,thecircuitthroughtheautomaticsystemmustbeissued,ortoaspecificI2CcommandstoopenorclosetheGPIOsignalVDD1andVDD2regulators.IftheuseofGPIOsignals,I2Cdoesnotexistasaresultofthedelay,thenthewake-uptimewillbefaster.Designengineersinordertoreducetheburdenofalltheabove-mentionedcharacteristicsofthebestfeaturesintegratedinasingledevice,therebysignificantlyreducingthenumberofcomponents(Figure3).Figure3Highvoltageregulatorchipintegratesanumberofswitchingregulatorwithlowdropoutlinearregulator,whichcanmeettheneedsofOMAP35xprocessorsvoltagedomainrequirements.

中文翻译：满足多媒体处理器需求动态电源管理技术有源电源管理片上电源管理技术分为两大类，管理工作系统功耗与管理待机功耗。有源电源管理分为三个领域：动态电压与频率缩放(DVFS)、自适应电压调整(AVS)与动态电源切换(DPS)。静态功耗管理需要确保闲置的系统在需要更高处理能力之前处于省电状态，也就是采用所谓的静态漏电管理(SLM)技术，这种管理通常依赖于从待机到断电的几种低功耗模式。我们先来看看主动模式。利用DVFS技术，可根据应用的性能需求通过软件来降低时钟速度和电压。例如，我们不妨设想一款集成了高级RISC微处理器(ARM)与数字信号处理器(DSP)的应用处理器。尽管ARM组件的运行速度可高达600MHz，但系统并不总是需要如此高的计算能力。通常，我们可通过软件来选择预定义的处理器工作性能点(OPP)，这时的电压可确保处理器工作在可满足系统处理性能要求的最低频率上。为了适应不同应用，进一步提高优化功率的灵活性，我们还可为处理器中的互连与外设预定义另外一组器件内核OPP。软件根据OPP需向外部稳压器发送控制信号才能设置最低电压。例如，DVFS适用于两个供电电压VDD1(DSP与ARM处理器的供电电压)与VDD2(子系统与外设互连的供电电压)，这两个电压轨提供了大部分芯片功率(通常在75%到80%之间)。在执行MP3解码时，可将DSP处理器转入低操作性能点，从而大幅减少功耗供处理其他任务之用，这时的ARM运行频率高达125MHz。为了在最佳功耗情况下实现必需的功能性，我们可将VDD1降至0.95伏特，而不使用最高1.35伏特的电压，以确保600MHz的工作频率。自适应电压缩放(AVS)作为第二种有源电源管理技术，是以芯片制造过程中以及器件运行生命周期中产生的差异为基础的。该技术与所有处理器都采用相同预编程OPP的DVFS不同。可以想见，就大多数已经成熟的制造工艺而言，芯片的性能在既定频率要求下要遵循一定的分布情况。部分器件(所谓的“热”器件)相对于其他器件(所谓的“冷”器件)而言，能以较低的电压实现给定的频率，这就是AVS发挥作用的原理——处理器感应到自身的性能级别，并相应调整供电电压。专用的片上AVS硬件可实施反馈环路，无需处理器干预即可动态优化电压电平，以满足进程、温度以及硅芯片衰减等造成的差异要求(图1)。图1给定处理器的典型性能分布。此处的“冷”器件工作在125MHz的频率时需要0.94伏特，而“热”器件在该频率下只需0.83伏特。自适应电压缩放(AVS)技术采用反馈环路相应调节供电电压，确保各器件运行在特定处理任务所需的频率上软件可在工作中为每个OPP设置AVS硬件，而控制算法则通过I2C总线向外部稳压器发送指令，以逐步降低适当稳压器的输出，直至处理器刚好超过目标频率的要求为止。例如，开发人员可首先设计一个能满足所有情况的电压，在125MHz频率下为0.95伏特(在图1中的V1上方)。但是，如果系统中插入了采用AVS技术的“热”器件，那么片上反馈机制就会自动将ARM的电压降至0.85伏特或更低(图1中的V2上方)。前两种有源电源管理技术可以最小的工作电压让器件的某部分工作在理想的速度上。相比之下，第三种方法—动态功率切换(DPS)先确定器件何时可完成当前的计算任务，如果暂时不需要，则让器件进入低功耗待机状态(图2)。例如，处理器在等待DMA传输完成过程中会进入低功耗状态。处理器在唤醒后几微秒内就能返回正常工作状态。图2动态电源切换(DPS)在给定器件的某部分完成任务后使其进入低功耗状态无源电源管理虽然DPS可让多媒体片上系统(SoC)的一部分进入低功耗状态，不过在有些情况下，我们可让整个器件都进入低功耗模式—在没有应用运行时自动或通过用户请求进入低功耗模式。要实现这一目的，我们可应用静态漏电管理(SLM)技术，启动待机或器件关闭模式。这两种模式一个关键的不同之处在于：在待机模式下，器件仍然占用着内部存储器和逻辑，而在器件关闭模式下，所有系统状态都保存于外部存储器中。利用SLM技术，唤醒时间大大快于冷启动速度，因为程序已经载入到了外部存储器，用户无需等待操作系统(OS)完全重新启动。在采用SLM技术情况下，我们以媒体播放器为例，如果打开十秒钟后还没有得到处理指令或用户输入，就会关闭显示屏进入待机或器件关闭模式。例如，TI采用ARMCortex-A8内核的OMAP35x单芯片处理器器件就支持器件关闭模式，即器件可自动唤醒的最低功耗模式。除了唤醒域之外，所有电源域均关闭，耗电的只有唤醒域与I/O漏电流。系统时钟关闭，在此情况下，唤醒域的时钟被单独设为32kHz。此外，OMAP35x还可自动向外部稳压器发送信号，稳压器能够在深度睡眠状态下关闭。处理器内部不保存存储器或逻辑。在进器件关闭电模式前，系统状态存储在外部存储器中。经后唤醒复位后，微处理器单元(MPU)会启动用户定义的功能，SDRAM控制器配置从高速暂存存储器(SPM)中恢复。可满足各种用途的技术通过结合采用上述电源管理技术，我们可实现多种操作条件下的最佳功耗。如果系统忙于处理播放高分辨率视频等便携式播放器任务，那么可在VDD1上设置过压OPP。如果是功耗适中的web浏览，则可为VDD1与VDD2设置额定