DE2-115所有引脚分配表

表1拨动开关引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardSW[0]SW[1]SW[2]SW[3]SW[4]SW[5]SW[6]SW[7]SW[8]SW[9]SW[10]SW[11]SW[12]SW[13]PIN_AB28SlideSwitch[0]DependingonJP7PIN_AC28SlideSwitch[1]DependingonJP7PIN_AC27SlideSwitch[2]DependingonJP7PIN_AD27SlideSwitch[3]DependingonJP7PIN_AB27SlideSwitch[4]DependingonJP7PIN_AC26SlideSwitch[5]DependingonJP7PIN_AD26SlideSwitch[6]DependingonJP7PIN_AB26SlideSwitch[7]DependingonJP7PIN_AC25SlideSwitch[8]DependingonJP7PIN_AB25SlideSwitch[9]DependingonJP7PIN_AC24SlideSwitch[10]DependingonJP7PIN_AB24SlideSwitch[11]JP7DependingonDependingonDependingonPIN_AB23SlideSwitch[12]JP7PIN_AA24SlideSwitch[13]JP7SW[14]SW[15]SW[16]SW[17]PIN_AA23SlideSwitch[14]DependingonJP7PIN_AA22SlideSwitch[15]DependingonJP7PIN_Y24PIN_Y23SlideSwitch[16]DependingonJP7SlideDependingonJP7Switch[17]表2按钮开关引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardKEY[0]KEY[1]KEY[2]KEY[3]PIN_M23PIN_M21PIN_N21PIN_R24Push-button[0]DependingonJP7Push-button[1]DependingonJP7Push-button[2]DependingonJP7Push-button[3]DependingonJP7表3LED引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardLEDR[0]PIN_G19LEDR[1]PIN_F19LEDR[2]PIN_E19LEDRed[0]2.5VLEDRed[1]2.5VLEDRed[2]2.5VLEDRed[3]2.5VLEDRed[4]2.5VLEDR[3]PIN_F21LEDR[4]PIN_F18LEDR[5]PIN_E18LEDRed[5]2.5VLEDRed[6]2.5VLEDRed[7]2.5VLEDRed[8]2.5VLEDRed[9]2.5VLEDR[6]LEDR[7]LEDR[8]LEDR[9]PIN_J19PIN_H19PIN_J17PIN_G17LEDR[10]PIN_J15LEDR[11]PIN_H16LEDR[12]PIN_J16LEDR[13]PIN_H17LEDR[14]PIN_F15LEDR[15]PIN_G15LEDR[16]PIN_G16LEDR[17]PIN_H15LEDRed[10]2.5V2.5V2.5V2.5V2.5V2.5V2.5V2.5V2.5V2.5V2.5V2.5VLEDRed[11]LEDRed[12]LEDRed[13]LEDRed[14]LEDRed[15]LEDRed[16]LEDRed[17]LEDG[0]LEDG[1]LEDG[2]LEDG[3]PIN_E21PIN_E22PIN_E25PIN_E24LEDGreen[0]LEDGreen[1]LEDGreen[2]LEDGreen[3]LEDG[4]LEDG[5]LEDG[6]LEDG[7]LEDG[8]PIN_H21PIN_G20PIN_G22PIN_G21PIN_F17LEDGreen[4]2.5V2.5V2.5V2.5V2.5VLEDGreen[5]LEDGreen[6]LEDGreen[7]LEDGreen[8]表4七段数码管引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardHEX0[0]HEX0[1]HEX0[2]HEX0[3]HEX0[4]PIN_G18PIN_F22PIN_E17PIN_L26PIN_L25SevenSegmentDigit2.5V0[0]SevenSegmentDigit2.5V0[1]SevenSegmentDigit2.5V0[2]SevenSegmentDigitDependingon0[3]JP7SevenSegmentDigitDependingon0[4]JP7HEX0[5]PIN_J22SevenSegmentDigitDependingon0[5]JP7HEX0[6]PIN_H22SevenSegmentDigitDependingon0[6]JP7HEX1[0]PIN_M24SevenSegmentDigitDependingon1[0]JP7HEX1[1]PIN_Y22SevenSegmentDigitDependingon1[1]JP7HEX1[2]HEX1[3]HEX1[4]HEX1[5]PIN_W21PIN_W22PIN_W25PIN_U23SevenSegmentDigitDependingon1[2]JP7SevenSegmentDigitDependingon1[3]JP7SevenSegmentDigitDependingon1[4]JP7SevenSegmentDigitDependingon1[5]JP7HEX1[6]PIN_U24SevenSegmentDigitDependingon1[6]JP7HEX2[0]PIN_AA25SevenSegmentDigitDependingon2[0]JP7HEX2[1]PIN_AA26SevenSegmentDigitDependingon2[1]JP7HEX2[2]PIN_Y25SevenSegmentDigitDependingon2[2]JP7HEX2[3]PIN_W26SevenSegmentDigitDependingon2[3]JP7HEX2[4]PIN_Y26SevenSegmentDigitDependingon2[4]JP7HEX2[5]PIN_W27SevenSegmentDigitDependingon2[5]JP7HEX2[6]PIN_W28SevenSegmentDigitDependingon2[6]JP7HEX3[0]PIN_V21HEX3[1]PIN_U21SevenSegmentDigitDependingon3[0]JP7SevenSegmentDigitDependingon3[1]JP7HEX3[2]PIN_AB20SevenSegmentDigitDependingon3[2]JP6HEX3[3]PIN_AA21SevenSegmentDigitDependingon3[3]JP6HEX3[4]PIN_AD24SevenSegmentDigitDependingon3[4]JP6HEX3[5]PIN_AF23SevenSegmentDigitDependingon3[5]JP6HEX3[6]PIN_Y19SevenSegmentDigitDependingon3[6]JP6HEX4[0]PIN_AB19SevenSegmentDigitDependingon4[0]JP6HEX4[1]PIN_AA19SevenSegmentDigitDependingon4[1]JP6HEX4[2]PIN_AG21SevenSegmentDigitDependingon4[2]JP6HEX4[3]PIN_AH21SevenSegmentDigitDependingon4[3]JP6HEX4[4]PIN_AE19SevenSegmentDigitDependingon4[4]JP6HEX4[5]PIN_AF19SevenSegmentDigitDependingon4[5]JP6HEX4[6]PIN_AE18SevenSegmentDigitDependingon4[6]JP6HEX5[0]PIN_AD18SevenSegmentDigitDependingon5[0]JP6HEX5[1]PIN_AC18SevenSegmentDigitDependingon5[1]JP6HEX5[2]PIN_AB18SevenSegmentDigitDependingon5[2]JP6HEX5[3]PIN_AH19SevenSegmentDigitDependingon5[3]JP6HEX5[4]PIN_AG19SevenSegmentDigitDependingon5[4]JP6HEX5[5]PIN_AF18SevenSegmentDigitDependingon5[5]JP6HEX5[6]PIN_AH18SevenSegmentDigitDependingon5[6]JP6HEX6[0]PIN_AA17SevenSegmentDigitDependingon6[0]JP6HEX6[1]PIN_AB16SevenSegmentDigitDependingon6[1]JP6HEX6[2]PIN_AA16SevenSegmentDigitDependingon6[2]JP6HEX6[3]HEX6[4]HEX6[5]PIN_AB17SevenSegmentDigitDependingon6[3]JP6PIN_AB15SevenSegmentDigitDependingon6[4]JP6PIN_AA15SevenSegmentDigitDependingon6[5]JP6HEX6[6]PIN_AC17SevenSegmentDigitDependingon6[6]JP6HEX7[0]PIN_AD17SevenSegmentDigitDependingon7[0]JP6HEX7[1]PIN_AE17SevenSegmentDigitDependingon7[1]JP6HEX7[2]PIN_AG17SevenSegmentDigitDependingon7[2]JP6HEX7[3]PIN_AH17SevenSegmentDigitDependingon7[3]JP6HEX7[4]PIN_AF17SevenSegmentDigitDependingon7[4]JP6HEX7[5]PIN_AG18SevenSegmentDigitDependingon7[5]JP6HEX7[6]PIN_AA14SevenSegmentDigit3.3V7[6]表5时钟信号引脚配置信息SignalNameFPGAPinNo.DescriptionI/OStandardCLOCK_50PIN_Y250MHzclockinput3.3V3.3VCLOCK2_50PIN_AG1450MHzclockinputCLOCK3_50PIN_AG1550MHzclockinputDependingonJP6SMA_CLKOUTPIN_AE23External(SMA)clockoutputDependingonJP6SMA_CLKINPIN_AH14External(SMA)clockinput3.3V表6LCD模块引脚配置SignalNameFPGAPinNo.DescriptionI/OLCD_DATA[7]PIN_M5LCD_DATA[6]PIN_M3LCD_DATA[5]PIN_K2LCD_DATA[4]PIN_K1LCD_DATA[3]PIN_K7LCD_DATA[2]PIN_L2LCD_DATA[1]PIN_L1LCD_DATA[0]PIN_L3LCDData[7]LCDData[6]LCDData[5]LCDData[4]LCDData[3]LCDData[2]LCDData[1]LCDData[0]Standard3.3V3.3V3.3V3.3V3.3V3.3V3.3VLCD_ENLCD_RWPIN_L4PIN_M1LCDEnable3.3VLCDRead/WriteSelect,0=Write,1=3.3VReadLCD_RSPIN_M2LCDCommand/DataSelect,0=Command,1=Data3.3VLCD_ONPIN_L5PIN_L6LCDPowerON/OFF3.3V3.3VLCD_BLONLCDBackLightON/OFF表7HSMC接口引脚配置SignalNameFPGAPinDescriptionI/OStandardNo.HSMC_CLKIN0PIN_AH15DedicatedclockinputDependingonJP6HSMC_CLKIN_N1PIN_J28HSMC_CLKIN_N2PIN_Y28HSMC_CLKIN_P1PIN_J27HSMC_CLKIN_P2PIN_Y27LVDSRXorCMOSI/OorDependingondifferentialclockinputJP7LVDSRXorCMOSI/OorDependingondifferentialclockinputJP7LVDSRXorCMOSI/OorDependingondifferentialclockinputJP7LVDSRXorCMOSI/OorDependingondifferentialclockinputJP7HSMC_CLKOUT0PIN_AD28DedicatedclockoutputDependingonJP7HSMC_CLKOUT_N1PIN_G24HSMC_CLKOUT_N2PIN_V24HSMC_CLKOUT_P1PIN_G23LVDSTXorCMOSI/OorDependingondifferentialclockinput/outputJP7LVDSTXorCMOSI/OorDependingondifferentialclockinput/outputJP7LVDSTXorCMOSI/OorDependingondifferentialclockJP7input/outputHSMC_CLKOUT_P2PIN_V23LVDSTXorCMOSI/OorDependingondifferentialclockinput/outputJP7HSMC_D[0]HSMC_D[1]HSMC_D[2]HSMC_D[3]PIN_AE26PIN_AE28PIN_AE27PIN_AF27LVDSTXorCMOSI/OLVDSTXorCMOSI/OLVDSTXorCMOSI/OLVDSTXorCMOSI/ODependingonJP7DependingonJP7DependingonJP7DependingonJP7HSMC_RX_D_N[0]PIN_F25HSMC_RX_D_N[1]PIN_C27HSMC_RX_D_N[2]PIN_E26HSMC_RX_D_N[3]PIN_G26HSMC_RX_D_N[4]PIN_H26HSMC_RX_D_N[5]PIN_K26HSMC_RX_D_N[6]PIN_L24HSMC_RX_D_N[7]PIN_M26HSMC_RX_D_N[8]PIN_R26LVDSRXbit0norCMOSDependingonI/OJP7LVDSRXbit1norCMOSDependingonI/OJP7LVDSRXbit2norCMOSDependingonI/OJP7LVDSRXbit3norCMOSDependingonI/OJP7LVDSRXbit4norCMOSDependingonI/OJP7LVDSRXbit5norCMOSDependingonI/OJP7LVDSRXbit6norCMOSDependingonI/OJP7LVDSRXbit7norCMOSDependingonI/OJP7LVDSRXbit8norCMOSDependingonI/OJP7HSMC_RX_D_N[9]PIN_T26HSMC_RX_D_N[10]PIN_U26HSMC_RX_D_N[11]PIN_L22HSMC_RX_D_N[12]PIN_N26HSMC_RX_D_N[13]PIN_P26HSMC_RX_D_N[14]PIN_R21HSMC_RX_D_N[15]PIN_R23HSMC_RX_D_N[16]PIN_T22HSMC_RX_D_P[0]PIN_F24HSMC_RX_D_P[1]PIN_D26HSMC_RX_D_P[2]PIN_F26HSMC_RX_D_P[3]PIN_G25HSMC_RX_D_P[4]PIN_H25HSMC_RX_D_P[5]PIN_K25HSMC_RX_D_P[6]PIN_L23LVDSRXbit9norCMOSDependingonI/OJP7LVDSRXbit10norCMOSDependingonI/OJP7LVDSRXbit11norCMOSDependingonI/OJP7LVDSRXbit12norCMOSDependingonI/OJP7LVDSRXbit13norCMOSDependingonI/OJP7LVDSRXbit14norCMOSDependingonI/OJP7LVDSRXbit15norCMOSDependingonI/OJP7LVDSRXbit16norCMOSDependingonI/OJP7LVDSRXbit0orCMOSDependingonI/OJP7LVDSRXbit1orCMOSI/ODependingonJP7LVDSRXbit2orCMOSDependingonI/OJP7LVDSRXbit3orCMOSDependingonI/OJP7LVDSRXbit4orCMOSDependingonI/OJP7LVDSRXbit5orCMOSI/ODependingonJP7LVDSRXbit6orCMOSDependingonI/OJP7HSMC_RX_D_P[7]PIN_M25HSMC_RX_D_P[8]PIN_R25HSMC_RX_D_P[9]PIN_T25HSMC_RX_D_P[10]PIN_U25HSMC_RX_D_P[11]PIN_L21HSMC_RX_D_P[12]PIN_N25HSMC_RX_D_P[13]PIN_P25HSMC_RX_D_P[14]PIN_P21HSMC_RX_D_P[15]PIN_R22HSMC_RX_D_P[16]PIN_T21HSMC_TX_D_N[0]PIN_D28HSMC_TX_D_N[1]PIN_E28HSMC_TX_D_N[2]PIN_F28HSMC_TX_D_N[3]PIN_G28HSMC_TX_D_N[4]PIN_K28LVDSRXbit7orCMOSI/ODependingonJP7LVDSRXbit8orCMOSI/ODependingonJP7LVDSRXbit9orCMOSI/ODependingonJP7LVDSRXbit10orCMOSDependingonI/OJP7LVDSRXbit11orCMOSDependingonI/OJP7LVDSRXbit12orCMOSDependingonI/OJP7LVDSRXbit13orCMOSDependingonI/OJP7LVDSRXbit14orCMOSDependingonI/OJP7LVDSRXbit15orCMOSDependingonI/OJP7LVDSRXbit16orCMOSDependingonI/OJP7LVDSTXbit0norCMOSDependingonI/OJP7LVDSTXbit1norCMOSDependingonI/OJP7LVDSTXbit2norCMOSDependingonI/OJP7LVDSTXbit3norCMOSDependingonI/OJP7LVDSTXbit4norCMOSDependingonI/OJP7HSMC_TX_D_N[5]PIN_M28HSMC_TX_D_N[6]PIN_K22HSMC_TX_D_N[7]PIN_H24HSMC_TX_D_N[8]PIN_J24HSMC_TX_D_N[9]PIN_P28HSMC_TX_D_N[10]PIN_J26HSMC_TX_D_N[11]PIN_L28HSMC_TX_D_N[12]PIN_V26HSMC_TX_D_N[13]PIN_R28HSMC_TX_D_N[14]PIN_U28HSMC_TX_D_N[15]PIN_V28HSMC_TX_D_N[16]PIN_V22HSMC_TX_D_P[0]PIN_D27HSMC_TX_D_P[1]PIN_E27HSMC_TX_D_P[2]PIN_F27LVDSTXbit5norCMOSDependingonI/OJP7LVDSTXbit6norCMOSDependingonI/OJP7LVDSTXbit7norCMOSDependingonI/OJP7LVDSTXbit8norCMOSDependingonI/OJP7LVDSTXbit9norCMOSDependingonI/OJP7LVDSTXbit10norCMOSDependingonI/OJP7LVDSTXbit11norCMOSDependingonI/OJP7LVDSTXbit12norCMOSDependingonI/OJP7LVDSTXbit13norCMOSDependingonI/OJP7LVDSTXbit14norCMOSDependingonI/OJP7LVDSTXbit15norCMOSDependingonI/OJP7LVDSTXbit16norCMOSDependingonI/OJP7LVDSTXbit0orCMOSI/ODependingonJP7LVDSTXbit1orCMOSI/ODependingonJP7LVDSTXbit2orCMOSI/ODependingonJP7HSMC_TX_D_P[3]PIN_G27HSMC_TX_D_P[4]PIN_K27HSMC_TX_D_P[5]PIN_M27HSMC_TX_D_P[6]PIN_K21HSMC_TX_D_P[7]PIN_H23HSMC_TX_D_P[8]PIN_J23HSMC_TX_D_P[9]PIN_P27HSMC_TX_D_P[10]PIN_J25HSMC_TX_D_P[11]PIN_L27HSMC_TX_D_P[12]PIN_V25HSMC_TX_D_P[13]PIN_R27HSMC_TX_D_P[14]PIN_U27HSMC_TX_D_P[15]PIN_V27HSMC_TX_D_P[16]PIN_U22表8GPIO引脚配置信息LVDSTXbit3orCMOSI/ODependingonJP7LVDSTXbit4orCMOSI/ODependingonJP7LVDSTXbit5orCMOSI/ODependingonJP7LVDSTXbit6orCMOSI/ODependingonJP7LVDSTXbit7orCMOSDependingonI/OJP7LVDSTXbit8orCMOSI/ODependingonJP7LVDSTXbit9orCMOSI/ODependingonJP7LVDSTXbit10orCMOSDependingonI/OJP7LVDSTXbit11orCMOSDependingonI/OJP7LVDSTXbit12orCMOSDependingonI/OJP7LVDSTXbit13orCMOSDependingonI/OJP7LVDSTXbit14orCMOSDependingonI/OJP7LVDSTXbit15orCMOSDependingonI/OJP7LVDSTXbit16orCMOSDependingonI/OJP7SignalFPGAPinNo.DescriptionI/OStandardNameGPIO[0]PIN_AB22PIN_AC15PIN_AB21PIN_Y17GPIOConnectionDATA[0]DependingonJP6GPIO[1]GPIO[2]GPIO[3]GPIO[4]GPIO[5]GPIO[6]GPIO[7]GPIO[8]GPIO[9]GPIO[10]GPIO[11]GPIO[12]GPIO[13]GPIOConnectionDATA[1]DependingonJP6GPIOConnectionDATA[2]DependingonJP6GPIOConnectionDATA[3]DependingonJP6PIN_AC21PIN_Y16GPIOConnectionDATA[4]DependingonJP6GPIOConnectionDATA[5]DependingonJP6PIN_AD21PIN_AE16PIN_AD15PIN_AE15PIN_AC19PIN_AF16PIN_AD19PIN_AF15GPIOConnectionDATA[6]DependingonJP6GPIOConnectionDATA[7]DependingonJP6GPIOConnectionDATA[8]DependingonJP6GPIOConnectionDATA[9]DependingonJP6GPIOConnectionDATA[10]DependingonJP6GPIOConnectionDATA[11]DependingonJP6GPIOConnectionDATA[12]DependingonJP6GPIOConnectionDATA[13]DependingonJP6GPIO[14]PIN_AF24GPIOConnectionDependingonDATA[14]JP6GPIO[15]GPIO[16]GPIO[17]GPIO[18]GPIO[19]GPIO[20]GPIO[21]GPIO[22]GPIO[23]GPIO[24]GPIO[25]GPIO[26]GPIO[27]GPIO[28]GPIO[29]PIN_AE21PIN_AF25PIN_AC22PIN_AE22PIN_AF21PIN_AF22PIN_AD22PIN_AG25PIN_AD25PIN_AH25PIN_AE25PIN_AG22PIN_AE24PIN_AH22PIN_AF26GPIOConnectionDATA[15]DependingonJP6GPIOConnectionDATA[16]DependingonJP6GPIOConnectionDATA[17]DependingonJP6GPIOConnectionDATA[18]DependingonJP6GPIOConnectionDATA[19]DependingonJP6GPIOConnectionDATA[20]DependingonJP6GPIOConnectionDATA[21]DependingonJP6GPIOConnectionDATA[22]DependingonJP6GPIOConnectionDATA[23]DependingonJP6GPIOConnectionDATA[24]DependingonJP6GPIOConnectionDATA[25]DependingonJP6GPIOConnectionDATA[26]DependingonJP6GPIOConnectionDATA[27]DependingonJP6GPIOConnectionDATA[28]DependingonJP6GPIOConnectionDependingonDATA[29]JP6GPIO[30]PIN_AE20GPIOConnectionDATA[30]DependingonJP6GPIO[31]GPIO[32]GPIO[33]GPIO[34]GPIO[35]PIN_AG23PIN_AF20PIN_AH26PIN_AH23PIN_AG26GPIOConnectionDATA[31]DependingonJP6GPIOConnectionDATA[32]DependingonJP6GPIOConnectionDATA[33]DependingonJP6GPIOConnectionDATA[34]DependingonJP6GPIOConnectionDATA[35]DependingonJP6表9扩展接口引脚配置信息SignalNameEX_IO[0]EX_IO[1]EX_IO[2]EX_IO[3]EX_IO[4]EX_IO[5]EX_IO[6]FPGAPinNo.DescriptionI/OStandardPIN_J10PIN_J14PIN_H13PIN_H14PIN_F14PIN_E10PIN_D9ExtendedIO[0]3.3VExtendedIO[1]3.3VExtendedIO[2]3.3VExtendedIO[3]3.3VExtendedIO[4]3.3VExtendedIO[5]3.3VExtendedIO[6]3.3V表10ADV7123引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardVGA_R[0]VGA_R[1]PIN_E12PIN_E11VGARed[0]VGARed[1]3.3V3.3VVGA_R[2]VGA_R[3]VGA_R[4]VGA_R[5]VGA_R[6]VGA_R[7]VGA_G[0]VGA_G[1]VGA_G[2]VGA_G[3]VGA_G[4]VGA_G[5]VGA_G[6]VGA_G[7]VGA_B[0]VGA_B[1]VGA_B[2]VGA_B[3]VGA_B[4]VGA_B[5]VGA_B[6]VGA_B[7]VGA_CLKPIN_D10PIN_F12PIN_G10PIN_J12PIN_H8VGARed[2]VGARed[3]VGARed[4]VGARed[5]VGARed[6]VGARed[7]3.3V3.3V3.3V3.3V3.3V3.3VPIN_H10PIN_G8VGAGreen[0]3.3VVGAGreen[1]3.3VVGAGreen[2]3.3VVGAGreen[3]3.3VVGAGreen[4]3.3VVGAGreen[5]3.3VVGAGreen[6]3.3VVGAGreen[7]3.3VPIN_G11PIN_F8PIN_H12PIN_C8PIN_B8PIN_F10PIN_C9PIN_B10PIN_A10PIN_C11PIN_B11PIN_A11PIN_C12PIN_D11PIN_D12PIN_A12VGABlue[0]VGABlue[1]VGABlue[2]VGABlue[3]VGABlue[4]VGABlue[5]VGABlue[6]VGABlue[7]VGAClock3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VVGA_BLANK_NVGA_HSPIN_F11PIN_G13PIN_C13PIN_C10VGABLANKVGAH_SYNCVGAV_SYNCVGASYNC3.3V3.3V3.3V3.3VVGA_VSVGA_SYNC_N表11音频编解码芯片引脚配置SignalNameFPGAPinNo.DescriptionI/OStandard3.3VAUD_ADCLRCKPIN_C2PIN_D2AudioCODECADCLRClockAUD_ADCDATAudioCODECADCData3.3V3.3VAUD_DACLRCKPIN_E3AudioCODECDACLRClockAUD_DACDATAUD_XCKPIN_D1PIN_E1PIN_F2AudioCODECDACData3.3VAudioCODECChipClock3.3VAUD_BCLKAudioCODECBit-Stream3.3VClockI2C_SCLKI2C_SDATPIN_B7PIN_A8I2CClockI2CData3.3V3.3V表12RS-232引脚配置SignalNameUART_RXDUART_TXDUART_CTSUART_RTSFPGAPinNo.DescriptionI/OStandard3.3VPIN_G12PIN_G9UARTReceiverUARTTransmitterUARTCleartoSend3.3VPIN_G14PIN_J133.3VUARTRequesttoSend3.3V表13PS/2引脚配置SignalNameFPGAPinNo.DescriptionI/OStandard3.3VPS2_CLKPS2_DATPS2_CLK2PIN_G6PIN_H5PIN_G5PS/2ClockPS/2Data3.3VPS/2Clock(reservedforsecondPS/2device)3.3VPS2_DAT2PIN_F5PS/2Data(reservedforsecondPS/2device)3.3V表14千兆以太网芯片引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardENET0_GTX_CLKENET0_INT_NPIN_A17PIN_A21PIN_C14GMIITransmitClock12.5VInterruptopendrainoutput12.5VENET0_LINK100ParallelLEDoutputof100BASE-TXlink13.3V2.5VENET0_MDCPIN_C20Managementdataclockreference1ENET0_MDIOPIN_B21PIN_C19PIN_A15PIN_E15PIN_D15Managementdata12.5V2.5VENET0_RST_NENET0_RX_CLKENET0_RX_COLENET0_RX_CRSHardwareresetsignal1GMIIandMIIreceiveclock12.5VGMIIandMIIcollision12.5VGMIIandMIIcarriersense12.5VENET0_RX_DATA[0]PIN_C16ENET0_RX_DATA[1]PIN_D16ENET0_RX_DATA[2]PIN_D17GMIIandMIIreceivedata[0]2.5V1GMIIandMIIreceivedata[1]2.5V1GMIIandMIIreceivedata[2]2.5V1ENET0_RX_DATA[3]PIN_C15GMIIandMIIreceivedata[3]2.5V1ENET0_RX_DVPIN_C17GMIIandMIIreceivedatavalid12.5VENET0_RX_ERENET0_TX_CLKPIN_D18PIN_B17GMIIandMIIreceiveerror12.5VMIItransmitclock1MIItransmitdata[0]1MIItransmitdata[1]1MIItransmitdata[2]1MIItransmitdata[3]12.5V2.5V2.5V2.5V2.5VENET0_TX_DATA[0]PIN_C18ENET0_TX_DATA[1]PIN_D19ENET0_TX_DATA[2]PIN_A19ENET0_TX_DATA[3]PIN_B19ENET0_TX_ENPIN_A18GMIIandMIItransmitenable2.5V1ENET0_TX_ERENET1_GTX_CLKENET1_INT_NENET1_LINK100PIN_B18PIN_C23PIN_D24PIN_D13GMIIandMIItransmiterror12.5VGMIITransmitClock22.5VInterruptopendrainoutput22.5VParallelLEDoutputof100BASE-TXlink22.5V2.5VENET1_MDCPIN_D23Managementdataclockreference2ENET1_MDIOPIN_D25PIN_D22PIN_B15PIN_B22PIN_D20Managementdata22.5V2.5VENET1_RST_NENET1_RX_CLKENET1_RX_COLENET1_RX_CRSHardwareresetsignal2GMIIandMIIreceiveclock22.5VGMIIandMIIcollision22.5VGMIIandMIIcarriersense22.5VENET1_RX_DATA[0]PIN_B23GMIIandMIIreceivedata[0]2.5V2ENET1_RX_DATA[1]PIN_C21ENET1_RX_DATA[2]PIN_A23ENET1_RX_DATA[3]PIN_D21GMIIandMIIreceivedata[1]2.5V2GMIIandMIIreceivedata[2]2.5V2GMIIandMIIreceivedata[3]2.5V2ENET1_RX_DVPIN_A22GMIIandMIIreceivedatavalid22.5VENET1_RX_ERENET1_TX_CLKPIN_C24PIN_C22GMIIandMIIreceiveerror22.5VMIItransmitclock2MIItransmitdata[0]2MIItransmitdata[1]2MIItransmitdata[2]2MIItransmitdata[3]22.5V2.5V2.5V2.5V2.5VENET1_TX_DATA[0]PIN_C25ENET1_TX_DATA[1]PIN_A26ENET1_TX_DATA[2]PIN_B26ENET1_TX_DATA[3]PIN_C26ENET1_TX_ENPIN_B25GMIIandMIItransmitenable2.5V2ENET1_TX_ERENETCLK_25PIN_A25PIN_A14GMIIandMIItransmiterror22.5VEthernetclocksource3.3V表15TV解码芯片引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardTD_DATA[0]PIN_E8TD_DATA[1]PIN_A7TD_DATA[2]PIN_D8TD_DATA[3]PIN_C7TD_DATA[4]PIN_D7TVDecoderData[0]3.3V3.3V3.3V3.3V3.3VTVDecoderData[1]TVDecoderData[2]TVDecoderData[3]TVDecoderData[4]TD_DATA[5]PIN_D6TD_DATA[6]PIN_E7TD_DATA[7]PIN_F7TVDecoderData[5]TVDecoderData[6]TVDecoderData[7]TVDecoderH_SYNCTVDecoderV_SYNC3.3V3.3V3.3V3.3V3.3V3.3VTD_HSPIN_E5PIN_E4PIN_B14TD_VSTD_CLK27TVDecoderClockInput.TD_RESET_NPIN_G7TVDecoderResetI2CClock3.3V3.3V3.3VI2C_SCLKI2C_SDATPIN_B7PIN_A8I2CData表16USB(ISP1362)引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardOTG_ADDR[0]OTG_ADDR[1]OTG_DATA[0]OTG_DATA[1]OTG_DATA[2]OTG_DATA[3]OTG_DATA[4]OTG_DATA[5]OTG_DATA[6]OTG_DATA[7]OTG_DATA[8]PIN_H7PIN_C3PIN_J6PIN_K4PIN_J5PIN_K3PIN_J4PIN_J3PIN_J7PIN_H6PIN_H3ISP1362Address[0]ISP1362Address[1]ISP1362Data[0]ISP1362Data[1]ISP1362Data[2]ISP1362Data[3]ISP1362Data[4]ISP1362Data[5]ISP1362Data[6]ISP1362Data[7]ISP1362Data[8]3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VOTG_DATA[9]PIN_H4ISP1362Data[9]ISP1362Data[10]ISP1362Data[11]ISP1362Data[12]ISP1362Data[13]ISP1362Data[14]ISP1362Data[15]ISP1362ChipSelectISP1362Read3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VOTG_DATA[10]PIN_G1OTG_DATA[11]PIN_G2OTG_DATA[12]PIN_G3OTG_DATA[13]PIN_F1OTG_DATA[14]PIN_F3OTG_DATA[15]PIN_G4OTG_CS_NOTG_RD_NOTG_WR_NOTG_RST_NOTG_INT[0]OTG_INT[1]PIN_A3PIN_B3PIN_A4PIN_C5PIN_A6PIN_D5ISP1362WriteISP1362ResetISP1362Interrupt0ISP1362Interrupt1OTG_DACK_N[0]PIN_C4OTG_DACK_N[1]PIN_D4ISP1362DMAAcknowledge03.3VISP1362DMAAcknowledge13.3VOTG_DREQ[0]OTG_DREQ[1]OTG_FSPEEDPIN_J1PIN_B4PIN_C6ISP1362DMARequest0ISP1362DMARequest13.3V3.3VUSBFullSpeed,0=Enable,Z3.3V=DisableOTG_LSPEEDPIN_B6USBLowSpeed,0=Enable,Z3.3V=Disable表17IR引脚配置SignalNameFPGAPinNo.DescriptionPIN_Y15IRReceiverI/OStandard3.3VIRDA_RXD表18SRAM引脚配置SignalNameFPGAPinNo.DescriptionI/OStandard3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VSRAM_ADDR[0]SRAM_ADDR[1]SRAM_ADDR[2]SRAM_ADDR[3]SRAM_ADDR[4]SRAM_ADDR[5]SRAM_ADDR[6]SRAM_ADDR[7]SRAM_ADDR[8]SRAM_ADDR[9]PIN_AB7PIN_AD7PIN_AE7PIN_AC7PIN_AB6PIN_AE6PIN_AB5PIN_AC5PIN_AF5PIN_T7SRAMAddress[0]SRAMAddress[1]SRAMAddress[2]SRAMAddress[3]SRAMAddress[4]SRAMAddress[5]SRAMAddress[6]SRAMAddress[7]SRAMAddress[8]SRAMAddress[9]SRAMAddress[10]SRAMAddress[11]SRAMAddress[12]SRAMAddress[13]SRAMAddress[14]SRAMAddress[15]SRAMAddress[16]SRAMAddress[17]SRAMAddress[18]SRAM_ADDR[10]PIN_AF2SRAM_ADDR[11]PIN_AD3SRAM_ADDR[12]PIN_AB4SRAM_ADDR[13]PIN_AC3SRAM_ADDR[14]PIN_AA4SRAM_ADDR[15]PIN_AB11SRAM_ADDR[16]PIN_AC11SRAM_ADDR[17]PIN_AB9SRAM_ADDR[18]PIN_AB8SRAM_ADDR[19]PIN_T8SRAMAddress[19]3.3VSRAM_DQ[0]PIN_AH3SRAMData[0]3.3VSRAM_DQ[1]SRAM_DQ[2]SRAM_DQ[3]SRAM_DQ[4]SRAM_DQ[5]SRAM_DQ[6]SRAM_DQ[7]SRAM_DQ[8]SRAM_DQ[9]SRAM_DQ[10]SRAM_DQ[11]SRAM_DQ[12]SRAM_DQ[13]SRAM_DQ[14]SRAM_DQ[15]SRAM_OE_NSRAM_WE_NSRAM_CE_NSRAM_LB_NPIN_AF4PIN_AG4PIN_AH4PIN_AF6PIN_AG6PIN_AH6PIN_AF7PIN_AD1PIN_AD2PIN_AE2PIN_AE1PIN_AE3PIN_AE4PIN_AF3PIN_AG3PIN_AD5PIN_AE8PIN_AF8PIN_AD4SRAMData[1]SRAMData[2]SRAMData[3]SRAMData[4]SRAMData[5]SRAMData[6]SRAMData[7]SRAMData[8]SRAMData[9]SRAMData[10]SRAMData[11]SRAMData[12]SRAMData[13]SRAMData[14]SRAMData[15]SRAMOutputEnableSRAMWriteEnableSRAMChipSelect3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VSRAMLowerByteStrobeSRAM_UB_NPIN_AC4SRAMHigherByteStrobe表19SDRAM引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardDRAM_ADDR[0]DRAM_ADDR[1]DRAM_ADDR[2]DRAM_ADDR[3]DRAM_ADDR[4]PIN_R6PIN_V8PIN_U8PIN_P1PIN_V5SDRAMAddress[0]SDRAMAddress[1]SDRAMAddress[2]SDRAMAddress[3]SDRAMAddress[4]SDRAMAddress[5]SDRAMAddress[6]SDRAMAddress[7]SDRAMAddress[8]SDRAMAddress[9]SDRAMAddress[10]SDRAMAddress[11]SDRAMAddress[12]SDRAMData[0]3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VDRAM_ADDR[5]PIN_W8DRAM_ADDR[6]DRAM_ADDR[7]DRAM_ADDR[8]DRAM_ADDR[9]PIN_W7PIN_AA7PIN_Y5PIN_Y6DRAM_ADDR[10]PIN_R5DRAM_ADDR[11]PIN_AA5DRAM_ADDR[12]PIN_Y7DRAM_DQ[0]DRAM_DQ[1]DRAM_DQ[2]DRAM_DQ[3]DRAM_DQ[4]DRAM_DQ[5]DRAM_DQ[6]DRAM_DQ[7]DRAM_DQ[8]DRAM_DQ[9]PIN_W3PIN_W2PIN_V4PIN_W1PIN_V3PIN_V2PIN_V1PIN_U3PIN_Y3PIN_Y4SDRAMData[1]SDRAMData[2]SDRAMData[3]SDRAMData[4]SDRAMData[5]SDRAMData[6]SDRAMData[7]SDRAMData[8]SDRAMData[9]DRAM_DQ[10]DRAM_DQ[11]DRAM_DQ[12]DRAM_DQ[13]DRAM_DQ[14]DRAM_DQ[15]SRAM_OE_NSRAM_WE_NSRAM_CE_NPIN_AB1PIN_AA3PIN_AB2PIN_AC1PIN_AB3PIN_AC2PIN_AD5PIN_AE8PIN_AF8PIN_AD4SDRAMData[10]SDRAMData[11]SDRAMData[12]SDRAMData[13]SDRAMData[14]SDRAMData[15]SRAMOutputEnableSRAMWriteEnableSRAMChipSelect3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VSRAM_LB_NSRAMLowerByteStrobeSRAM_UB_NPIN_AC4SRAMHigherByteStrobe3.3V表20SDRAM引脚配置SignalNameFPGAPinNo.DescriptionI/OStandardDRAM_ADDR[0]DRAM_ADDR[1]DRAM_ADDR[2]DRAM_ADDR[3]DRAM_ADDR[4]DRAM_ADDR[5]DRAM_ADDR[6]DRAM_ADDR[7]DRAM_ADDR[8]PIN_R6PIN_V8PIN_U8PIN_P1PIN_V5PIN_W8PIN_W7PIN_AA7PIN_Y5SDRAMAddress[0]3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VSDRAMAddress[1]SDRAMAddress[2]SDRAMAddress[3]SDRAMAddress[4]SDRAMAddress[5]SDRAMAddress[6]SDRAMAddress[7]SDRAMAddress[8]DRAM_ADDR[9]PIN_Y6SDRAMAddress[9]SDRAMAddress[10]SDRAMAddress[11]SDRAMAddress[12]SDRAMData[0]SDRAMData[1]SDRAMData[2]SDRAMData[3]SDRAMData[4]SDRAMData[5]SDRAMData[6]SDRAMData[7]SDRAMData[8]SDRAMData[9]SDRAMData[10]SDRAMData[11]SDRAMData[12]SDRAMData[13]SDRAMData[14]SDRAMData[15]SDRAMData[16]SDRAMData[17]SDRAMData[18]3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3V3.3VDRAM_ADDR[10]PIN_R5DRAM_ADDR[11]PIN_AA5DRAM_ADDR[12]PIN_Y7DRAM_DQ[0]DRAM_DQ[1]DRAM_DQ[2]DRAM_DQ[3]DRAM_DQ[4]DRAM_DQ[5]DRAM_DQ[6]DRAM_DQ[7]DRAM_DQ[8]DRAM_DQ[9]DRAM_DQ[10]DRAM_DQ[11]DRAM_DQ[12]DRAM_DQ[13]DRAM_DQ[14]DRAM_DQ[15]DRAM_DQ[16]DRAM_DQ[17]DRAM_DQ[18]PIN_W3PIN_W2PIN_V4PIN_W1PIN_V3PIN_V2PIN_V1PIN_U3PIN_Y3PIN_Y4PIN_AB1PIN_AA3PIN_AB2PIN_AC1PIN_AB3PIN_AC2PIN_M8PIN_L8PIN_P2DRAM_DQ[19]DRAM_DQ[20]DRAM_DQ[21]DRAM_DQ[22]DRAM_DQ[23]DRAM_DQ[24]DRAM_DQ[25]DRAM_DQ[26]DRAM_DQ[27]DRAM_DQ[28]DRAM_DQ[29]DRAM_DQ[30]DRAM_DQ[31]DRAM_BA[0]PIN