听课报告第12次学习

Lecture22:MemoryDRAMController:服务于DRAM的请求，同时遵循DRAM的时序约channel，Bufferandschedulerequeststoforhighperformance+DRAM打开/关闭DRAM，管理功率模DRAMController:Whereto在CPU更少的功率密在CPU AModernDRAMDRAMSchedulingPoliciesFCFS（firstcomefirstFR-FCFS(firstready,firstcomefirst目标：行缓冲区最大化->最大化DRAM的数据吞吐DRAMSchedulingPolicies请求类型（预取、、写入OldestmissintheRowBufferManagementOpen不足：下一次也许需要不同的行->行、浪费功Closed在一次后关闭AdaptiveOpenvs.ClosedRow ,bus,channel,DRAMProblem:QoS-UnawareMemoryDRAM控制器没有DRAM系统中线程间的干FR-FCFS:1)row-hitfirst,2)oldestSolution:QoS-AwareMemoryRequestHowDoWeSolvetheStall-timefairmemory：目标主器的进程相比他们各自单独运行时应该经历相似的->公平的调：Stall-TimeFairnessinSharedDRAMslowdownMemory-slowdown=stall-timeSTFMProsandmemoryslowdownbankBut,thiscancausePAR-BSProsandFirstschedulertoaddressbankparallelismdestructionacrossmultipleBatchingRankingparallelismThreadClusterMemory将进程集合成两个针对每个clusterTCMProsand迎合了不同类型进程的需求（latencyvsbandwidthClusteringshufflingLecture23:MemoryOverview:MemoryChannelPartitioning根据器强度的高低将应用程序进行区分IntegratedMemoryPartitioningandSchedulingMCPMemoryChannelPartitioningOnlyprofilingcountersin对器调度逻辑不需要修对于24核、4通道系统，花费1.5KB容IntegratedMemoryPartitioningandSchedulingbitSourceThrottling:AFairness动态估算器系统中相应地降低对器速降低造成性 FairnessviaSourceThrottling(FST)Core(Source) 共享带 通过将“共生的应用程序”调度在一起可以消除/最小化而不仅仅是管理HandlingInterferenceinParallelEstimatelimiterthreadslikelytobeonthecriticalpathandprioritizetheirrequests;shuffleprioritiesofnon-limiterthreadstoreducememoryinterferenceamongthem硬件/limiterthreadDRAMPowerDRAM有功率模bank状态转换产生时延，这之间不能Distributed还能如何减少刷新对性能和QoSReducingDRAMRefresh（成本意识）思路：Bintherowsaccordingtotheirminimumretentiontimesandrefreshrowsineachbinattherefreshratespecifiedforthebin观察：只有很少的行需要频繁地刷新[64-128ms]->Haveonlyafewbins->只需要较少硬Lecture24:SimulationandMemoryLatencyWhyHigh-LevelDifferentGoalsinHigh-LevelWhyareDRAMControllersDifficulttoDRAMDRAMControllerDesign ingMoreRealityandSelf-OptimizingDRAM问题：DRAM控制器很难做出设计->设计者很难设计一条准则来使它适应不同的工作量观察 mentlearningmapsnicelytomemory 控制器是一个加固的学习agent，它能够动态地、连续地学习掌握最佳的调StallsduetoLong-Latency当一个长延迟指令还没有完成的时候，它会阻碍指令retirement，因为我们需要确Full-windowStallHowDoWeTolerateStallsDuetoMemoryLevelParallelismRunaheadrunahead模式中，预先提前执行指令，预执行的目的是去产生预提取，L2-miss独立INVmiss返回时，runaheadBenefitsofRunaheadInstructionProcessinginRunahead的话，架构寄存器/状态将不会更新。L2-missdependentinstructionsRemovalofInstructionsfromAnINVinstructionAVALIDinstructionPseudo-retiredstorescommunicatetheirdatatodependentStore/LoadHandlinginRunaheadpseudo-retiredstore会把数据和INV写入到一个的器中，这个器叫runaheadAdependentloadreadsitsdatafromtherunaheadBranchHandli