交通灯控制电路设计及仿真

-.z交通灯控制电路设计与仿真一、实验目的1、了解交通灯的燃灭规律。2、了解交通灯控制器的工作原理。3、熟悉VHDL语言编程，了解实际设计中的优化方案。二、实验原理交通灯的显示有很多方式，如十字路口、丁字路口等，而对于同一个路口又有很多不同的显示要求，比方十字路口，车辆如果只要东西和南北方向通行就很简单，而如果车子可以左右转弯的通行就比拟复杂，本实验仅针对最简单的南北和东西直行的情况。要完本钱实验，首先必须了解交通路灯的燃灭规律。本实验需要用到实验箱上交通灯模块中的发光二极管，即红、黄、绿各三个。依人们的交通常规，“红灯停，绿灯行，黄灯提醒〞。其交通的燃灭规律为：初始态是两个路口的红灯全亮，之后，东西路口的绿灯亮，南北路口的红灯亮，东西方向通车，延时一段时间后，东西路口绿灯灭，黄灯开场闪烁。闪烁假设干次后，东西路口红灯亮，而同时南北路口的绿灯亮，南北方向开场通车，延时一段时间后，南北路口的绿灯灭，黄灯开场闪烁。闪烁假设干次后，再切换到东西路口方向，重复上述过程。在实验中使用8个七段码管中的任意两个数码管显示时间。东西路和南北路的通车时间均设定为20s。数码管的时间总是显示为19、18、17……2、1、0、19、18……。在显示时间小于3秒的时候，通车方向的黄灯闪烁。三、实验内容本实验要完成任务就是设计一个简单的交通灯控制器，交通灯显示用实验箱的交通灯模块和七段码管中的任意两个来显示。系统时钟选择时钟模块的1KHz时钟，黄灯闪烁时钟要求为2Hz，七段码管的时间显示为1Hz脉冲，即每1s中递减一次，在显示时间小于3秒的时候，通车方向的黄灯以2Hz的频率闪烁。系统中用S1按键进展复位。实验箱中用到的数字时钟模块、按键开关、数码管与FPGA的接口电路，以及数字时钟源、按键开关、数码管与FPGA的管脚连接在以前的实验中都做了详细说明，这里不在赘述。交通灯模块原理与LED灯模块的电路原理一致，当有高电平输入时LED灯就会被点亮，反之不亮。只是LED发出的光有颜色之分。其与FPGA的管脚连接如下表19-1所示：四、实验步骤1、翻开QUARTUSII软件，新建一个工程。2、建完工程之后，再新建一个VHDLFile，翻开VHDL编辑器对话框。3、按照实验原理和自己的想法，在VHDL编辑窗口编写VHDL程序，用户可参照光盘中提供的例如程序。4、编写完VHDL程序后，保存起来。〔1〕-jtdkz.vhdlibraryieee;useieee.std_logic_1164.all;entityjtdkzisport(clk,sm,sb:instd_logic;mr,my0,mg0,br,by0,bg0:outstd_logic);endentityjtdkz;architectureartofjtdkzistypestate_typeis(A,B,C,D);signalstate:state_type;begint:process(clk)isvariables:integerrange0to45;variableclr,en:bit;beginif(clk'eventandclk='1')thenifclr='0'thens:=0;elsifen='0'thens:=s;elses:=s+1;endif;casestateiswhenA=>mr<='0';my0<='0';mg0<='1';br<='1';by0<='0';bg0<='0';if(sbandsm)='1'thenifs=45thenstate<= B;clr:='0';en:='0';elsestate<=A;clr:='1';en:='1';endif;elsif(sband(notsm))='1'thenstate<=B;clr:='0';en:='0';elsestate<=A;clr:='1';en:='1';endif;whenB=>mr<='0';my0<='1';mg0<='0';br<='1';by0<='0';bg0<='0';ifs=5thenstate<=C;clr:='0';en:='0';elsestate<=B;clr:='1';en:='1';endif;whenC=>mr<='1';my0<='0';mg0<='0';br<='0';by0<='0';bg0<='1';if(sbandsm)='1'thenifs=25thenstate<= D;clr:='0';en:='0';elsestate<=C;clr:='1';en:='1';endif;elsifsb='0'thenstate<=D;clr:='0';en:='0';elsestate<=C;clr:='1';en:='1';endif;whenD=>mr<='1';my0<='0';mg0<='0';br<='0';by0<='1';bg0<='0';ifs=5thenstate<=A;clr:='0';en:='0';elsestate<=D;clr:='1';en:='1';endif;endcase;endif;endprocesst;endarchitectureart;(2)cskz.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycskzisport(ina:instd_logic;outa:outstd_logic);endentitycskz;architectureartofcskzisbeginprocess(ina)isbeginifina='1'thenouta<='1';elseouta<='0';endif;endprocess;endarchitectureart;(3)—t45s.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityt45sisport(sb,clk,en45:instd_logic;dout45m,dout45b:outstd_logic_vector(7downto0));endentityt45s;architectureartoft45sissignalt6b:std_logic_vector(5downto0);beginprocess(sb,clk,en45)isbeginifsb='0'thent6b<=t6b-t6b-1;elsif(clk'eventandclk='1')thenifen45='1'thent6b<=t6b+1;elsifen45='0'thent6b<=t6b-t6b-1;endif;endif;endprocess;process(t6b)isbegincaset6biswhen"000000"=>dout45m<="01000101";dout45b<="01010000";when"000001"=>dout45m<="01000100";dout45b<="01001001";when"000010"=>dout45m<="01000011";dout45b<="01001000";when"000011"=>dout45m<="01000010";dout45b<="01000111";when"000100"=>dout45m<="01000001";dout45b<="01000110";when"000101"=>dout45m<="01000000";dout45b<="01000101";when"000110"=>dout45m<="00111001";dout45b<="01000100";when"000111"=>dout45m<="00111000";dout45b<="01000011";when"001000"=>dout45m<="00110111";dout45b<="01000010";when"001001"=>dout45m<="00110110";dout45b<="01000001";when"001010"=>dout45m<="00110101";dout45b<="01000000";when"001011"=>dout45m<="00110100";dout45b<="01101001";when"001100"=>dout45m<="00110011";dout45b<="00111000";when"001101"=>dout45m<="00110010";dout45b<="00110111";when"001110"=>dout45m<="00110001";dout45b<="00110110";when"001111"=>dout45m<="00110000";dout45b<="00110101";when"010000"=>dout45m<="00101001";dout45b<="00110100";when"010001"=>dout45m<="00101000";dout45b<="00110011";when"010010"=>dout45m<="00100111";dout45b<="00110010";when"010011"=>dout45m<="00100110";dout45b<="00110001";when"010100"=>dout45m<="00100101";dout45b<="00110000";when"010101"=>dout45m<="00100100";dout45b<="00101001";when"010110"=>dout45m<="00100011";dout45b<="00101000";when"010111"=>dout45m<="00100010";dout45b<="00100111";when"011000"=>dout45m<="00100001";dout45b<="00100110";when"011001"=>dout45m<="00100000";dout45b<="00100101";when"011010"=>dout45m<="00011001";dout45b<="00100100";when"011011"=>dout45m<="00011000";dout45b<="00100011";when"011100"=>dout45m<="00010111";dout45b<="00100010";when"011101"=>dout45m<="00010110";dout45b<="00100001";when"011110"=>dout45m<="00010101";dout45b<="00100000";when"011111"=>dout45m<="00010100";dout45b<="00011001";when"100000"=>dout45m<="00010011";dout45b<="00011000";when"100001"=>dout45m<="00010010";dout45b<="00010111";when"100010"=>dout45m<="00010001";dout45b<="00010110";when"100011"=>dout45m<="00010000";dout45b<="00010101";when"100100"=>dout45m<="00001001";dout45b<="00010100";when"100101"=>dout45m<="00001000";dout45b<="00010011";when"100110"=>dout45m<="00000111";dout45b<="00010010";when"100111"=>dout45m<="00000110";dout45b<="00010001";when"101000"=>dout45m<="00000101";dout45b<="00010000";when"101001"=>dout45m<="00000100";dout45b<="00001001";when"101010"=>dout45m<="00000011";dout45b<="00001000";when"101011"=>dout45m<="00000010";dout45b<="00000111";when"101100"=>dout45m<="00000001";dout45b<="00000110";whenothers=>dout45m<="00000000";dout45b<="00000000";endcase;endprocess;endarchitectureart;(4)t05s.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityt05sisport(clk,en05m,en05b:instd_logic;dout5:outstd_logic_vector(7downto0));endentityt05s;architectureartoft05sissignalt3b:std_logic_vector(2downto0);beginprocess(clk,en05m,en05b)isbeginif(clk'eventandclk='1')thenifen05m='1'thent3b<=t3b+1;elsifen05b='1'thent3b<=t3b+1;elsifen05b='0'thent3b<=t3b-t3b-1;endif;endif;endprocess;process(t3b)isbegincaset3biswhen"000"=>dout5<="00000101";when"001"=>dout5<="00000100";when"010"=>dout5<="00000011";when"011"=>dout5<="00000010";when"100"=>dout5<="00000001";whenothers=>dout5<="00000000";endcase;endprocess;endarchitectureart;(5)—t25s.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityt25sisport(sb,sm,clk,en25:instd_logic;dout25m,dout25b:outstd_logic_vector(7downto0));endentityt25s;architectureartoft25sissignalt5b:std_logic_vector(4downto0);beginprocess(sb,sm,clk,en25)isbeginifsb='0'thent5b<=t5b-t5b-1;elsifsm='0'thent5b<=t5b-t5b-1;elsif(clk'eventandclk='1')thenifen25='1'thent5b<=t5b+1;elsifen25='0'thent5b<=t5b-t5b-1;endif;endif;endprocess;process(t5b)isbegincaset5biswhen"00000"=>dout25b<="00100101";dout25m<="00110000";when"00001"=>dout25b<="00100100";dout25m<="00101001";when"00010"=>dout25b<="00100011";dout25m<="00101000";when"00011"=>dout25b<="00100010";dout25m<="00100111";when"00100"=>dout25b<="00100001";dout25m<="00100110";when"00101"=>dout25b<="00100000";dout25m<="00100101";when"00110"=>dout25b<="00011001";dout25m<="00100100";when"00111"=>dout25b<="00011000";dout25m<="00100011";when"01000"=>dout25b<="00010111";dout25m<="00100010";when"01001"=>dout25b<="00010110";dout25m<="00100001";when"01010"=>dout25b<="00010101";dout25m<="00100000";when"01011"=>dout25b<="00010100";dout25m<="00011001";when"01100"=>dout25b<="00010011";dout25m<="00011000";when"01101"=>dout25b<="00010010";dout25m<="00010111";when"01110"=>dout25b<="00010001";dout25m<="00010110";when"01111"=>dout25b<="00010000";dout25m<="00010101";when"10000"=>dout25b<="00001001";dout25m<="00010100";when"10001"=>dout25b<="00001000";dout25m<="00010011";when"10010"=>dout25b<="00000111";dout25m<="00010010";when"10011"=>dout25b<="00000110";dout25m<="00010001";when"10100"=>dout25b<="00000101";dout25m<="00010000";when"10101"=>dout25b<="00000100";dout25m<="00010001";when"10110"=>dout25b<="00000011";dout25m<="00001000";when"10111"=>dout25b<="00000010";dout25m<="00000111";when"11000"=>dout25b<="00000001";dout25m<="00000110";whenothers=>dout25b<="00000000";dout25m<="00000000";endcase;endprocess;endarchitectureart;(6)—*skz.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entity*skzisport(en45,en25,en05m,en05b:instd_logic;ain45m,ain45b,ain25m,ain25b,ain05:instd_logic_vector(7downto0);doutm,doutb:outstd_logic_vector(7downto0));endentity*skz;architectureartof*skzisbeginprocess(en45,en25,en05m,en05b,ain45m,ain45b,ain25m,ain25b,ain05)isbeginifen45='1'thendoutm<=ain45m(7downto0);doutb<=ain45b(7downto0);elsifen05m='1'thendoutm<=ain05(7downto0);doutb<=ain05(7downto0);elsifen25='1'thendoutm<=ain25m(7downto0);doutb<=ain25b(7downto0);elsifen05b='1'thendoutm<=ain05(7downto0);doutb<=ain05(7downto0);endif;endprocess;endarchitectureart;(7)—ymq.vhdlibraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityymqisport(clk:instd_logic;ain41,ain42,ain43,ain44:instd_logic_vector(3downto0);del:outstd_logic_vector(2downto0);dout7:outstd_logic_vector(6downto0));endentityymq;architectureartofymqissignalain4:std_logic_vector(3downto0);signalt:std_logic_vector(2downto0);beginprocess(clk) begin ifclk'eventandclk='1'then ift="011"then t<="000"; else t<=t+1; endif; endif;endprocess;process(t,ain41,ain42,ain43,ain44) begin casetis when"000"=>ain4<=ain41;del<="111"; when"001"=>ain4<=ain42;del<="110"; when"010"=>ain4<=ain43;del<="101"; when"011"=>ain4<=ain44;del<="100"; when"100"=>ain4<=ain41;del<="000"; when"101"=>ain4<=ain41;del<="000"; when"110"=>ain4<=ain41;del<="000"; when"111"=>ain4<=ain41;del<="000"; endcase; endprocess;process(ain4)isbegincaseain4iswhen"0000"=>dout7<="0111111";when"0001"=>dout7<="0000110";when"0010"=>dout7<="1011011";when"0011"=>dout7<="1001111";when"0100"=>dout7<="1100110";when"0101"=>dout7<="1101101";when"0110"=>dout7<="1111101";when"0111"=>dout7<="0000111";when"1000"=>dout7<="1111111";when"1001"=>dout7<="1101111";whenothers=>dout7<="0000000";endcase;endprocess;endarchitectureart;(8)—jtkzq.vhdlibraryieee;useieee.std_logic_1164.all;entityjtkzqisport(clk,sm,sb:instd_logic;mr,mg,my,by,br,bg:outstd_logic;del1:outstd_logic_vector(2downto0);dout:outstd_logic_vector(6downto0));endentityjtkzq;architectureartofjtkzqisponentdiv_clkisport(clk:instd_logic; clk1:outstd_logic);endponentdiv_clk;ponentjtdkzisport(clk,sm,sb:instd_logic;mr,my0,mg0,br,by0,bg0:outstd_logic);endponentjtdkz;ponentcskzisport(ina:instd_logic;outa:outstd_logic);endponentcskz;ponentt45sisport(sb,clk,en45:instd_logic;dout45m,dout45b:outstd_logic_vector(7downto0));endponentt45s;ponentt05sisport(clk,en05m,en05b:instd_logic;dout5:outstd_logic_vector(7downto0));endponentt05s;ponentt25sisport(sb,sm,clk,en25:instd_logic;dout25m,dout25b:outstd_logic_vector(7downto0));endponentt25s;ponent*skzisport(en45,en25,en05m,en05b:instd_logic;ain45m,ain45b,ain25m,ain25b,ain05:instd_logic_vector(7downto0);doutm,doutb:outstd_logic_vector(7downto0));endponent*skz;ponentymqisport(clk:instd_logic;ain41,ain42,ain43,ain44:instd_logic_vector(3downto0);del:outstd_logic_vector(2downto0);dout7:outstd_logic_vector(6downto0));endponentymq;signalclk11:std_logic;signalen1,en2,en3,en4:std_logic;signals45m,s45b,s05,s25m,s25b:std_logic_vector(7downto0);signalym1,ym2,ym3,ym4:std_logic_vector(3downto0);beginu1:div_clkport