电子信息类专业英语(西电第二版)Unit3ElectricalTechnique课件

1、Unit 3 Electrical TechniquePassage A Analog Circuit Passage B Binary System and Logic Systems Passage C Magnitude Locked Loop Passage A Analog Circuit1. Principles of Common Emitter CircuitAn NPN transistor is shown in Figure 3.1 with a load resistor (RL=10 k) in series with the collector terminal.

2、A collector supply voltage (VCC=20 V) is provided with a polarity that reverse biases the collector base junction. A base current IB is also provided via RB, and this is results in a forward bias (VBE) at the base emitter junction.Figure 3.1 Common Emitter CircuitA signal voltage VS having a source

3、resistance RS is capacitor coupled via C1 to the transistor base. The output is derived via another capacitor C2 connected to the transistor collector. Both capacitors are open circuit to direct currents, but offer very low impedance to AC signals. If the signal source were direct connected instead

4、of capacitor coupled, there would be a low resistance path from the base to the negative supply line, and this would affect the circuit bias conditions. Similarly, an external load directly connected to the transistor collector might alter the collector voltage.Assume that RB is selected to give a b

5、ase current of IB=20 A. Also, let the DC current gain factor of the transistor be =50. ThenICIB=502010-6=1mAThe voltage drop across RL is ICRL=1 mA10 k=10 V, and the collector to emitter voltage VCE is VCC-(ICRL) =20 V-10 V=10 V.The circuit DC conditions have been established as IB=20 A, IC=1 mA, VC

6、E=10 V, VCC=20 V. If VBE is increased until IB=25A, thenICIB=502510-6=1.25 mAThe voltage drop across RL is ICRL=1.25 mA10 k=12.5 V, and VCE= VCC-(ICRL) =20 V-12.5 V=7.5 V.When IB is 20 A, VCE=10 V, and when IB is 25 A, VCE=7.5 V.Hence, for an increase in IB of 5 A, VCE decreased by 2.5V (i.e., VCE c

7、hanged by the same amount as the voltage change across RL).Similarly, if VBE is decreased until IB is 15 A, IC becomes 501510-6=0.75 mA and ICRL=0.75 mA10 k=7.5 V. Thus, VCE=20 V-7.5 V=12.5 V.Therefore, for a 5 A decrease in IB, VCE increases by 2.5 V.The variation in base emitter voltage could be p

8、roduced by the AC signal VS. This might require signal amplitude of perhaps 10 mV. If VS=10 mV produces VO=2.5 V, the signal may be said to be amplified by a factor of VO/VS=2.5 V/10 mV=250, or circuit amplification is 250.The transistor current and voltage variations have no effect on the supply vo

9、ltage (VCC).So, when assessing the AC performance of the circuit; VCC can be treated as a short circuit. The coupling capacitor C1 also becomes a short circuit to AC signals. Redrawing the circuit of Figure 3.1 with VCC and C1 shorted gives the AC equivalent circuit shown in Figure 3.2.Figure 3.2 Co

10、mmon Emitter AC Equivalent CircuitIn Figure 3.2 the circuit input terminals are the base and the emitter, and the output terminals are the collector and the emitter. Thus, the emitter is common to both input and output, and the circuit is designated common emitter, or sometimes grounded emitter. It

11、is also seen from the figure that resistors RB and RL are in parallel with the circuit input and output terminals, espectively.2. Basic Op-ampsA conventional operational amplifier (op-amps) can be simply described as a high-gain direct-coupled voltage amplifier that has a single output terminal, and

12、 because it has both inverting and non-inverting input terminals, the device can function as an inverting, non-inverting, or differential amplifiers, filters, oscillators, level switches, comparators, etc.Three basic types of operational amplifiers are currently available. We are going to take an in

13、-depth look at the operating principles and practical application of the most common type, the conventional “voltage-in voltage-out” op-amp (typified by the LM741 and CA3140). The other two basic types of op-amps are the current-differencing or Norton op-amp, and the operational transconductance amp

14、lifier or OTA. Op-amp BasicsIn its simplest form, a conventional op-amp consists of a differential amplifier (bipolar or FFT) followed by offset compensation and output stages, as shown in Figure 3.3. All of those elements are integrated on a single chip and housed in an IC package. The differential

15、 amplifier has a high-impedance (constant-current)“tail” to give it a high input impedance and a high degree of common-mode signal rejection. It also has a high-impedance collector (or drain) load, to give it a large amount of signal-voltage gain (typicallyabout 100 dB).Figure 3.3 Simplified Op amp

16、Equivalent Circuit(The basic operation of an op amp can be simulatedusing discreet components as shown.)The output of the differential amplifier is fed to the circuits output stage via an offset-compensation network, which causes the op-amps output to center at zero volts. The output stage takes the

17、 form of a complementary emitter follower, and provides a low-impedance output.1Op-amps are normally powered from a split supply providing +V, -V, and a common ground, enabling the op-amps output to swing to either side of ground and take on a value of zero volts when the differential input voltage

18、is zero. Basic ConfigurationsWe have seen that the op-amps is a high-gain direct coupled voltage amplifier with high input impedance and low output impedance. In practice, the output voltage of an op-amp is proportional to the differential voltage between its two inputs, and is equal to, VOUT=AVO(V1

19、-V2)Where AVO is equal to open-loop voltage gain of the op-amp (typically 100, 000), V1 is the voltage at the non-inverting input, and V2 is the voltage at the inverting input.One useful application for an op-amp is as a linear amplifier in the closed-loop mode, as shown in Figure 3.4. The circuits

20、have negative feedback applied from the output to the inverting input. That technique enables the overall gain of those circuits to be precisely controlled by the values of the external-feedback components, regardless of the open-loop characteristics of the particular op-amps that are used. Figure 3

21、.4(a) shows an op-amp can be used as an inverting amplifier by grounding the non-inverting terminal and feeding the input signal to the inverting terminal, or as a non-inverting amplifier by transposing the two input connections, as shown in Figure 3.4(b).It can also be used as a differential amplif

22、ier by feeding a separate input signal to each input, in which case the op-amp will amplify voltage difference between the two inputs, as shown in Figure 3.4(c). Note that if identical signals are fed to both inputs of the op-amp, ideally the output should be zero.Figure 3.4 Closed-loop Amplifier Ci

23、rcuit(An inverting DC amplifier is shown in (a), a non-inverting DC amplifier is shown in (b), and a differential amplifier is shown in (c).)Another way of using an op-amp is as a differential voltage comparator, such as the one shown in Figure 3.5(a).In that circuit, a fixed reference voltage is fe

24、d to the non-inverting terminal. Because of the very high open-loop voltage gain of the op-amp, the output is driven into positive saturation (close to +V) when the sample voltage goes slightly above the reference voltage, and driven into negative saturation (close to -V) when the sample voltage goe

25、s slightly below the reference voltage.2 Figure 3.5(b) shows the circuits transfer characteristics. Note that it is the magnitude of the differential voltage at the inputs that determines the output voltage, and that the absolute values of the input voltages are of little importance. For example, if

26、 a 2 volts reference is applied, a differential voltage of only 200 V is needed to swing the output from negative saturation to positive saturation. Figure 3.5 A Simple Voltage Comparator and Its Transfer CharacteristicsNotes1. The output of the differential amplifier is fed to the circuits output s

27、tage via an offset-compensation network, which causes the op-amps output to center at zero volts. The output stage takes the form of a complementary emitter follower, and provides a low-impedance output.差动放大级的输出通过一个失调补偿网络与输出级相连, 目的是使运放的输出以0 V为中心。 输出级采用互补的射极跟随器的形式以使输出阻抗很低。 which引导非限制性定语从句。 2. Because

28、 of the very high open-loop voltage gain of the op-amp, the output is driven into positive saturation (close to +V) when the sample voltage goes slightly above the reference voltage, and driven into negative saturation (close to-V) when the sample voltage goes slightly below the reference voltage.由于

29、运放的开环电压增益很高, 当取样电压略高于参考电压时, 输出趋向于正向饱和状态(接近+V)。 当取样电压低于参考电压时, 输出趋向于负向饱和状态(接近-V)。 “because of”短语意为“因为, 由于”。 when引导时间状语从句。 Exercises1. Please translate the following phrases into English.(1) 模拟电路 (2) 集成电路(3) 共射极电路 (4) 负载电阻 (5) 短路 (6) 运算放大器 (7) 差分放大器 (8) 同相输入端电压 (9) 反相输入端电压 2. Please translate the follo

30、wing sentences into Chinese.(1) If the signal source were direct connected instead of capacitor coupled, there would be a low resistance path from the base to the negative supply line, and this would affect the circuit bias conditions.(2) A conventional operational amplifier (op-amps) can be simply

31、described as a high-gain direct-coupled voltage amplifier that has a single output terminal, and because it has both inverting and non-inverting input terminals, the device can function as an inverting, non-inverting, or differential amplifiers, filters, oscillators, level switches, comparators, etc

32、.(3) The differential amplifier has a high-impedance (constant-current)“tail” to give it a high input impedance and a high degree of common-mode signal rejection. It also has a high-impedance collector (or drain) load, to give it a large amount of signal-voltage gain (typically about 100 dB).(4) In

33、that circuit, a fixed reference voltage is fed to the non-inverting terminal. Because of the very high open-loop voltage gain of the op-amp, the output is driven into positive saturation (close to +V) when the sample voltage goes slightly above the reference voltage, and driven into negative saturat

34、ion (close to -V) when the sample voltage goes slightly below the reference voltage.3. Fill in the blanks.(1) In Figure 3.2 the circuit input terminals are , and the output terminals are . (2) A conventional operational amplifier (op-amps) can be simply described as .(3) The variation in could be pr

35、oduced by the AC signal VS. This might require signal amplitude of perhaps 10mV.(4) The output of the differential amplifier is fed to the circuits output stage via ，which causes the op-amps output to center at zero volts. (5) Another way of using an op-amp is as , such as the one shown in Figure 3.

36、5(a).(6) For example, if a 2 volts reference is applied, a differential voltage of only 200 V is needed to swing the output from .4. Answer the questions.(1) What is common emitter circuit?(2) What are three basic types of operational amplifiers?(3) What is the application for an op-amp?Passage B Bi

37、nary System and Logic Systems1. Binary SystemA digital system functions in a binary manner. It employs devices which exist only in two possible states. A transistor is allowed to operate at cutoff or in saturation, but not in its active region. A node may be at a high voltage of, say, 41 V or at a l

38、ow voltage of, say, 0.20.2 V, but no values are allowed. Various designations are used for these two quantized states, and the most common are listed in Table 3.1. In logic, a statement is characterized as true or false, and this is the first binary classification listed in the table. A switch may b

39、e closed or open, which is the notation under 9, etc. Binary arithmetic and mathematical manipulation of switching or logic functions are best carried out with classification 3, which involves two symbols, 0(zero) and 1(one).The binary system of representing numbers will now be explained by making r

40、eference to the familiar decimal system. In the latter the base is 10 (ten), and ten numerals, 0, 1, 2, 3, , 9, are required to express an arbitrary number. To write numbers larger than 9, we assign a meaning to the position of a numeral in an array of numerals. For example, the number 1264 (one tho

41、usand two hundred sixty four) has the meaning1264=1103+2102+6101+4100Thus the individual digits in a number represent the coefficients in an expansion of the number in powers of 10. The digit which is farthest to the right is the coefficient of the zeroth power; the next is the coefficient of the fi

42、rst power, and so on.In the binary system of representation the base is 2, and only two numerals 0 and 1 are required to represent a number. The numerals 0 and 1 have the same meaning as in the decimal system, but a different interpretation is placed on the position occupied by a digit. In the binar

43、y system the individual digits represent the coefficients of powers of two rather than ten as in the decimal system. For example, the decimal number 19 is written in the binary representation as 10011 since10011=124+023+022+121+120=16+0+0+2+1=19A short list of equivalent numbers in decimal and binar

44、y notation is given in Table 3.2.A general method for converting from a decimal to a binary number is indicated in Table 3.3. The procedure is the following. Place the decimal number (in this illustration, 19) on the extreme right. Next divide by 2 and place the quotient (9) to the left and indicate

45、 the remainder (1) directly below it. Repeat this process (for the next column 92 =4 and a remainder of 1) until a quotient of 0 is obtained. The array of 1s and 0s in the second row is the binary representation of the origin decimal number. In this example, decimal 19=10011 binary.A binary digit (a

46、 1 or a 0) is called a bit. A group of bits that has the same significance is called a byte, word, or code. For example, to represent the 10 numerals (0, 1, 2, , 9) and the 26 letters of the English alphabet would require 36 different combinations of 1s and 0s. Since 253626, then a minimum of 6 bits

47、 per bite are required in order to accommodate all the alphanumeric characters. In this sense a bite is sometimes referred to as a character and a group of one or more characters as a word.2. Logic SystemsIn a DC, or level-logic, system a bit is implemented as one of two voltage levels. If, as in Fi

48、gure 3.6(a), the more positive voltage is the 1 level and the other is the 0 level, the system is said to employ DC positive logic. On the other hand, a DC negative-logic system, as in Figure 3.6(b), is one which designates the more negative voltage state of the bit as the 1 level and the more posit

49、ive as the 0 level.1 It should be emphasized that the absolute values of the two voltages are of no significance in these definitions. In particular, the 0 state need not represent a zero voltage level (although in some systems it might).Figure 3.6 Illustrating the definition of (a) positive and (b)

50、 negative logic.A transition from one state to the other occurs at t=tThe parameters of a physical device (for example, VCEsat of a transistor) are not identical from sample to sample, and they also vary with temperature. Furthermore, ripple or voltage spikes may exist in the power supply or ground

51、leads, and other sources of unwanted signals, called noise, may be present in the circuit. For these reasons the digital levels are not specified precisely, but as indicated by the shaded region in Figure 3.6, each state is defined by a voltage range about a designated level, such as 41 V and 0.20.2

52、 V.In a dynamic, or pulse-logic, system a bit is recognized by the presence or absence of a pulse. At 1 signifies the existence of a positive pulse in a dynamic positive-logic system; a negative pulse denotes a 1 in a dynamic negative-logic system a 0 at a particular input (or output) at a given ins

53、tant of time designates that no pulse is present at that particular moment.Notes1 On the other hand, a DC negative-logic system, as in Figure 3.6(b), is one which designates the more negative voltage state of the bit as the 1 level and the more positive as the 0 level.另一方面, 如图3.6(b)所示, 把比特的较低的电压状态记为

54、1电平, 较高的电压状态记为0电平, 这样的系统称为直流负逻辑系统。 “on the other hand”意为“另一方面”。 which引导限制性定语从句, 修饰one。 Exercises1. Please translate the following phrases into English.(1) 二进制方式 (2) 低电压 (3) 数字系统 (4) 逻辑功能(5) 十进制 (6) 直流负逻辑系统 (7) 脉冲逻辑 (8) 动态正逻辑系统 2. Please translate the following sentences into Chinese.(1) For example,

55、 to represent the 10 numerals (0, 1, 2, , 9) and the 26 letters of the English alphabet would require 36 different combinations of 1s and 0s. Since 253626, then a minimum of 6 bits per bite are required in order to accommodate all the alphanumeric characters.(2) Furthermore, ripple or voltage spikes

56、 may exist in the power supply or ground leads, and other sources of unwanted signals, called noise, may be present in the circuit. (3) For these reasons the digital levels are not specified precisely, but as indicated by the shaded region in Figure 3.6, each state is defined by a voltage range abou

57、t a designated level, such as 41 V and 0.20.2 V.(4) At 1 signifies the existence of a positive pulse in a dynamic positive-logic system; a negative pulse denotes a 1 in a dynamic negative-logic system a 0 at a particular input (or output) at a given instant of time designates that no pulse is presen

58、t at that particular moment.3. Fill in the blanks.(1) are used for these two quantized states, and the most common are listed in Table 3.1.(2) In the latter the base is 10 (ten), and ten numerals, 0, 1, 2, 3, , 9, are required to express .(3) The numerals 0 and 1 have the same meaning as in . (4) In

59、 particular, the 0 state need not represent (although in some systems it might).(5) For these reasons the digital levels are not specified precisely, but as indicated by in Figure 3.6, each state is defined by a voltage range about a designated level, such as 41 V and 0.20.2 V.(6) At 1 signifies the

60、 existence of in a dynamic positive-logic system.Passage C Magnitude Locked LoopA novel control loop which maintains the magnitude of a transfer function constant is proposed. This loop is named as the magnitude locked loop (MLL). It is shown that it can perform most of the functions of the phase lo