IntegratedCircuits集成电路电子信息类专业英语计算机类专业英语文章说课材料

1、Good is good, but better carries it.精益求精，善益求善。IntegratedCircuits集成电路电子信息类专业英语计算机类专业英语文章-IntegratedCircuits(集成电路)英文原稿:TheIntegratedCircuitDigitallogicandelectroniccircuitsderivetheirfunctionalityfromelectronicswitchescalledtransistor.Roughlyspeaking,thetransistorcanbelikenedtoanelectronicallycontroll

2、edvalvewherebyenergyappliedtooneconnectionofthevalveenablesenergytoflowbetweentwootherconnections.Bycombiningmultipletransistors,digitallogicbuildingblockssuchasANDgatesandflip-flopsareformed.Transistors,inturn,aremadefromsemiconductors.Consultaperiodictableofelementsinacollegechemistrytextbook,andy

3、ouwilllocatesemiconductorsasagroupofelementsseparatingthemetalsandnonmetals.Theyarecalledsemiconductorsbecauseoftheirabilitytobehaveasbothmetalsandnonmetals.Asemiconductorcanbemadetoconductelectricitylikeametalortoinsulateasanonmetaldoes.Thesedifferingelectricalpropertiescanbeaccuratelycontrolledbym

4、ixingthesemiconductorwithsmallamountsofotherelements.Thismixingiscalleddoping.Asemiconductorcanbedopedtocontainmoreelectrons(N-type)orfewerelectrons(P-type).Examplesofcommonlyusedsemiconductorsaresiliconandgermanium.PhosphorousandboronaretwoelementsthatareusedtodopeN-typeandP-typesilicon,respectivel

5、y.Atransistorisconstructedbycreatingasandwichofdifferentlydopedsemiconductorlayers.Thetwomostcommontypesoftransistors,thebipolar-junctiontransistor(BJT)andthefield-effecttransistor(FET)areschematicallyillustratedinFigure2.1.Thisfigureshowsboththesiliconstructuresoftheseelementsandtheirgraphicalsymbo

6、licrepresentationaswouldbeseeninacircuitdiagram.TheBJTshownisanNPNtransistor,becauseitiscomposedofasandwichofN-P-Ndopedsilicon.Whenasmallcurrentisinjectedintothebaseterminal,alargercurrentisenabledtoflowfromthecollectortotheemitter.TheFETshownisanN-channelFET,whichiscomposedoftwoN-typeregionsseparat

7、edbyaP-typesubstrate.Whenavoltageisappliedtotheinsulatedgateterminal,acurrentisenabledtoflowfromthedraintothesource.ItiscalledN-channel,becausethegatevoltageinducesanN-channelwithinthesubstrate,enablingcurrenttoflowbetweentheN-regions.Anotherbasicsemiconductorstructureisadiode,whichisformedsimplybya

8、junctionofN-typeandP-typesilicon.Diodesactlikeone-wayvalvesbyconductingcurrentonlyfromPtoN.Specialdiodescanbecreatedthatemitlightwhenavoltageisapplied.Appropriatelyenough,thesecomponentsarecalledlightemittingdiodes,orLEDs.Thesesmalllightsaremanufacturedbythemillionsandarefoundindiverseapplicationsfr

9、omtelephonestotrafficlights.Theresultingsmallchipofsemiconductormaterialonwhichatransistorordiodeisfabricatedcanbeencasedinasmallplasticpackageforprotectionagainstdamageandcontaminationfromtheoutsideworld.Smallwiresareconnectedwithinthispackagebetweenthesemiconductorsandwichandpinsthatprotrudefromth

10、epackagetomakeelectricalcontactwithotherpartsoftheintendedcircuit.Onceyouhaveseveraldiscretetransistors,digitallogiccanbebuiltbydirectlywiringthesecomponentstogether.Thecircuitwillfunction,butanysubstantialamountofdigitallogicwillbeverybulky,becauseseveraltransistorsarerequiredtoimplementeachoftheva

11、rioustypesoflogicgates.Atthetimeoftheinventionofthetransistorin1947byJohnBardeen,WalterBrattain,andWilliamShockley,theonlywaytoassemblemultipletransistorsintoasinglecircuitwastobuyseparatediscretetransistorsandwirethemtogether.In1959,JackKilbyandRobertNoyceindependentlyinventedameansoffabricatingmul

12、tipletransistorsonasingleslabofsemiconductormaterial.Theirinventionwouldcometobeknownastheintegratedcircuit,orIC,whichisthefoundationofourmoderncomputerizedworld.AnICissocalledbecauseitintegratesmultipletransistorsanddiodesontothesamesmallsemiconductorchip.Insteadofhavingtosolderindividualwiresbetwe

13、endiscretecomponents,anICcontainsmanysmallcomponentsthatarealreadywiredtogetherinthedesiredtopologytoformacircuit.AtypicalIC,withoutitsplasticorceramicpackage,isasquareorrectangularsilicondiemeasuringfrom2to15mmonanedge.DependingontheleveloftechnologyusedtomanufacturetheIC,theremaybeanywherefromadoz

14、entotensofmillionsofindividualtransistorsonthissmallchip.Thisamazingdensityofelectroniccomponentsindicatesthatthetransistorsandthewiresthatconnectthemareextremelysmallinsize.DimensionsonanICaremeasuredinunitsofmicrometers,withonemicrometer(1mm)beingonemillionthofameter.Toserveasareferencepoint,ahuma

15、nhairisroughly100mmindiameter.SomemodernICscontaincomponentsandwiresthataremeasuredinincrementsassmallas0.1mm!Eachyear,researchersandengineershavebeenfindingnewwaystosteadilyreducethesefeaturesizestopackmoretransistorsintothesamesiliconarea,asindicatedinFigure2.2.WhenanICisdesignedandfabricated,itge

16、nerallyfollowsoneoftwomaintransistortechnologies:bipolarormetal-oxidesemiconductor(MOS).BipolarprocessescreateBJTs,whereasMOSprocessescreateFETs.Bipolarlogicwasmorecommonbeforethe1980s,butMOStechnologieshavesinceaccountedthegreatmajorityofdigitallogicICs.N-channelFETsarefabricatedinanNMOSprocess,and

17、P-channelFETsarefabricatedinaPMOSprocess.Inthe1980s,complementary-MOS,orCMOS,becamethedominantprocesstechnologyandremainssotothisday.CMOSICsincorporatebothNMOSandPMOStransistors.ApplicationSpecificIntegratedCircuitAnapplication-specificintegratedcircuit(ASIC)isanintegratedcircuit(IC)customizedforapa

18、rticularuse,ratherthanintendedforgeneral-purposeuse.Forexample,achipdesignedsolelytorunacellphoneisanASIC.Incontrast,the7400seriesand4000seriesintegratedcircuitsarelogicbuildingblocksthatcanbewiredtogetherforuseinmanydifferentapplications.Asfeaturesizeshaveshrunkanddesigntoolsimprovedovertheyears,th

19、emaximumcomplexity(andhencefunctionality)possibleinanASIChasgrownfrom5,000gatestoover100million.ModernASICsoftenincludeentire32-bitprocessors,memoryblocksincludingROM,RAM,EEPROM,Flashandotherlargebuildingblocks.SuchanASICisoftentermedaSoC(System-on-Chip).DesignersofdigitalASICsuseahardwaredescriptio

20、nlanguage(HDL),suchasVerilogorVHDL,todescribethefunctionalityofASICs.Field-programmablegatearrays(FPGA)arethemoderndayequivalentof7400serieslogicandabreadboard,containingprogrammablelogicblocksandprogrammableinterconnectsthatallowthesameFPGAtobeusedinmanydifferentapplications.Forsmallerdesignsand/or

21、lowerproductionvolumes,FPGAsmaybemorecosteffectivethananASICdesign.Thenon-recurringengineeringcost(thecosttosetupthefactorytoproduceaparticularASIC)canrunintohundredsofthousandsofdollars.ThegeneraltermapplicationspecificintegratedcircuitincludesFPGAs,butmostdesignersuseASIConlyfornon-fieldprogrammab

22、ledevicesandmakeadistinctionbetweenASICandFPGAs.HistoryTheinitialASICsusedgatearraytechnology.Ferrantiproducedperhapsthefirstgate-array,theULA(UncommittedLogicArray),around1980.Customizationoccurredbyvaryingthemetalinterconnectmask.ULAshadcomplexitiesofuptoafewthousandgates.Laterversionsbecamemorege

23、neralized,withdifferentbasediescustomizedbybothmetalandpolysiliconlayers.SomebasediesincludeRAMelements.StandardcelldesignInthemid1980sadesignerwouldchooseanASICmanufacturerandimplementtheirdesignusingthedesigntoolsavailablefromthemanufacturer.Whilethirdpartydesigntoolswereavailable,therewasnotaneff

24、ectivelinkfromthethirdpartydesigntoolstothelayoutandactualsemiconductorprocessperformancecharacteristicsofthevariousASICmanufacturers.Mostdesignersendedupusingfactoryspecifictoolstocompletetheimplementationoftheirdesigns.Asolutiontothisproblemthatalsoyieldedamuchhigherdensitydevicewastheimplementati

25、onofStandardCells.EveryASICmanufacturercouldcreatefunctionalblockswithknownelectricalcharacteristics,suchaspropagationdelay,capacitanceandinductance;thatcouldalsoberepresentedinthirdpartytools.Standardcelldesignistheutilizationofthesefunctionalblockstoachieveveryhighgatedensityandgoodelectricalperfo

26、rmance.StandardcelldesignfitsbetweenGateArrayandFullCustomdesignintermsofbothitsNRE(Non-RecurringEngineering)andrecurringcomponentcost.Bythelate1980s,logicsynthesistools,suchasDesignCompiler,becameavailable.SuchtoolscouldcompileHDLdescriptionsintoagate-levelnetlist.Thisenabledastyleofdesigncalledsta

27、ndard-celldesign.Standard-cellIntegratedCircuits(ICs)aredesignedinthefollowingconceptualstages,althoughthesestagesoverlapsignificantlyinpractice.Thesesteps,implementedwithalevelofskillcommonintheindustry,almostalwaysproduceafinaldevicethatcorrectlyimplementstheoriginaldesign,unlessflawsarelaterintro

28、ducedbythephysicalfabricationprocess.Ateamofdesignengineersstartswithanon-formalunderstandingoftherequiredfunctionsforanewASIC,usuallyderivedfromrequirementsanalysis.*ThedesignteamconstructsadescriptionofanASICtoachievethesegoalsusinganHDL.Thisprocessisanalogoustowritingacomputerprograminahigh-level

29、language.ThisisusuallycalledtheRTL(registertransferlevel)design.*Suitabilityforpurposeisverifiedbysimulation.Avirtualsystemcreatedinsoftware,usingatoolsuchasVirtutechsSimics,cansimulatetheperformanceofASICsatspeedsuptobillionsofsimulatedinstructionspersecond.*Alogicsynthesistool,suchasDesignCompiler

30、,transformstheRTLdesignintoalargecollectionoflower-levelconstructscalledstandardcells.Theseconstructsaretakenfromastandard-celllibraryconsistingofpre-characterizedcollectionsofgatessuchas2inputnor,2inputnand,inverters,etc.ThestandardcellsaretypicallyspecifictotheplannedmanufactureroftheASIC.Theresul

31、tingcollectionofstandardcells,plustheneededelectricalconnectionsbetweenthem,iscalledagate-levelnetlist.*Thegate-levelnetlistisnextprocessedbyaplacementtoolwhichplacesthestandardcellsontoaregionrepresentingthefinalASIC.Itattemptstofindaplacementofthestandardcells,subjecttoavarietyofspecifiedconstrain

32、ts.Sometimesadvancedtechniquessuchassimulatedannealingareusedtooptimizeplacement.*Theroutingtooltakesthephysicalplacementofthestandardcellsandusesthenetlisttocreatetheelectricalconnectionsbetweenthem.Sincethesearchspaceislarge,thisprocesswillproducea“sufficient”ratherthan“globally-optimal”solution.T

33、heoutputisasetofphotomasksenablingsemiconductorfabricationtoproducephysicalICs.*Closeestimatesoffinaldelays,parasiticresistancesandcapacitances,andpowerconsumptionscanthenbemade.Inthecaseofadigitalcircuit,thiswillbefurthermappedintodelayinformation.Theseestimatesareusedinafinalroundoftesting.Thistes

34、tingdemonstratesthatthedevicewillfunctioncorrectlyoverallextremesoftheprocess,voltageandtemperature.Whenthistestingiscompletethephotomaskinformationisreleasedforchipfabrication.Thesedesignsteps(orflow)arealsocommontostandardproductdesign.ThesignificantdifferenceisthatStandardCelldesignusesthemanufac

35、turerscelllibrariesthathavebeenusedinhundredsofotherdesignimplementationsandthereforeareofmuchlowerriskthanfullcustomdesign.GatearraydesignGatearraydesignisamanufacturingmethodinwhichthediffusedlayers,i.e.transistorsandotheractivedevices,arepredefinedandwaferscontainingsuchdevicesareheldinstockprior

36、tometallization,inotherwords,unconnected.Thephysicaldesignprocessthendefinestheinterconnectionsofthefinaldevice.ItisimportanttothedesignerthatminimalpropagationdelayscanbeachievedinASICsversustheFPGAsolutionsavailableinthemarketplace.GatearrayASICisacompromiseasmappingagivendesignontowhatamanufactur

37、erheldasastockwafernevergives100%utilization.Pure,logic-onlygatearraydesignisrarelyimplementedbycircuitdesignerstoday,replacedalmostentirelybyfieldprogrammabledevicessuchasFPGAs,whichcanbeprogrammedbytheuserandthusofferminimaltoolingcharges,marginallyincreasedpiecepartcostandcomparableperformance.To

38、daygatearraysareevolvingintostructuredASICsthatconsistofalargeIPcorelikeaprocessor,DSPunit,peripherals,standardinterfaces,integratedmemoriesSRAM,andablockofreconfigurableuncommittedlogic.ThisshiftislargelybecauseASICdevicesarecapableofintegratingsuchlargeblocksofsystemfunctionalityand“systemonachip”

39、requiresfarmorethanjustlogicblocks.Full-customdesignThebenefitsoffull-customdesignusuallyincludereducedarea,performanceimprovementsandalsotheabilitytointegrateanalogcomponentsandotherpre-designedcomponentssuchasmicroprocessorcoresthatformaSystem-on-Chip.Thedisadvantagescanincludeincreasedmanufacturi

40、nganddesigntime,increasednon-recurringengineeringcosts,morecomplexityintheCADsystemandamuchhigherskillrequirementonthepartofthedesignteam.Howeverfordigitalonlydesigns,“standard-cell”librariestogetherwithmodernCADsystemscanofferconsiderableperformance/costbenefitswithlowrisk.Automatedlayouttoolsarequ

41、ickandeasytouseandalsoofferthepossibilitytomanuallyoptimizeanyperformancelimitingaspectofthedesign.StructureddesignStructuredASICdesignisanambiguousexpression,withdifferentmeaningsindifferentcontexts.Thisisarelativelynewtermintheindustry,whichiswhythereissomevariationinitsdefinition.However,thebasic

42、premiseofastructuredASICisthatbothmanufacturingcycletimeanddesigncycletimearereducedcomparedtocell-basedASICbyvirtueoftherebeingpre-definedmetallayersandpre-characterizationofwhatisonthesilicon.Onedefinitionstatesthat,inastructuredASICdesign,thelogicmask-layersofadevicearepredefinedbytheASICvendor(o

43、rinsomecasesbyathirdparty).StructuredASICtechnologyisseenasbridgingthegapbetweenfield-programmablegatearraysand“standard-cell”ASICdesigns.WhatmakesastructuredASICdifferentfromagatearrayisthatinagatearraythepredefinedmetallayersservetomakemanufacturingturnaroundfaster.InastructuredASICthepredefinedme

44、tallizationisprimarilytoreducecostofthemasksetsandisalsousedtomakethedesigncycletimesignificantlyshorteraswell.Likewise,thedesigntoolsusedforstructuredASICcansubstantiallylowercost,andareeasiertousethancell-basedtools,becausethetoolsdonothavetoperformallthefunctionsthatcell-basedtoolsdo.Oneotherimpo

45、rtantaspectaboutstructuredASICisthatitallowsIPthatiscommontocertainapplicationstobe“builtin”,ratherthan“designedin”.BybuildingtheIPdirectlyintothearchitecturethedesignercanagainsavebothtimeandmoneycomparedtodesigningIPintoacell-basedASIC.中文翻译：集成电路集成电路数字逻辑和电子电路由称为晶体管的电子开关得到它们的（各种）功能。粗略地说，晶体管好似一种电子控制阀

46、，由此加在阀一端的能量可以使能量在另外两个连接端之间流动。通过多个晶体管的组合就可以构成数字逻辑模块，如与门和触发电路等。而晶体管是由半导体构成的。查阅大学化学书中的元素周期表，你会查到半导体是介于金属与非金属之间的一类元素。它们之所以被叫做半导体是由于它们表现出来的性质类似于金属和非金属。可使半导体像金属那样导电，或者像非金属那样绝缘。通过半导体和少量其它元素的混合可以精确地控制这些不同的电特性，这种混合技术称之为“半导体掺杂”。半导体通过掺杂可以包含更多的电子（N型）或更少的电子（P型）。常用的半导体是硅和锗，N型硅半导体掺入磷元素，而P型硅半导体掺入硼元素。不同掺杂的半导体层形成的三明治

47、状夹层结构可以构成一个晶体管，最常见的两类晶体管是双极型晶体管（BJT）和场效应晶体管（FET），图2.1给出了它们的图示。图中给出了这些晶体管的硅结构，以及它们用于电路图中的符号。BJT是NPN晶体管，因为由NPN掺杂硅三层构成。当小电流注入基极时，可使较大的电流从集电极流向发射极。图示的FET是N沟道的场效应型晶体管，它由两块被P型基底分离的N型组成。将电压加在绝缘的栅极上时，可使电流由漏极流向源极。它被叫做N沟道是因为栅极电压诱导基底上的N通道，使电流能在两个N区域之间流动。另一个基本的半导体结构是二极管，由N型和P型硅连接而成的结组成。二极管的作用就像一个单向阀门，由于电流只能从P流向

48、N。可以构建一些特殊二极管，在加电压时可以发光，这些器件非常合适地被叫做发光二极管或LED。这种小灯泡数以百万计地被制造出来，有各种各样的应用，从电话机到交通灯。半导体材料上制作晶体管或二极管所形成的小芯片用塑料封装以防损伤和被外界污染。在这封装里一些短线连接半导体夹层和从封装内伸出的插脚以便与（使用该晶体管的）电路其余部分连接。一旦你有了一些分立的晶体管，直接用电线将这些器件连线在一起就可以构建数字逻辑（电路）。电路会工作，但任何实质性的数字逻辑（电路）都将十分庞大，因为要在各种逻辑门中每实现一种都需要多个晶体管。1947年，JohnBardeen、WalterBrattain和andWil

49、liamShockley发明晶体管的时候。将多个晶体管组装在一个电路上的唯一方法就是购买多个分离的晶体管，将它们连在一起。1959年，JackKilby和RobertNoyce各自独立地发明了一种将多个晶体管做在同一片半导体材料上的方法。这个发明就是集成电路，或IC，是我们现代电脑化世界的基础。集成电路之所以被这样命名，是因为它将多个晶体管和二极管集成到同一块小的半导体芯片上。IC包含按照形成电路所要求的拓扑结构连在一起的许多小元件，而无需再将分立元件的导线焊接起来。去除了塑料或陶瓷封装后，一个典型的集成电路就是每一边2mm至15mm的方形或矩形硅片。根据制造集成电路的技术水平的不同，在这种小

50、片上可能有几十个到几百万个晶体管，电子器件这种令人惊异的密度表明那些晶体管以及连接它们线是极其微小的。集成电路的尺寸是以微米为单位测量的，1微米是1米的百万分之一。作为参照，一根人的头发其直径大约为100微米。一些现代集成电路包含的元件和连线，是以小到0.1微米的增量来测量的。每年研究人员和工程师都在寻找新的方法来不断减小这些元件的大小，以便在同样面积的硅片上集成更多的晶体管，如图2.2所示。在集成电路的设计和制造过程中，常用两种主要晶体管技术是：双极和金属氧化物半导体（MOS）。双极工艺生产出来的是BJT（双极型晶体管），而MOS工艺生产出来的是FET（场效应晶体管）。在20世纪80年代以前

51、更常用的集成电路是双极逻辑，但是此后MOS技术在数字逻辑集成电路中占据了大多数。N沟道FET是采用NMOS工艺生产的，而P沟道FET是采用PMOS工艺生产的。到了20世纪80年代，互补MOS即CMOS成为占主导地位的加工技术，并且延续至今。CMOS集成电路包含了NMOS和PMOS两种晶体管。专用集成电路（ASIC）专用集成电路（ASIC）是为了特殊应用而定制的集成电路，而不是通用的。比如，一片仅被设计用于运行蜂窝式电话的芯片是专用集成电路（ASIC）。相比之下，7400与4000系列集成电路是可以用导线连接的逻辑构建模块，适用于各种不同的应用。随着逐年来特征尺寸的缩小和设计工具的改进，ASIC

52、中的最大复杂度从5000个门电路增长到了1亿个门电路，因而功能也有极大的提高。现代ASIC常包含32位处理器，包括ROM、RAM、EEPROM、Flash等存储器，以及其它大规模组件。这样的ASIC经常被称为SoC（片上系统）。数字ASIC的设计者们使用硬件描述语言（HDL），比如Verilog或VHDL语言来描述ASIC的功能。现场可编程门阵列（FPGA）是7400系列和面包板的现代版，它包括可编程逻辑块和可编程的模块之间的相互连接，使得相同的FPGA能够用于许多不同的场合。对于较小规模的设计或（与）小批量生产，FPGA可能比ASIC设计有更高的成本效率。不能循坏的工程费用（建立工厂生产特定

53、ASIC的成本）可能会达到数十万美元。专用集成电路这一通用名词也包括FPGA，但是大多数设计者仅将ASIC用于非现场可编程的器件，将ASIC和FPGA两者区别开来。历史最初的ASIC使用门阵列技术。Ferranti在1980年左右制作了也许是第一片门阵列，ULA（自由逻辑阵列）。通过改变金属互相连接掩模产生了定制。ULA有多至几千个门电路的复杂度。之后的版本变得更通用，有适应用户的包含金属和多层硅的不同基底，有些基底包括RAM单元。标准单元设计在20世纪80年代中期，一个设计者要选择一家ASIC制造商，并用制造商提供的设计工具完成他们的设计工作。尽管有第三方设计工具，但第三方设计工具和不同的A

54、SIC制造商的布线以及实际半导体工艺过程的性能之间却缺乏有效的联系。大多数的设计者最终使用工厂特制的工具来完成他们的设计。解决这个问题的一个方法是实现标准元件，这一问题也带来了更高密度的器件。每个ASIC制造商都可创造他们自己的具有已知电性能的功能块，如传播延迟器、电容、电感，这些都可以用第三方工具来表示（实现）。标准单元设计就是利用这些功能块来实现很高的门密度以及良好的电性能。标准单元设计使门阵列和全定制设计之间在一次性投入的工程费用和循环元件成本方面相互适应。直到80年代后期，逻辑综合工具，比如设计编译器，开始向广大设计者提供。这些工具能够将HDL描述语言编译成门级的网表。这就使得称作标准单元设计的设计方法成为可能。标准单元集成电路的设计过程在概念上需经过以下几个过程，但事实上在实际生产中这些工序都有较大的重叠。以工业界普通的熟练水平实现的这些步骤几乎总是产生能正确实现原设计的最终器件，除非后来在物理制造过程中引入了缺陷。设计工程师团队开始工作于