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1、The Summary of the VHDLThe VHDL English full name is the Hardware Description Language of the Integrated Circuit of the Very-High-Speed, birth in 1982. At the end of 1987, the VHDL is confirmed by the IEEE and American Ministry of National Defense to describe language for the standard hardware. Anno
2、unced VHDL standard edition from the IEEE, IEEE-1076(call 87 versions) after, the each EDA company released own VHDL design environment one after another, or declared that the own design tool can connect with VHDL. Henceforth, the VHDL design realm to get to extensively accept in the electronics, an
3、d gradually replaced an originally not- standard hardware description language. In 1993, the IEEE carried on to revise to the VHDL, describe ability to expand a VHDL contents from higher abstract layer and the system, announced the VHDL of new edition, namely IEEE standard of 1076-1993 editions, .(c
4、all 93 versions)Now, VHDL and Verilog are the industrial standard hardware description of the IEEEs language, and get support of numerous EDA companies, at electronics engineering realm, have become in general use hardware to describe language. In fact, in the new century, the VHDL will start to und
5、ertake a greatly part of numerical system design mission at the Verilog language. The VHDL language is a kind of deluxe language which used for an electric circuit design. It expects to appear after the 80's of.BE. At the beginning come out by American Ministry of National Defense development to
6、 provide the American solider with the credibility which uses to raise a design with cut one kind of development period to use the scope smaller design language.All of VHDL English write BE: The Description Language of the VHSIC (the Speed Integrated of the Very High Circuit) Hardware. Translating i
7、nto Chinese is soon extremely high the description language of the integrated circuit hardware. So it is of the application mainly is an application in the design of numerical electric circuit. Currently, it is in the application most in China is the design which uses in the FPGA/CPLD/EPLD. Certainl
8、y in some units with stronger real functions, it is also use to design ASIC.The VHDL mainly used for the structure, behavior which describes num cal system, function with connection. In addition to implying many languages sentence which have a hardware character, VHDL languages forms and description
9、 style and sentence construction are very similar at general calculator deluxe language. VHDL procedure structure characteristics is an engineering design, or all that the design entity(can be a component, an electric circuit mold piece or a system) is divided into exterior(or call but part, and por
10、t) with inner part(or call to can't see part), since involve internal function and calculate way of entity to complete part. At one designed entity to define exterior interface after, once it internal development completion after, other designs can directly adjust to use this entity. This kind o
11、f design will entity to be divided into a little bit basic VHDL system that is a VHDL system inside the concept of outside part design of a little bit basic and other hardware describe the language compare and the VHDL has a following characters: The function is strong and the design be vivid. The V
12、HDL has the function strong language structure, can describe a complicated logic control with the simple and direct and explicit source code. It has a multi-layer design description function, in multiple layers thin turn, finally directly born electric circuit class description. The VHDL supports sy
13、nchronous electric circuit, difference's tread electric circuit with random the design of electric circuit, this be the other hardware description although the language can't compare to. The VHDL still supports various design method, since support from the bottom upward design, support again
14、 from the design of crest declivity; since the support mold piece turns a design, support layer's turn a design again. Support extensively and be easy to a modification. Because the VHDL has already become IEEE standard the norm of hardware description language, most EDA tools almost support VHD
15、L currently, this is VHDL of further expansion with extensively applied lay foundation. In the design process of the hardware electric circuit, the main design document is the source code which writes with the VHDL, the VHDL easily reads with the structure turn, so be easy to a modification design.T
16、he strong system hardware describes ability. The VHDL has a multi-layer design description function, since can describe system class electric circuit, can describe door class electric circuit again. And description can adopt a behavior description, deposit a machine to deliver description or structu
17、re description, can also adopt the hybrid description of threes mixture. Moreover, VHDL support is inertial to delay and deliver to delay, can also accurately build up hardware electric circuit model. VHDL support prepare definite of with from definition of data type, bring hardware description a bi
18、gger freedom degree, make design the personnel can expediently establish the system model of high time. The independence is at the design of spare part, have nothing to do with the craft. Don't need to consider a choice completion the spare part of design first while designing a personnel to car
19、ry on a design with the VHDL, can concentrate energy to carry on design of excellent turn. When the design description complete after, can carry out its function with various different spare part structure very strong transplantation ability. The VHDL is a kind of hardware description for standardiz
20、e language, the same of design description can be support by the different tool and make to design to describe of the transplantation make possible. Be easy to share and reply to use. The VHDL adoption can build up various mold piece that can again make use of according to the design method of datab
21、ase (Library). These canned in advance design or use to design a medium backup mold a piece before and depositted these to the database in, can be in lately of the design carry on replying to use, can make the design result be design the personnel's to carry on exchanges and share, decrease hard
22、ware electric circuit design. (1) Compared with other hardware description languages, the VHDL have stronger behavior description on ability, come to a decision him to become a system design realm the best hardware a description language thus. The strong behavior description ability is to avert from
23、 concrete spare part structure and describe and design important assurance of large-scale electronics system from the logic behavior. (2) The VHDL be abundant of imitate true language sentence and database function, make in any big system of the design can inspect a function possibility of design th
24、e system in early days, can carry on imitating true emulation to the design at any time. (3) The ability and procedure structure of the behavior description with lexical VHDL come to a decision the decomposition that he has to support a large-scale design with have already have design of again make
25、use of function. Meet the market demanding large-scale system efficiently, the completion of the high speed has to include many people the several generation hair set even together and abreast works and then can carry out. (4) For use the design of an assurance of VHDL completion, can make use of ED
26、A tool to carry on logic comprehensive with excellent turn, and auto of the VHDL describe the design change into the door class net form.(5) The description of VHDL to design have opposite and independent, the design can not understand the structure of hardware and need not manage the target spare p
27、art that the end design carry out, either is what, but carry on an independent design.VHDL的介绍VHDL的英文全名是Very-High-Speed Integrated Circuit Hardware Description Language,诞生于1982年。1987年底,VHDL被IEEE和美国国防部确认为标准硬件描述语言 。自IEEE公布了VHDL的标准版本,IEEE-1076(简称87版)之后,各EDA公司相继推出了自己的VHDL设计环境,或宣布自己的设计工具可以和VHDL接口。此后VHDL在电
28、子设计领域得到了广泛的接受,并逐步取代了原有的非标准的硬件描述语言。1993年,IEEE对VHDL进行了修订,从更高的抽象层次和系统描述能力上扩展VHDL的内容,公布了新版本的VHDL,即IEEE标准的1076-1993版本,(简称93版)。现在,VHDL和Verilog作为IEEE的工业标准硬件描述语言,又得到众多EDA公司的支持,在电子工程领域,已成为事实上的通用硬件描述语言。有专家认为,在新的世纪中,VHDL于Verilog语言将承担起大部分的数字系统设计任务。 VHDL语言是一种用于电路设计的高级语言。它在80年代的后期出现。最初是由美国国防部开发出来供美军用来提高设计的可靠性和缩减开
29、发周期的一种使用范围较小的设计语言 。 VHDL的英文全写是:VHSIC(Very High Speed Integrated Circuit)Hardware Description Language。翻译成中文就是超高速集成电路硬件描述语言。因此它的应用主要是应用在数字电路的设计中。目前,它在中国的应用多数是用在FPGA/CPLD/EPLD的设计中。当然在一些实力较为雄厚的单位,它也被用来设计ASIC。 VHDL主要用于描述数字系统的结构,行为,功能和接口。除了含有许多具有硬件特征的语句外,VHDL的语言形式和描述风格与句法是十分类似于一般的计算机高级语言。VHDL的程序结构特点是将一项工
30、程设计,或称设计实体(可以是一个元件,一个电路模块或一个系统)分成外部(或称可是部分,及端口)和内部(或称不可视部分),既涉及实体的内部功能和算法完成部分。在对一个设计实体定义了外部界面后,一旦其内部开发完成后,其他的设计就可以直接调用这个实体。这种将设计实体分成内外部分的概念是VHDL系统设计的基本点 VHDL系统设计的基本点: 与其他硬件描述语言相比,VHDL具有以下特点: 功能强大、设计灵活。VHDL具有功能强大的语言结构,可以用简洁明确的源代码来描述复杂的逻辑控制。它具有多层次的设计描述功能,层层细化,最后可直接生成电路级描述。VHDL支持同步电路、异步电路和随机电路的设计,这是其他硬件描述语言虽不能比拟的。VHDL还支持各种设计方法,既支持自底向上的设计,又支
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