关于单片机的英文文献

1、；The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applicationssuch as modems, motor-control systems, air conditioner control systems,automotiveengine and amongothers.The high processingspeed and enhancedperipheral set of these microcontrollers make them suitable

2、 for suchhigh-speed event-based applications.However,thesecriticalapplication domains also require that these microcontrollers are highlyreliable. The high reliability and low market risks can be ensured by arobusttestingprocessand a propertoolsenvironmentforthe validationofthese microcontrollersbot

3、h atthecomponent and atthesystem level.IntelPlatformEngineeringdepartmentdevelopedanobject-orientedmulti-threadedtestenvironmentforthe validationofitsAT89C51automotive microcontrollers. The goals of this environment was not onlytoprovidearobusttestingenvironmentfortheAT89C51 automotivemicrocontrolle

4、rs, but to develop an environment which canbe easilyextendedandreusedforthevalidationofseveralotherfuturemicrocontrollers.Theenvironmentwas developed inconjunction withMicrosoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with

5、 various hardware/software environmental components, and how to use AT89C51.1.1 IntroductionThe8-bitAT89C51 CHMOSmicrocontrollersaredesignedtohandlehigh-speedcalculationsandfastinput/outputoperations.MCS 51microcontrollersare typicallyused forhigh-speed event controlsystems.Commercial applicationsin

6、clude modems,motor-controlsystems,printers,photocopiers, air conditioner control systems, disk drives, and medicalinstruments.TheautomotiveindustryuseMCS 51microcontrollersinengine-controlsystems, airbags,suspensionsystems,andantilockbrakingsystems(ABS).TheAT89C51 isespeciallywell suitedtoapplicatio

7、nsthatbenefitfromits processing speed and enhanced on-chipperipheralfunctionsset,such as automotivepower-traincontrol,vehicledynamic suspension,antilock braking,and stabilitycontrolapplications.Because of these critical applications, the market requires a reliablecost-effectivecontrollerwitha low in

8、terruptlatencyresponse,ability.；toservicethe highnumber of time and event drivenintegratedperipheralsneeded inrealtimeapplications,and a CPUwith above average processingpower ina singlepackage. The financialand legalriskofhavingdevicesthatoperate unpredictablyis very high. Once in themarket,particul

9、arlyinmissioncriticalapplicationssuch as an autopilotor anti-lockbrakingsystem, mistakes are financially prohibitive. Redesign costs can run ashigh as a $500K, much more if the fix means 2 back annotating it acrossa productfamilythat sharethesame core and/orperipheraldesign flaw.Inaddition,fieldrepl

10、acementsof components isextremelyexpensive,asthe devices are typically sealed in modules with a total value severaltimesthatofthecomponent. To mitigatetheseproblems,itis essentialthatcomprehensivetestingof the controllersbe carriedoutatboththecomponent level and system level under worst case environ

11、mental andvoltage conditions. This complete and thorough validation necessitatesnot only a well-defined process but also a proper environment and toolstofacilitateandexecutethemissionsuccessfully.IntelChandlerPlatform Engineering group provides postsilicon system validation (SV)ofvariousmicro-contro

12、llersand processors.The systemvalidationprocess can be broken into three major parts. The type of the device anditsapplicationrequirementsdeterminewhichtypesoftestingareperformed on the device.1.2 The AT89C51 provides the following standard features:4KbytesofFlash,128bytesofRAM, 32 I/Olines,two16-bi

13、ttimer/counters,a fivevector two-levelinterruptarchitecture,afulldupleserialport, on-chip oscillatorandclockcircuitry.Inaddition, the AT89C51 is designed with static logic for operation downto zero frequency and supportstwo software selectablepower savingmodes.The Idle Modestopsthe CPUwhileallowingt

14、heRAM,timer/counters,serialportand interruptsys -tem to continuefunctioning.The Power-down Modesaves the RAMcontents butfreezes the oscillatordisablingallotherchipfunctions until the next hardware reset.1-3Pin DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bitopen-drainbi-directional

15、I/O port.As an.；output port, each pin can sink eight TTL inputs. When 1s are written toport 0 pins, the pins can be used as high impedance inputs .Port 0 mayalso be configuredtobe themultiplexedlow orderaddress/databus duringaccesses toexternalprogram and data memory. InthismodeP0 has internalpullup

16、s. Port 0 also receives the code bytes during Flash programming,and outputsthe code bytesduring program verification.Externalpullupsare required during program verification.Port1：Port1 is an 8-bitbi-directionalI/Oportwithinternalpullups.The Port 1 output buffers can sink/source four TTL inputs. When

17、 1s arewritten to Port 1 pins they are pulled high by the internal pullups andcan be used as inputs. As inputs, Port 1 pins that are externally beingpulledlow willsourcecurrent(IIL)because ofthe internalpullups.Port1 also receivesthe low-orderaddress bytesduringFlashprogramming andverification.Port

18、2 ： Port 2 is an 8-bit bi-directional I/O port with internalpullups.The Port2 outputbufferscan sink/sourcefourTTL inputs.When1s are writtentoPort2 pinsthey are pulledhigh by theinternalpullupsand can be used as inputs.As inputs,Port 2 pinsthatare externallybeingpulledlow willsourcecurrent(IIL)becaus

19、e ofthe internalpullups.Port2 emitsthehigh-orderaddress byteduringfetchesfromexternalprogrammemoryand duringaccesses toPort 2 pinsthat are externallybeing pulledlow willsourcecurrent(IIL)because oftheinternalpullups.Port2 emitsthe high-order address byte during fetches from external program memoryan

20、d during accesses to external data memory that use 16-bit addresses(MOVXDPTR). In this application, it uses strong internal pull-ups whenemitting 1s. During accesses to external data memory that use 8-bitaddresses (MOVXRI),Port2 emits the contentsof the P2 Special FunctionRegister. Port 2 also recei

21、ves the high-order address bits and somecontrol signals during Flash programming and verification.Port 3：Port3 isan 8-bitbi-directionalI/O port withinternalpullups. The Port 3 output buffers can sink/source four TTL inputs. When 1sare written to Port 3 pins they are pulled high by the internal pullu

22、psand can be used as inputs.As inputs,Port 3 pinsthatare externallybeingpulled low will source current (IIL) because of the pullups.Port 3 alsoservesthefunctionsofvariousspecialfeaturesofttheAT89C51 as listed below:RST：Reset input.A highon thispinfortwo machine cycleswhiletheoscillator is running re

23、sets the device.；ALE/PROG： Address LatchEnable outputpulsefor latchingthelow byteof the address during accesses to external memory. This pin is also theprogram pulse input(PROG)duringFlashprogramming. Innormal operationALE is emitted at a constant rate of 1/6 the oscillator frequency, andmay be used

24、 for externaltimingorclockingpurposes.Note,however,thatone ALE pulse is skipped during each access to external Data Memory. Ifdesired, ALE operation can be disabled by setting bit 0 of SFR location8EH. With the bit set,ALEisactiveonlyduring a MOVXor MOVCinstruction.Otherwise,the pinisweakly pulledhi

25、gh.SettingtheALE-disablebithasno effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external programmemory. When theAT89C51 is executing code from external program memory,PSEN isactivatedtwiceeach machinecycle,exceptthattwoPSENactivations are

26、skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in orderto enable the device to fetchcode from externalprogram memorylocationsstarting at 0000H up to FFFFH. Note, however, that if lock bit 1 isprogrammed, EA willbe internallylatchedon rese

27、t.EA shouldbe strappedto VCCforinternalprogram executions.Thispinallreceivesthe12-voltprogramming enable voltage(VPP) duringFlashprogramming,forpartsthatrequire 12-volt VPP.XTAL1： Input to the inverting oscillator amplifier and input to theinternal clock operating circuit.XTAL2:Output from the inver

28、ting oscillator amplifier. OscillatorCharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chiposcillator, as shown in Figure 1. Either a quarts crystal or ceramicresonatormay be used. To drivethe devicefrom an extern

29、alclocksource,XTAL2shouldbe leftunconnected whileXTAL1isdriven as shown in Figure2.Thereare no requirementson the duty cycle of the externalclocksignal,sincetheinputtotheinternalclockingcircuitryisthrough adivide-by-two flip-flop,but minimumand maximumvoltagehigh and low timespecifications must be o

30、bserved. Idle Mode In idle mode, the CPU putsitselftosleep whilealltheon chip peripheralsremainactive.The modeis invokedby software.The contentof the on-chipRAMand allthespecialfunctionsregistersremainunchanged duringthismode. The idlemodecanbe terminated by any enabledinterruptor bya hardware reset

31、. Itshouldbe noted that when idle is terminated by a hard ware reset, the device.；normally resumes program execution, from where it left off, up to twomachine cycles beforethe internalresetalgorithmtakes control. On-chiphardware inhibits access tointernalRAMin thisevent,butaccess totheport pins is n

32、ot inhibited.To eliminatethepossibilityofan unexpectedwrite to a port pin when Idle is terminated by reset, the instructionfollowing the one that invokes Idle should not be one that writes to aport pin or to external memory.Power-down ModeIn the power-down mode, theoscillatorisstopped, and the instr

33、uctionthat invokes power-down is the lastinstructionexecuted. The on-chipRAMand Special Function Registers retain their values until the power-downmode is terminated. The only exit from power-down is a hardware reset.Reset redefines the SFR but does not change the on-chip RAM. The resetshould not be

34、 activated before VCC is restored to its normal operatinglevel and must be held active long enough to allow the oscillator torestartand stabilize.The AT89C51code memoryarray isprogrammedbyte-bybyte in either programming mode. To program any nonblank byte in theon-chipFlash Memory, the entirememorymu

35、st be erased using the Chip EraseMode.2 Programming AlgorithmBefore programming the AT89C51, theaddress,data and controlsignalsshould be set up accordingtothe Flashprogramming modetable and Figure3 and Figure4.To program theAT89C51, takethe followingsteps.1.Inputthedesiredmemorylocationon the addres

36、s lines.2.Input the appropriatedata byte on the data lines.3. Activate the correctcombination ofcontrolsignals. 4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lockbits.The byte-write cycleisself-timedand typicallytakes

37、no more than1.5 ms. Repeat steps 1 through 5, changing the address and data for theentire array or until the end of the objectreached. Data Polling: TheAT89C51featuresData Pollingto indicatetheend ofa writecycle.Duringa write cycle, an attempted read of the last byte written will result inthe comple

38、ment of the writtendatum on PO.7. Once thewritecyclehas beencompleted, truedata are validon alloutputs,and the nextcyclemay begin.Data Polling may begin any time after a write cycle has been initiated.2.1Ready/Busy:.；The progress of byte programming can also be monitored by the RDY/BSY output signal

39、. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify:Iflock bitsLB1 and LB2 have not been programmed, the programmedcodedata can be read back via the address and data lines for verification.T

40、he lockbitscannot be verifieddirectly.Verificationof the lock bitsis achieved by observing that their features are enabled.2.2 Chip Erase:The entire Flash array is erased electrically by using the propercombinationof controlsignalsand by holdingALE/PROGlow for10 ms. Thecode array is written with all

41、“1”s. The chip erase operation must beexecuted before the code memory can be re-programmed.2.3 Reading the Signature Bytes:The signature bytesare read by the same procedureas a normalverificationof locations030H, 031H, and 032H, except thatP3.6 and P3.7must be pulled to a logic low. The values retur

42、ned areas follows :(030H)= 1EH indicates manufactured by Atmel(031H)= 51H indicates 89C51(032H)= FFH indicates 12V programming(032H)= 05H indicates 5V programming2.4 Programming InterfaceEvery code byte in the Flash arraycan be writtenand theentirearraycan be erased by using the appropriate combinat

43、ion of control signals.The writeoperationcycleisselftimedandonce initiated,willautomaticallytimeitselftocompletion.A microcomputerinterfaceconverts information between two forms. Outside the microcomputer theinformationhandledby an electronicsystem existsas a physicalsignal,but within the program, i

44、t is represented numerically. The function ofany interfacecan be brokendown intoa number of operationswhich modifythe data in some way, so that the process of conversion between the.；external and internal forms is carried out in a number of steps. Ananalog-to-digital converter is used to convert a c

45、ontinuously variablesignal to a corresponding digital form which can take any one of a fixednumber of possible binary values. If the output of the transducer doesnot vary continuously, no ADC is necessary. In this case the signalconditioningsectionmust converttheincoming signaltoa form which canbe c

46、onnecteddirectlytothenextpartofthe interface,theinput/outputsectionof the microcomputeritself.Outputinterfacestakea similarform,the obvious differencebeingthat here the flow of information is in theopposite direction; it is passed from the program to the outside world.In this case the program may ca

47、ll an output subroutine which supervisestheoperationofthe interfaceand performsthescalingnumbers which maybeneededfor digital-to-analogconverter.Thissubroutinepassesinformation in turn to an output device which produces a correspondingelectricalsignal,which couldbe convertedintoanalogform usinga DAC

48、.Finally the signal is conditioned to a form suitable for operating anactuator.The signalsusedwithinmicrocomputercircuitsarealmostalways toosmallto be connected directlytotheoutsideworld ” and somekind of interface must be used to translate them to a more appropriateform. The design of section of in