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TDG-09774-001_v1.0|February2020
NVIDIAJetsonXavierNX
ThermalDesignGuide
DocumentHistory
NVIDIAJetsonXavierNX
TDG-09774-001_v1.0|
PAGE\*roman
ii
TDG-09774-001_v1.0
Version
Date
DescriptionofChange
1.0
February10,2020
InitialRelease
TableofContents
NVIDIAJetsonXavierNX
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iii
Chapter1. Introduction 1
CustomerRequirements 1
Definitions 1
TotalModulePower 1
JetsonXavierNX 2
XavierSoCTemperature 4
Chapter2. Specifications 5
ThermalSpecifications 5
Chapter3. DesignGuidance 6
ThermalInformation 6
JetsonXavierNXThermalPerformance 6
JetsonXavierNXThermalDesignDetails 10
CustomerThermalSolution 11
TemperatureCycling 11
MechanicalInformation 11
HeatSinkMountingGuidelines 12
AssemblyGuidelines 13
Chapter4. ThermalManagement 14
TemperatureMode 14
FanControl 14
XavierSoCMaximumOperatingTemperature 17
XavierSoCHardwareThermalThrottling 17
XavierSoCShutdownTemperature 18
ListofFigures
NVIDIAJetsonXavierNX
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Figure1-1. JetsonXavierNX–TopsideView 2
Figure1-2. JetsonXavierNX–BacksideView 3
Figure3-1. ThermalResistanceNetwork 7
Figure3-2. ComponentPlacementMapforJetsonXavierNX 8
Figure3-3. ThermalStack-upSchematic 11
Figure3-4. ModuleBoardwithMountingFeatures 12
Figure3-5. ModuleBoardPCBBackSupportKeepOutArea 13
Figure4-1. FanControlAlgorithmfor“QuietMode” 15
Figure4-2. FanControlAlgorithmfor“CoolMode” 16
ListofTables
Table2-1. JetsonXavierNXThermalSpecifications 5
Table3-1. JetsonXavierNXThermalPerformance 9
Table4-1. DefaultFanControlParametersfor“QuietMode” 15
Table4-2. DefaultFanControlParametersfor“CoolMode” 16
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1
Chapter1.Introduction
Thisdocumentisthethermaldesignguide(TDG)fortheNVIDIA®JetsonXavier™NXproduct.
Thepurposeofthisthermaldesignguideistoprovidethesystem-levelthermal,mechanicalandqualificationrequirementsfortheJetsonXavierNX.
RefertotheJetsonXavierNXmoduledatasheetfordetaileddrawingandmoduledimensions.
CustomerRequirements
Thecustomerrequirementsareasfollows:
⯈Customersareresponsibleforreadingandunderstandingthisentirethermaldesignguide.
⯈CustomersareresponsibleforimplementingathermalsolutionthatmaintainstheNVIDIA®Xavier™systemonchip(SoC)temperaturesbelowthespecifiedtemperaturesin
Table2-1
underthemaximumthermalloadandsystemconditionsfortheirusecase.
⯈CustomersareresponsiblefordesigningasystemthatdeliversenoughpowertotheJetsonXavierNXtosustainthemaximumthermalloadfortheirusecase.
⯈CustomersareresponsibleforqualificationoftheJetsonXavierNXintheirsystemandareresponsibleforanyissuesrelatedtofailuretoqualifytheproductproperly.
Definitions
Thissectiondescribesterminologythatwillbereferencedthroughoutthisthermaldesignguide.
TotalModulePower
Thetotalmodulepower(TMP)representstheaverageboardpowerdissipationwhilethesystemisrunningthetargetworkloadundertheworst-caseconditionsinsteadystate.SystemdesignsmustbecapableofprovidingenoughcoolingfortheJetsonXavierNXwhenoperatingattheTMPlevel.
Introduction
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JetsonXavierNX
Figure1-1
providesatopsideviewoftheJetsonXavierNXwhile
Figure1-2
providesthebacksideview.
Figure1-1. JetsonXavierNX–TopsideView
Figure1-2. JetsonXavierNX–BacksideView
Thethermalsolutionofthecustomer’ssystemdesignshouldattachtothemoduledirectly.MountingholesareprovidedonthePCBtoenableattachmentofthecustomer’sthermalsolution.MoredetailsareprovidedinSection
3.2
“MechanicalInformation.”Customer’ssystemthermalsolutionmustprovideadequatecoolingtomaintainallthecomponentsonthePCBincludingtheXavierSoCbelowthemaximumtemperaturespecificationsasdetailedinSection
2.1
andSection
3.1.
XavierSoCTemperature
TheXavierSoCjunctiontemperature(Tj)representstheXavierSoCdietemperaturereadfromanyoftheinternaltemperaturesensors.Theon-diethermalsensorsareusedforhigh-temperatureTjmanagementandmanyothertemperature-dependentfunctions.Detailsregardingthesoftwarethermalmechanismsaredescribedin
Chapter4
.
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Chapter2.Specifications
ThermalSpecifications
OnXavierSoC,therearemultipleon-dietemperaturesensorsthatareplacedclosetodominanthotspotsforrealtimemeasurementsofjunctiontemperature.Abuilt-inhardwarecontrollerisusedtoreadthesensorsandengagethermalprotectionmechanisms.
Chapter4
containsthedetailsrelatedtosensorthermalprotectionmechanisms.Thespecificationsin
Table2-1
mustbefollowedinordertomaintaintheperformanceandreliabilityoftheJetsonXavierNXmodule.
Table2-1. JetsonXavierNXThermalSpecifications
Parameter
Value
Units
MaximumXavierSoCoperatingtemperature1
T.cpu=90.5
°C
T.gpu=91.5
°C
T.aux=90.0
°C
XavierSoCshutdowntemperature2
T.cpu=96.0
°C
T.gpu=97.0
°C
T.aux=95.5
°C
Notes:
1TheXavierSoCmaximumoperatingtemperatureisthetemperaturebelowwhichtheproductwilloperateatthespecifiedclockspeeds.Softwarewillapplyclockspeedreductionsoncethistemperatureisreached.NotethatpowerfluctuationsthatinduceTjfluctuationsabovethesethresholdswillcausetemporaryclockreductions.SeeSection
4.3
fordetails.
2TheXavierSoCwillshutdowntheJetsonXavierNXmoduleonceanyofthesesoftware-imposed
temperaturelimitsarereachedinordertomaintainthereliabilityoftheXavierSoC.SeeSection
4.5
fordetails.
Chapter3.DesignGuidance
ThischapterprovidesdesignguidanceinordertomeettheJetsonXavierNXmodulespecifications.
ThermalInformation
ThedesigngoalforsystemthermalmanagementistokeeptheXavierSoCtemperaturebelowthelimitsspecifiedinSection
2.1.
JetsonXavierNXThermalPerformance
TheJetsonXavierNXmoduleisnotequippedwithasystemlevelthermalsolutiontodissipatetheTMPthermalloadintotheambientenvironment.Itisthecustomer’sresponsibilitytodesignanadequatethermalsolutiontomaintainallthecomponenttemperaturesbelowthede-ratedlimitsasspecifiedin
Table3-1.
Figure3-2
providesamapofthecomponentplacementontheJetsonXavierNXPCBaslistedin
Table3-1.
Thethermalresistancenetworkforthesystemthermalsolutioncanberepresentedwiththefollowingequation:
Where:
𝜃𝜃12
=𝑇𝑇1−𝑇𝑇2
𝑃𝑃
𝜃𝜃12 ThethermalresistancebetweenPoint1andPoint2
𝑇𝑇𝑛𝑛 ThetemperatureatPointn
𝑃𝑃 Theheatload(i.e;dissipatedpower)transferredbetweenPoints1and2
Asimpleexampleofathermalresistancenetworkisshownin
Figure3-1,
whereθjarepresentsthethermalresistancefromTjtotheambientofthesystemthermalsolution.Thethermalresistanceofthesystemthermalsolutionmayincludemultiplecomponentsincluding,butnotlimitedto,thermalinterfacematerial,heatspreaders,andheatsinks.
DesignGuidance
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Figure3-1. ThermalResistanceNetwork
θja
T.j
T.amb
TMP
JetsonXavierNXenablesawidevarietyofapplicationsthatmayexercisedifferentcomponentsonthemodule.ThevariationbetweenapplicationswillcausevariationinheatloadsonthedifferentcomponentsontheJetsonXavierNXandhotspotsindifferentlogicalpartitionsoftheXavierSoC.Whilethesystemthermalsolutionwillhelptospreadtheheatandmakethethermalperformanceasconsistentaspossible,differentapplicationswillhavedifferentlevelsofthermalperformance.ThemoreevenlythemodulepowerisdistributedacrosstheJetsonXavierNXthehigherthethermalperformancewillbe.
Figure3-2. ComponentPlacementMapforJetsonXavierNX
15
2
2
1
9
5
8
4
6
6
10
10
12
13
16
TopSide
6
BottomSide
11
23
14
2
2
18 22
7
17
21
3
19
20
Table3-1. JetsonXavierNXThermalPerformance
Miscellaneous
Comp#onMap
REFDES(s)
Description
Qty
ThermalSpecifications
Tcase
(Number)
(Name)
(Count)
°C
1
U4
T194
1
Refertotable2-
1
2
M1,M2,M3,
M4
LPDDR4xMemory
4
85
3
U506
CPU/GPU/CVVoltageRegulator
1
85
4
Q14
CPU/GPU/CVDualPackageMOSFET
1
115
5
L17
CPU/GPU/CVInductor
1
125
6
C59,C64
CPU/GPU/CVOutputPOSCAP
2
105
7
U512
SOCVoltageRegulator
1
85
8
Q8
SOCDualPackageMOSFET
1
115
9
L5
SOCInductor
1
125
10
C22,C28
SOCOutputPOSCAP
2
105
11
U2
DDRVDD2Regulator
1
85
12
L2
DDRVDD2Inductor
1
85
13
C14
DDRVDD2OutputPOSCAP
1
105
14
U1
DDRVDDQRegulator
1
85
15
L1
DDRVDDQInductor
1
85
16
C11
DDRVDDQOutputPOSCAP
1
105
17
U15
PMIC
1
105
18
L502
PMICSD0Inductor
1
125
19
L98
PMICSD1Inductor
1
125
20
L503
PMICSD2Inductor
1
125
21
L504
PMICSD3Inductor
1
125
22
L505
PMICSD4Inductor
1
125
23
U521
eMMC(onlyinSKU1)
1
95
ComponentsthatwillbecontactedbythethermalsolutionandneedtobemonitoredComponentsthatmustbemonitored
Note:
Table3-1
issubjecttochange.
TherequiredsystemthermalperformancecanbedeterminedbasedontheambienttemperatureconditionsandTMPlevelrequiredbythecustomer.Considerthefollowingexample:
𝑇𝑇.𝑎𝑎𝑎𝑎𝑎𝑎=55°𝐶𝐶
𝑇𝑇.𝑎𝑎𝑎𝑎𝑎𝑎=86.00°𝐶𝐶(Targeting4°𝐶𝐶T.cpuheadroomtoaccountforsensorinaccuracyandpossibleTjfluctuationsresultingfromworkloadvariation)
𝑃𝑃𝑇𝑇𝑇𝑇𝑇𝑇=15𝑊𝑊
Theheatsinkthermalperformancerequirementfortheaboveconditions.
𝜃𝜃
=86°𝐶𝐶−55°𝐶𝐶=𝟐𝟐.𝟎𝟎𝟎𝟎°𝑪𝑪
𝑗𝑗𝑗𝑗
15𝑊𝑊
𝑾𝑾
Inthisexample,a2.06°C/WthermalsolutionisexpectedtobesufficienttomaintaintheXavierSoCwithinthemaximumtemperaturespecificationasdetailedin
Table2-1.
Inadditiontothis,thecustomerisresponsibletoverifythatthisthermalsolutioncanmaintainallothercomponentsofthemodulewithintheirmaximumtemperaturespecificationsasdetailedin
Table3-1.
JetsonXavierNXThermalDesignDetails
Thecustomerisresponsibleforthefollowingitems:
⯈ThermalSolution–AsystemthermalsolutioncapableofcoolingtheappropriateamountofTMPforthetargetworkload.
⯈HS_TIM–Thecustomerisresponsibleforprovidingthethermalinterfacematerial(TIM)betweentheJetsonXavierNXmoduleandcustomer’ssystemlevelthermalsolution.Forbestthermalperformance,theTIMshouldprovidelowthermalimpedancewithinthemechanical,reliability,andcostconstraintsofthecustomer’sproduct.
⯈MaximumTemperature-ToensurethatthemaximumXavierSoCoperatingtemperatureislessthanthevaluespecifiedin
Table2-1,
andthemaximumcomponenttemperaturesonthePCBmustnotexceedthevaluespecifiedin
Table3-1.
Examplethermalstackupisshownin
Figure3-3
.
Figure3-3. ThermalStack-upSchematic
CustomerThermalSolution
XavierTIM
Xavier
PCB
TIM
TIM
Component
Component
CustomerThermalSolution
CustomerThermalSolution
Thecustomer’sthermalsolutionisthemechanicalelementthatinterfacestotheJetsonXavierNXmoduleandprovidescooling.Avarietyofthermalsolutionconfigurationsarepossibledependingonthecustomer’schassisdesign.Inallcases,however,thefollowingrecommendationsareapplicable:
⯈GoodcontactofthethermalsolutiontotheXavierSoCiscriticalformaximizingthethermalperformanceoftheJetsonXavierNX.TheXavierSoCconsumesthemajorityoftheTMP.
⯈Customermustdetermineifsystemthermalsolutionneedstocontactall/selectcomponentsonthePCBtomakesurethattheyaremaintainedwithinthemaximumtemperaturespecificationslistedin
Table2-1.
TemperatureCycling
Long-termreliabilityofallsolderinterconnectsisnegativelyimpactedbytemperaturecycling.Itisthecustomer’sresponsibilitytominimizethecomponent’sexposuretotemperaturecyclingandtonotexceedthatwhichthecomponentisqualified.NVIDIA’sgraphicsandcorelogiccomponentsarequalifiedtoJEDECstandardJESD47.
Note:NVIDIArecommendsthatcustomersrefertoJESD94B(ApplicationSpecificQualificationUsingKnowledgeBasedTestMethodology)formoreinformation.
MechanicalInformation
RefertotheJetsonXavierNXmodulemechanicaldrawingfortheexactmoduledimensionstodeterminehowtointerfacethemoduleboardwiththesystemthermalsolutionandensuremechanicalcompatibility.
HeatSinkMountingGuidelines
Asnotedinthethermalsection,themechanicaldesignofthesystemmustensuregoodcontactbetweenthethermalsolution,XavierSoCandthemoduleboard.Themoduleboardisprovidedwithmountingholestoaccommodatemountingoptionsforasuitableheatsink.
Figure3-4. ModuleBoardwithMountingFeatures
ThefollowingguidelinesshouldbefollowedtoensuregoodmechanicalandthermalcontactbetweenthechassisthermalsolutionandtheModuleboard.
⯈Fourholes(Ø3.2mm)areprovidedneartheXavierSoC(Shownin
Figure3-4
)andtwoholes(Ø2.75mm)ontheedgeoppositetoedgeconnector(Shownin
Figure3-5
).
⯈AllholesareNPTHwithannulargroundpads.TheseholescanbeusedforsystemmountaswellasHeatsinkmountbasedonindividualcustomerdesignintents.
⯈Shoulderscrewscanbeusedforallmountingholelocationstopreventthreaddamagingtheboard.
⯈Maximummountingforceforthethermalsolutionis4kgf.
⯈Thereisakeep-outareabehindthemoduleboardtoallowforbackplatetosupporttheboardwhileheatsinkismountedfromtopside.
⯈
Figure3-5
illustrateswheremoduleprovidesroomforbackplateshouldthedesignrequireabackplatetoassistinstiffeningtheboardandformounting/lockingfeatures.Theoutlineshowsthekeep-outareaforthebackplateonbacksideofthemodule.
Figure3-5. ModuleBoardPCBBackSupportKeepOutArea
AssemblyGuidelines
TheJetsonXavierNXcomeswithJEDECstandard260DDR4SODIMM0.5MMpitchedgeconnectorandareprovidedtointerfacewith260PINDDRSODIMMSOCKETWITH0.5MMPICTH,basedonSO-018.
Orientationoftheunitistobealignedwiththeconnectorandsecuredtothebaseboard.Suggestedhardwareformountingthemoduletothebaseboardisuseofstandoffbetweenthetwoboard,anchoredwithscrewoneachboard.
Herearesomesuggestedassemblyguidelines.
Assembletheheatsinkandfanifneededonthemoduleboard.
InstalltheJetsonXavierNXmodule
BaseboardwithsuitablestandoffforasperSoDIMMconnectorheightdefined
Insertmoduleatanangleof25-35degreeintotheSODIMMconnector.
ArcdownthemoduleboarduntilitlatchestotheSODMMconnector
SecuretheJetsonXavierNXmoduletothebaseboardwithscrewsontothestandoff/spacer.
NVIDIAJetsonXavierNX
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Chapter4.ThermalManagement
TemperatureMode
TheXavierSoCjunctiontemperaturecanbedirectlyreadfromsysfsnodes,asshowninthefollowingexample.Notethatthenameofeachtemperaturezoneisnotedinthetypenodeandthatthetemperaturevaluesarereportedinunitsofm°C.
cat/sys/devices/virtual/thermal/thermal_zone0/typecpu-therm
#cat/sys/devices/virtual/thermal/thermal_zone0/temp35000
FanControl
TheJetsonXavierNXcanbeconfiguredtocontrolasystemfan.Pulsewidthmodulation(PWM)outputandtachometerinputaresupported.JetsonXavierNXhasconfigurablefancontrolofstep-basedspeedcontrolwithhysteresis,asshownin
Figure4-1
and
Figure4-2.
Twodifferentfanmodesettingsareavailableforbetteruserexperience.Thetwofanmodesare“QuietMode”and“CoolMode”respectively.Thedefaultfanmodeissetto“QuietMode.”Thedefaultfancurvesettingsforthe“QuietMode”arelistedin
Table4-1.
Thedefaultfancurvesettingsforthe“CoolMode”arelistedin
Table4-2.
NotethatPWMisconfiguredona2^8scale,with255beingequivalentto100%dutycycle.
ThermalManagement
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Figure4-1. FanControlAlgorithmfor“QuietMode”
Table4-1. DefaultFanControlParametersfor“QuietMode”
“thermalfan-est”ThermalZoneTemperature1
PWM
Hysteresis2(°C)
46
130
8
60
160
8
68
200
7
76
255
7
Notes:
1Fanspeediscontrolledbythethermal-fan-estsensor,whichreportstheweightedaverageoftheCPU,GPU,andAUXsensorsata3:3:4ratio.
2Thehysteresissetforeachtrippointmustbegreaterthantheprevioustrippoint.
Figure4-2. FanControlAlgorithmfor“CoolMode”
Table4-2. DefaultFanControlParametersfor“CoolMode”
“thermalfan-est”ThermalZoneTemperature1
PWM
Hysteresis2(°C)
35
140
8
45
170
8
53
200
7
61
255
7
Notes:
1Fanspeediscontrolledbythethermal-fan-estsensor,whichreportstheweightedaverageoftheCPU,GPU,andAUXsensorsata3:3:4ratio.
2Thehysteresissetforeachtrippointmustbegreaterthantheprevioustrippoint.
Customfansettingscanbeimplementedifneeded.RefertothePlatformAdaptationandBring-upGuidefordetails.
XavierSoCMaximumOperatingTemperature
Therecommendedoperatingtemperaturelimitisthethresholdatwhichthemodulewilloperatewithoutperformancereduction.Thesetemperaturesarelistedin
Table2-1
andcannotbeadjusted.Thecustomer’stoleranceforperformancereductionshoulddeterminetheamountofTjoperatingheadroominthethermalsolutiondesigninordertoaccommodatethetemperaturesensoraccuracyof±3°C.
Softwarethermalmanagementoperatesasfollows:
⯈Whenthemeasuredtemperatureisatorbelowtheoperatingtemperaturethreshold,softwareTjthermalmanagementisnotengagedandthesystemisfreetovarythesystemfrequenciesandvoltages.
⯈Whenthemeasuredtemperaturereachesthethermalmanagementthreshold,theinternalthermalsensorsgenerateaninterrupttosoftware.Atthispointthesoftwarethermalmanagementalgorithmengagesandbeginsperiodicallyperformingthefollowingoperations:
Pollingtemperature.
Runningathermalmanagementcontrolalgorithmtocalculatingthethrottledegree,indicatingtheamountofthrottlingtoapplyduringthenexttimeperiod.
Throttlingthesystemtothelevelofthrottlingindicatedbythethrottlingcontrolalgorithm.Throttlingisappliedthroughlimitsontheclockfrequencyofhigh-powerunitssuchastheCPUandgraphicsprocessingunit(GPU).Higherthrottlingdegreeresultsinlowerfrequencylimits.DVFSpoliciesoperatewithinthesefrequencylimits.
⯈SoftwarethermalmanagementremainsinoperationuntiltheXavierSoCtemperaturehasreturnedtoavaluebelowthethrottlingthresholdandthrottlingdegreehasreturnedtozero.
Note:PowerfluctuationsthatinduceTjfluctuationsabovethesoftwarethermalmanagementthresholdswillcausetemporaryclockreductions.Powerfluctuationsinthetargetworkloadshouldbeevaluatedfortheirpotentialtocausetemperaturetofluctuateabovethesoftwarethreshold.
XavierSoCHardwareThermalThrottling
IfsoftwarethermalmanagementisnotabletomaintaintheXavierSoCtemperature,thenhardwarethermalthrottlingwillengagetopreventthermalshutdown.Tohelpavoidthermalshutdownconditionswithoutbeingoverlyconservative,XavierSoChashardware-engagedclockthrottlingmechanismsthatareusedasalastresorttopreventshutdownconditions.ThiswilllowertheXavierSoCtemperature,butitwillalsosignificantlyreducetheoverall
XavierSoCperformance.TheXavierSoCthrottlesettingscannotbealtered.ThesesettingsareimplementedbyNVIDIAtomeetsafetyandreliabilitystandards.
XavierSoCShutdownTemperature
XavierSoCisratedtooperateatajunctiontemperaturenot-to-exceed105°C.XavierSoChashardwareshutdownmechanismsthatenforcethislimitbyautomaticallyhaltingthesystemwhenthistemperatureisexceeded.
Theshutdowntemperatureshouldnotbereachedatanytimeduringnormaloperation,butitmayoccurifcoolingsystemcomponentsarebroken,jammed,orotherwiseunabletocooltheXavierSoCunderworst-caseconditions.Ifathermalshutdowneventistriggered,thenamajorfaultintheJetsonXavierNXorsystemcoolingsolutionhasoccurred.Thermalshutdowncanbeinitiatedbyanyofthesensorslistedin
Table2-1.
Usingmultiplesensorsenablesoperationclosertothetemperaturelimitwithoutcompromisingreliabilitybyreducingtheuncertaintyassociatedwiththehotspotlocation.
Thefollowingthermalshutdownmechanismhasbeenimplemented:
⯈Internalsensor-basedshutdown.FailsafethermalshutdownisguaranteedbyusingtheSHUTDOWNsignaldirectlyfromXavierSoCtothePMIC.Afterthefailsafeshutdowntheuserwillhavetomanuallyturnthesystemonbypressingthepowerbuttonorequivalentinput.
TheXavierSoCshutdownsettingscannotbealtered.ThesesettingsareimplementedbyNVIDIAtomeetsafetyandreliabilitystandards.
Notice
Thisdocumentisprovidedforinformationpurposesonlyandshallnotberegardedasawarrantyofacertainfunctionality,condition,orqualityofaproduct.NVIDIACorporation(“NVIDIA”)makesnorepresentationsorwarranties,expressedorimplied,astotheaccuracyorcompletenessoftheinformationcontainedinthisdocumentandassumesnoresponsibilityforanyerrorscontainedherein.NVIDIAshallhavenoliabilityfortheconsequencesoruseofsuchinformationorforanyinfringementofpatentsorotherrightsofthirdpartiesthatmayresultfromitsuse.Thisdocumentisnotacommitmenttodevelop,release,ordeliveranyMaterial(definedbelow),code,orfunctionality.
NVIDIAreservestherighttomakecorrections,modifications,enhancements,improvements,andanyotherchangestothisdocument,atanytimewithoutnotice.
Customershouldobtainthelatestrelevantinformationbeforeplacingordersandshouldverifythatsuchinformationiscurrentandcomplete.
NVIDIAproductsaresoldsubjecttotheNVIDIAstandardtermsandconditionsofsalesuppliedatthetimeoforderacknowledgement,unlessotherwiseagreedinanindividualsalesagreementsignedbyauthorizedrepresentativesofNVIDIAandcustomer(“TermsofSale”).NVIDIAherebyexpresslyobjectstoapplyinganycustomergeneraltermsandconditionswithregardstothepurchaseoftheNVIDIAproductreferencedinthisdocument.Nocontractualobligationsareformedeitherdirectlyorindirectlybythisdocument.
UnlessspecificallyagreedtoinwritingbyNVIDIA,NVIDIAproductsarenotdesigned,authorized,orwarrantedtobesuitableforuseinmedical,military,aircraft,space,orlifesupportequipment,norinapplicationswherefailureormalfunctionoftheNVIDIAproductcanreasonablybeexpectedtoresultinpersonalinjury,death,orpropertyorenvironmentaldamage.NVIDIAacceptsnoliabilityforinclusionand/oruseofNVIDIAproductsinsuchequipmentorapplicationsandthereforesuchinclusionand/oruseisatcustomer’sownrisk.
NVIDIAmakesnorepresentationorwarrantythatproductsbasedonthisdocumentwillbesuitableforanyspecifieduse.TestingofallparametersofeachproductisnotnecessarilyperformedbyNVIDIA.Itiscustomer’ssoleresponsibilitytoevaluateanddeterminetheapplicabilityofanyinformationcontainedinthisdocument,ensuretheproductissuitableandfitfortheapplicationplannedbycustomer,andperformthenecessarytestingfortheapplicationinordertoavoidadefaultoftheapplicationortheproduct.Weaknessesincustomer’sproductdesignsmayaffectthequalityandreliabilityoftheNVIDIAproductandmayresultinadditionalordifferentconditionsand/orrequirementsbeyondthosecontainedinthisdocument.NVIDIAacceptsnoliabilityrelatedtoanydefault,damage,costs,orproblemwhichmaybebasedonorattributableto:(i)theuseoftheNVIDIAproductinanymannerthatiscontrarytothisdocumentor(ii)customerproductdesigns.
Nolicense,eitherexpressedorimplied,isgrantedunderanyNVIDIApatentright,copyri
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