EDA技术（机械）实验报告-出租车计费器

PAGEPAGE1 西华大学实验报告第组.第组实验报告（计算机类）开课学院及实验室：机械学院工程实验中心实验时间：学生姓名学号成绩学生所在学院年级/专业/班课程名称EDA技术（机械）课程代码实验项目名称出租车计费器项目代码十一指导教师项目学分一、实验目的（1）学习并掌握Quartus

II

开发系统的基本操作。（2）掌握用Quartus

II进行文本输入法进行电路设计、编译和仿真方法。（3）掌握CPLD/FPGA的开发流程。（4）掌握EDA实验开发系统的使用。（5）设计一个出租车计费器。二、内容与设计思想设计任务如下：（1）实现计费功能，计费标准为：暗行驶里程计费，起步价为7.00元，并在车行3km后暗2.20元/km计费，当计费器达到或超过20元时，每千米加收50%的车费，车停止不计费。（2）现场模拟功能：能模拟汽车启动、停止、暂停以及加速等状态。（3）设计动态扫描电路，将车费和路程显示出来，各有两位小数。三、使用环境Pc计算机,quartusⅡ软件环境核心代码及调试过程出租车计费器JIFEI模块libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityjifeiis port(clk,start,stop,pause,js:instd_logic; q:outstd_logic_vector(3downto0); chefei,luc:outintegerrange0to8000 );endjifei;architecturearc_jifeiofjifeiisbegin process(clk,start,stop,pause,js) variablea,b:std_logic; variableaa:integerrange0to100; variablechf,lc:integerrange0to8000; variablenum:integerrange0to9; begin ifclk'eventandclk='1'then if(stop='0')then chf:=0; num:=0; b:='1'; aa:=0; lc:=0; elsif(start='0')then b:='0'; chf:=700; lc:=0; elsif(start='1'andjs='1'andpause='1')then if(b='0')then num:=num+1; endif; if(num=9)then lc:=lc+5; num:=0; aa:=aa+5; endif; elsif(start='1'andjs='0'andpause='1')then lc:=lc+1; aa:=aa+1; endif; if(aa>=100)then a:='1'; aa:=0; else a:='0'; endif; if(lc<300)then null; elsif(chf<2000anda='1')then chf:=chf+220; elsif(chf>=2000anda='1')then chf:=chf+330; endif; endif; chefei<=chf; luc<=lc; endprocess;endarc_jifei;X模块，将车费和路程转化成4位十进制libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityxis port(daclk:instd_logic; ascore,bscore:inintegerrange0to8000; age,ashi,abai,aqian,bge,bshi,bbai,bqian:outstd_logic_vector(3downto0) );endx;architecturearc_xofxisbegin p1:process(daclk,ascore)variablecomb1:integerrange0to8000; variablecomb1a,comb1b,comb1c,comb1d:std_logic_vector(3downto0); begin ifdaclk'eventanddaclk='1'then ifcomb1<ascorethen ifcomb1a=9andcomb1b=9andcomb1c=9then comb1a:="0000"; comb1b:="0000"; comb1c:="0000"; comb1d:=comb1d+1; comb1:=comb1+1; elsifcomb1a=9andcomb1b=9then comb1a:="0000"; comb1b:="0000"; comb1:=comb1+1; comb1c:=comb1c+1; elsifcomb1a=9then comb1a:="0000"; comb1b:=comb1b+1; comb1:=comb1+1; else comb1a:=comb1a+1; comb1:=comb1+1; endif; else ashi<=comb1b; age<=comb1a; abai<=comb1c; aqian<=comb1d; comb1:=0; comb1a:="0000"; comb1b:="0000"; comb1c:="0000"; comb1d:="0000"; endif; endif; endprocessp1; p2:process(daclk,bscore)variablecomb2:integerrange0to8000; variablecomb2a,comb2b,comb2c,comb2d:std_logic_vector(3downto0); begin ifdaclk'eventanddaclk='1'then ifcomb2<bscorethen ifcomb2a=9andcomb2b=9andcomb2c=9then comb2a:="0000"; comb2b:="0000"; comb2c:="0000"; comb2d:=comb2d+1; comb2:=comb2+1; elsifcomb2a=9andcomb2b=9then comb2a:="0000"; comb2b:="0000"; comb2:=comb2+1; comb2c:=comb2c+1; elsifcomb2a=9then comb2a:="0000"; comb2b:=comb2b+1; comb2:=comb2+1; else comb2a:=comb2a+1; comb2:=comb2+1; endif; else bshi<=comb2b; bge<=comb2a; bbai<=comb2c; bqian<=comb2d; comb2:=0; comb2a:="0000"; comb2b:="0000"; comb2c:="0000"; comb2d:="0000"; endif; endif; endprocessp2; endarc_x;XXX1模块，八选一将车费和路程显示出来libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityxxx1is port( c:instd_logic_vector(2downto0); a1,a2,a3,a4,b1,b2,b3,b4:instd_logic_vector(3downto0); dp:outstd_logic; d:outstd_logic_vector(3downto0) );endxxx1;architecturearc_xxx1ofxxx1isbegin process(c,a1,a2,a3,a4,b1,b2,b3,b4) variablecomb:std_logic_vector(2downto0); begin comb:=c; casecombis when"000"=>d<=a1; dp<='0'; when"001"=>d<=a2; dp<='0'; when"010"=>d<=a3; dp<='1'; when"011"=>d<=a4; dp<='0'; when"100"=>d<=b1; dp<='0'; when"101"=>d<=b2; dp<='0'; when"110"=>d<=b3; dp<='1'; when"111"=>d<=b4; dp<='0'; whenothers=>null; endcase; endprocess;endarc_xxx1;SE模块libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityseis port(clk:instd_logic; a:outstd_logic_vector(2downto0) );endse;architecturearc_seofseisbegin process(clk) variableb:std_logic_vector(2downto0); begin ifclk'eventandclk='1'then ifb="111"then b:="000"; else b:=b+1; endif; endif; a<=b; endprocess;endarc_se;DI译码模块libraryieee;useieee.std_logic_1164.all;entitydiis port(d:instd_logic_vector(3downto0); q:outstd_logic_vector(6downto0) );enddi;architecturedi_arcofdiisbegin process(d) begin casedis when"0000"=>q<="0111111"; when"0001"=>q<="0000110"; when