电子设计自动化中英文对照外文翻译文献

中英文对照外文翻译文献(文档含英文原文和中文翻译)ElectronicDesignAutomationEDA(ElectronicDesignAutomation)technologyisanewtechnologyofthemodernfieldofelectricalengineering,whichprovidescomputer-basedinformationtechnologyandthemethodsofcircuitdesign.EDAtechnologydevelopmentandapplicationofgreatlypromotedthedevelopmentoftheelectronicsindustry.WiththedevelopmentofEDAtechnology,hardwaredesignofelectroniccircuitscanrelyonalmostallcomputerstoaccomplish,thusgreatlyshorteningthecycleofhardwareelectroniccircuitdesign,enablingmanufacturerstoquicklydevelopavarietyofsmallquantitiesofproductstomeetthemarketdemand.EDAtechnology,thebasicideaisthehelpofcomputers,theEDAsoftwareplatformtocompleteelectroniccircuitdesign,simulationandPCBdesignoftheentireprocess.Formorecomplexcircuits,ifnecessary,canbeusedtoimplementprogrammablelogicdevices.EDAtechnologynotonlyontheElectronicCourseandanalysisofsimulationexperimentstoaddressthevarietyoflaboratorycomponents,specificationsandquantityrestrictionsarenotsufficienttoavoiddamagetothestudentsinthelabcomponentsanddevicestostimulateinterestinlearning,todeveloptheiranalysis,electronicproductdesignanddevelopmentability,butalsoe-workerstodesign,developapowerfultoolforelectronicproducts.ThinkingofEDAtechnologyeducationandindustrypromotionisatechnologyhotspotintoday'sworld,EDAtechnologyisindispensableinthemodernelectronicsindustrytoatechnology.EDAtechnologyhasabroadmeaning,butalsoaprogressivedevelopmentofthefieldhasastrongvitality.Today'sEDAtechnologyhasreacheda"systemonachip"(SOC,SystemOnChip)stage.DeveloperscanusethepowerfulEDAdesignsoftware,theuseofIP(IntellectualProperty)IPcore,coupledwithhisinnovativethinking,andbuildtheirowncustomchips,whichhavetheirownIPrightstodesignspecificintegratedcircuit(ASIC,ApplicationSpecificIC.)EDAtechnologyinthepopularityofteaching,practicalapplicationsbasedonprogrammabledevicetechnology,whichincludesfourbasicconditions:①large-scaleprogrammabledevices,itistheuseofEDAtechniquescarrierelectronicsystemdesign;②hardwaredescriptionlanguageItistheuseofEDAtechnologiesforelectronicsystemdesign,themainmeansofexpression;③softwaredevelopmenttools,itistheuseofEDAtechnologiesforintelligentelectronicsystemdesignautomationdesigntools.④experimentaldevelopmentsystem,whichistheuseofEDAtechnologyforelectronicsystemsDownloadtoolsandhardwaredesignverificationtools.ProgrammableLogicControl(CPLD/FPGA)Inourdesign,wewasselectedCPLD/FPGA,ascomparedwiththetraditionalMCUhasmanyadvantages,mainlyinthefollowingareas:①advancedprogrammingveryeasy.CPLD/FPGAproducts,partofthedaisychainin-systemprogrammingmode.Thisadvancedmethodofprogramminghasbecometheworld'sdevelopmenttrendofvarioustypesofprogrammabledevices.Becauseitobviatestheexpensiveandinconvenientoperationdedicatedprogrammer,justneedtodownloadaverysimpleprogrammingcircuitandaPC,printercommunicationcableontheline.Itisnotprogrammedpressure,theTTLlevellinecanbeprogrammedatanytime,andtheso-calledmulti-chipdaisychainserialprogramming.Itsprogrammingupto1milliontimes,suchasLattice'sislesandAMD'sMACHfamily.Inaddition,programmingcaneasilyachieveinfrared,ultrasonicorradioprogrammingprogrammer,orthroughthetelephonelineremoteonlineprogramming.Thesefeaturesareincommunicationdevicesandmilitaryspecialpurposedevices.②highspeed.CPLD/FPGAclockdelayofuptonslevel,combinedwiththeparallelwork,intheultrahigh-speedreal-timemonitoringandcontrolapplicationsandhasaverybroadapplicationprospects.IfyouusetheFLEX10K50ALTERAdevelopmentnetworkimagethroughUSBinterface,real-timeencryption/decryptionASICsystem,carriedoutinFLEX10K50upto56-bitparallelbinaryarithmetic,eachencryption/decryptioncycleofonlyafewμs,andtheMCUtakesnearly1minute.AnotherexampleisinthemoldmanufacturingEDMprocessing,motorcontrol,theeffectiveoperationoftheprocessingpartsfromonlyafewμs,whichisrequiredforthecontrolofsensitiveandhigh-speedcircuitfeedingservice,notashortcircuitorarcingislessthanthebreakdown.Obviously,thiswork,MCUisdifficulttodirectlyparticipate.IfdirectfeedingbyispLSI1032servicecontrol,feedingontheclosed-loopmotorspeedservice,theuseofsamplingispLSIdirectcontroloftheAD1674,8-bitaccuracyusingamaximumspeedof8μs/each,inordertoachieveagoodclosed-loopspeedcontrolofsynchronousand.③highreliability.Inhighreliabilityapplications,MCU'sshortcomingsasaCPLD/FPGAapplicationleftalotofuseless.AlthoughthefunctionofthisgroupdevelopedthedeviceisachievedthroughtheEDAsoftware.Butthephysicalmechanismlikea74LS164aspurelyahardwarecircuitisveryreliable.Throughtherationaldesignofmostapplications,noneedtoconsiderthecomplexresetandinitialization.Designusingasimplestatementjustidleinitialentryintothesame,wecaneffectivelypreventanypossible"death"phenomenon.Becauseitisworkinginparallel,itcanbeusedaseitherinputpininterruptmonitoringissimilartopinMCU,andthereactionrateisonlysatisfiedwonderfulclass.CPLD/FPGA,highreliabilityisalsoreflectedinalmosttheentiresystemcanbedownloadedonthesamechip,thusgreatlyreducingthevolume,easytomanageandshielding.④powerful,applicationsarebroad.Currently,CPLD/FPGAtoselectalargerange,accordingtodifferentapplicationsusedifferentcapacitychips,suchasLattice'sispLSIandAMD'sMACH,thesmallestchipforthe1000equivalentlogicgates,thelargestofseveralonehundredthousand.ALTERAandXILINXgateintroducedmillionsofCPLD/FPGAcanachievealmostanyformofdigitalcircuitsordigitalsystemsdesign.Withthewideapplicationofsuchdevicesandthecostdroppedsignificantly,andthemarketrateincrease,CPLD/FPGAinthesystemrateisalmostequaltothedirectapplicationofASICdevelopment.⑤easytouse,developconvenient.ThedesignofSCMexpertsinapplicationsystemisverysimple.However,forbeginners,suchastheCPU'swork,manyoftheusageofspecialregisters,interruptconcepts,etc.,reallyisnotaneasytask.Incontrast,CPLD/FPGAapplicationdoesnotrequiretoomuchpreparationtolearntheknowledge,aslongasalittlebitofdesignofdigitalcircuitsandcomputersoftwarebasics,youcanintheshorttermtohandlebasicdesignanddevelopmentskills.Andinturn,tolearntouseSCM,itappearedhundredsoftimesmore.Thisisundoubtedlyhighforustoprovideashortcuttolearning,standingontheshouldersofgiants,ofcoursefastertobesuccessful.Itcanbepredicted,thestudyofEDAtechnologyboomandtheCPLD/FPGAapplicationboomneverinferiortoboomoverthepast10years,singlechip.⑥shortdevelopmentcycle.EDAsoftwarefeaturesasthecorrespondingsoundandpowerful,convenientandreal-timesimulationcapabilities,andintuitiveimageofthedevelopmentprocess,andthehardwarefactorsinvolvedverylittle,itcanbeverycomplicatedinaveryshorttimethesystemdesign,whichistheproducttomarketquicklythemostvaluablefeatures.SomeEDAexpertspredict,thefutureoflarge-scalesystemsofCPLD/FPGAdesignisjustallkindsoflogicandthenapplytheIPcore(CORE)oftheassembly,thedesigncycle,onlyhour.TIcompanythateightypercentofanASICIPcorefeaturesavailablesuchasready-madelogicsynthesis.1.DevelopmentoflanguageVHDLVHDL(VeryHighSpeed​​IntegratedCircuitHardwareDescriptionLanguage)isaveryhighspeedintegratedcircuithardwaredescriptionlanguage,itcandescribethefunctionofthehardwarecircuitry,signalconnectivityandthetimebetweenlanguages.Itcanbemoreeffectivethanthecircuitdiagramtoexpressthecharacteristicsofthehardwarecircuit.UsingtheVHDLlanguage,youcanproceedtothegeneralrequirementsofthesystem,sincethedetailedcontentwillbedesignedtocomedowntoearth,andfinallytocompletetheoveralldesignofthesystemhardware.IEEEVHDLlanguagehasbeentheindustrystandardasadesigntofacilitatereuseandsharingtheresults.Atpresent,itcannotbeappliedanalogcircuitdesign,buthasbeenputintoresearch.VHDLprogramstructure,including:entity(Entity),structure(Architecture),configure(Configuration),PackageCollection(Package)andtheLibrary(Library).Amongthem,theentityisthebasicunitofaVHDLprogram,byentityandthestructureoftwoparts:thephysicaldesignsystemthatisusedtodescribetheexternalinterfacesignal;structureusedtodescribethebehaviorofthesystem,thesystemprocessesorsystemdatastructureform.Configurationselecttherequiredlanguagefromthelibrarysystemdesignunittoformdifferentversionsofdifferentspecifications,sothatthefunctionisdesignedtochangethesystem.Collectionofrecordsofthedesignmodulepackagetosharethedatatypes,constants,subroutinesandsoon.Databaseusedtostorethecompiledentities,thebodystructure,includingthecollectionandconfiguration:oneisthedevelopmentofengineeringsoftwareuser,theotheristhemanufacturer'sdatabase.VHDL,themainfeaturesare:①powerful,highflexibility:VHDLlanguageisapowerfullanguagestructure,clearandconcisecodecanbeusedtodesigncomplexcontrollogic.VHDLlanguagealsosupportshierarchicaldesign,supportdesigndatabasesandbuildreusablecomponents.Currently,VHDLlanguagehasbecomeadesign,simulation,synthesisofstandardhardwaredescriptionlanguage.②Deviceindependence:VHDLlanguageallowsdesignerstogenerateadesigndonotneedtofirstselectaspecificdevice.Forthesamedesigndescription,youcanuseavarietyofdifferentdevicestructurestoachieveitsfunction.Sothedesigndescriptionstage,abletofocusondesignideas.Whenthedesign,simulation,aftertheadoptionofaspecificdevicespecifiedintegrated,adaptercanbe.③Portability:VHDLlanguageisastandardlanguage,sotheuseofVHDLdesigncanbecarriedoutbydifferentEDAtoolsupport.Transplantedfromonetoanothersimulationtoolssimulationtools,synthesistoolsfromaporttoanotherintegratedtool,fromaworkingplatformintoanotherworkingplatform.EDAtoolsusedinatechnicalskills,inothertoolscanalsobeused.④top-downdesignmethods:thetraditionaldesignapproachisbottom-updesignorflatdesign.Bottom-updesignmethodologyistostartthebottomofthemoduledesign,thegradualformationofthefunctionalmodulesofcomplexcircuits.Advantageofthisdesignisobviousbecauseitisahierarchicalcircuitdesign,thegeneralcircuitsub-moduleareinaccordancewiththestructureorfunctionofdivision,sothecircuitlevelclear,clearstructure,easypeopletodevelop,whilethedesignarchivefileiseasy,easycommunication.Bottom-updesignisalsoveryobviousshortcomings,theoveralldesignconceptisoftennotleavingbecausethecostofmonthsoflow-leveldesigninvain.Flatdesignisamodulecontainingonlythecircuit,thecircuitdesignisstraightforwardand,withnodivisionstructureandfunction,itisnothierarchicalcircuitdesign.Advantagesofsmallcircuitdesigncansavetimeandeffort,butwiththeincreasingcomplexityofthecircuit,thisdesignhighlightstheshortcomingsoftheabnormalchanges.Top-downdesignapproachistodesigntop-levelcircuitdescription(topmodel),andthenthetop-levelsimulationusingEDAsoftware,ifthetop-leveldesignofthesimulationresultsmeettherequirements,youcancontinuetolowerthetop-levelmodulebythedivisionlevelandsimulation,designofsuchalevelwilleventuallycompletetheentirecircuit.Top-downdesignmethodcomparedwiththefirsttwoareobviousadvantages.⑤richdatatypes:asahardwaredescriptionlanguageVHDLdatatypesareveryrichlanguage,inadditiontoVHDLlanguageitselfdozensofpredefineddatatypes,intheVHDLlanguageprogrammingalsocanbeuser-defineddatatypes.Std_logicdatatypesinparticulartheuseofVHDLlanguagecanmakethemostrealisticcomplexsignalsinanalogcircuits.⑥modelingconvenience:theVHDLlanguagecanbeintegratedinthestatementandthestatementareavailableforsimulation,behaviordescriptionability,thereforeparticularlysuitableforsignalmodelinglanguageVHDL.ThecurrentVHDLsynthesizertocomplexarithmeticcomprehensivedescriptions(suchas:QuartusⅡ2.0andaboveversionsofstd_logic_vectortypeofdatacanadd,subtract,multiply,divide),sothecircuitmodelingforcomplexsimulationofVHDLlanguage,whetherorcomprehensivedescriptionofthelanguageareveryappropriate.⑦richruntimeandpackages:ThecurrentpackagesupportsVHDL,veryrich,mostlyintheformoflibrariesstoredinaspecificdirectory,theusercanatanytime.SuchastheIEEElibrarycollectionstd_logic_1164,std_logic_arith,std_logic_unsignedotherpackage.IntheCPLD/FPGAsynthesis,EDAsoftwarevendorscanalsousethevariouslibrariesandprovidepackage.VHDLlanguageandtheuserusingavarietyofresultscanbestoredinalibrary,inthedesignofthefollow-upcancontinuetouse.⑧VHDLlanguageisamodelinghardwaredescriptionlanguage,sowithordinarycomputerlanguages​​areverydifferent,commoncomputerlanguageistheCPUclockaccordingtothebeat,afteraninstructiontoperformthenextinstruction,soinstructionisasequential,thatistheorderofexecution,andexecutionofeachinstructiontakesaspecifictime.VHDLlanguagetodescribetheresultswiththecorrespondinghardwarecircuit,whichfollowsthecharacteristicsofhardware,thereisnoorderofexecutionofthestatementisexecutedconcurrently;andstatementsthatdonotlikeordinarysoftware,takesometimeeachinstruction,justfollowtheirownhardwaredelay.2.DevelopmentEnvironmentMAX+PLUSⅡ/QUARTERⅡAlteraCorporationistheworld'sthreemajorCPLD/FPGAmanufacturersofthedevicesitcanachievethehighestperformanceandintegration,notonlybecauseoftheuseofadvancedtechnologyandnewlogicstructure,butalsobecauseitprovidesamoderndesigntoolsMAX+PLUSⅡprogrammablelogicdevelopmentsoftware,thesoftwareislaunchedthethirdgenerationofAlteraPLDdevelopmentsystem.NothingtodowiththestructureprovidesadesignenvironmentforAlteraCPLDdesignerstoeasilydesignentry,quickprocessing,anddeviceprogramming.MAX+PLUSⅡprovidesacomprehensivelogicdesigncapabilities,includingcircuitdiagrams,textandwaveformdesignentryandcompilation,logicsynthesis,simulationandtiminganalysis,anddeviceprogramming,andmanyotherfeatures.Especiallyintheschematicso,MAX+PLUSⅡisconsideredthemosteasytouse,themostfriendlyman-machineinterfacePLDdevelopmentsoftware.MAX+PLUSⅡcandevelopanythingotherthantheadditionAPEX20KCPLD/FPGA.MAX+PLUSⅡdevelopmentsystemhasmanyoutstandingfeatures:①openinterface.②designandconstructionrelated:MAX+PLUSⅡsupportAltera'sClassic,ACEX1K,MAX3000,MAX5000,MAX7000,MAX9000,FLEX6000,FLEX8000andFLEX10Kseriesofprogrammablelogicdevices,gatecountis600~250000doors,offerstheindustryreallyhasnothingtodowiththestructureofprogrammablelogicdesignenvironment.MAX+PLUSⅡcompileralsoprovidesapowerfullogicsynthesisandoptimizationtoreducetheburdenontheuser'sdesign.③canberunonmultipleplatforms:MAX+PLUSⅡsoftwarePC-basedWindowsNT4.0,Windows98,Windows2000operatingsystems,butalsoinSunSPARCstations,HP9000Series700/800,IBMRISCSystem/6000suchasrunonworkstations.④fullyintegrated:MAX+PLUSⅡsoftwaredesigninput,processing,calibrationfunctionsarefullyintegratedwithintheprogrammablelogicdevelopmenttools,whichcanbedebuggedmorequicklyandshortenthedevelopmentcycle.⑤modulartools:designerscaninputfromavarietyofdesign,editing,calibrationandprogrammingtoolstochoosethedevicetoformauser-styledevelopmentenvironment,whennecessary,toretainonthebasisoftheoriginalfeaturestoaddnewfeatures.TheMAX+PLUSⅡSeriessupportsavarietyofdevices,designersneedtolearnnewdevelopmenttoolsforthedevelopmentofnewdevicestructures.⑥mail-descriptionlanguage(HDL):MAX+PLUSⅡsoftwaresupportsavarietyofHDLdesignentry,includingthestandardVHDL,VerilogHDLandAltera'sowndevelopedhardwaredescriptionlanguageAHDL.⑦MegaCoreFunction:MegaCorearepre-validatedfortherealizationofcomplexsystem-levelfunctionsprovidedbytheHDLnetlistfile.ItACEX1K,MAX7000,MAX9000,FLEX6000,FLEX8000andFLEX10Kdevicesprovidethemostoptimaldesign.UserscanpurchasethemfromtheAlteraMegaCore,usingthemcanreducethedesigntask,designerscanmakemoretimeandenergytoimprovethedesignandfinalproductup.⑧OpenCoreFeatures:MAX+PLUSⅡsoftwarewithopencharacteristicsofthekernel,OpenCorecometobuyproductsfordesignersdesigntheirownassessment.Atthesametime,MAX+PLUSⅡtherearemanyotherdesignentrymethods,including:①graphicdesigninput:MAX+PLUSⅡgraphicdesigninputthanothersoftwareeasiertousefeatures,becausetheMAX+PLUSⅡprovidesarichlibraryunitforthedesignercalls,especiallyintheMAX2LIBintheprovisionofthemflibraryincludesalmostall74seriesofdevices,intheprimlibraryprovidesalloftheseparatedigitalcircuitdevices.Solongasadigitalcircuitknowledge,almostnolearningcantakeadvantageofexcessMAX+PLUSⅡforCPLD/FPGAdesign.MAX+PLUSⅡalsoincludesavarietyofspeciallogicmacros(Macro-Function)andtheparametersofthetrillionofnewfeatures(Mega-Function)module.Fulluseofthesemodulesaredesignedtogreatlyreducetheworkloadofdesignerstoshortendesigncyclesandmultiply.②Enterthetexteditor:MAX+PLUSⅡtextinputlanguageandcompilersystemsupportsAHDL,VHDLlanguage,VERILOGlanguageofthethreeinputmethods.③waveinput:Ifyouknowtheinput,outputwaveform,thewaveforminputcanalsobeused.④hybridapproach:MAX+PLUSⅡdesignanddevelopmentenvironmentforgraphicaldesignentry,texteditinginput,waveformeditinginputhybridediting.Todo:ingraphicsediting,waveformeditingmodulebyeditingthetextinclude"modulename.Inc"ortheuseofFunction(.....)Return(....)Waycall.Similarly,thetexteditingmoduleinputformcanalsobecalledwhenthegraphicseditor,AHDLcompilerresultscanbeusedintheVHDLlanguage,VHDLcompileroftheresultscanalsobeenteredintheAHDLlanguageorgraphictouse.Thisflexibleinputmethods,todesigntheuserhasbroughtgreatconvenience.Altera'sQuartusⅡisacomprehensivePLDdevelopmentsoftwaretosupporttheschematic,VHDL,VerilogHDL,andAHDL(AlteraHardwareDescriptionLanguage)andotherdesigninputforms,embeddeddevices,andintegrateditsownsimulator,youcancompletethedesigninputtocompletethehardwareconfigurationofthePLDdesignprocess.QuartusⅡintheXP,LinuxandUnixontheuse,inadditiontousingtheTclscripttocompletethedesignprocess,toprovideacompletegraphicaluserinterfacedesign.Withrunningspeed,unifiedinterface,featureset,easytouseandsoon.Altera'sQuartusⅡsupportIPcore,includingtheLPM/MegaFunctionmacrofunctionmodulelibrary,allowinguserstotakefulladvantageofsophisticatedmodules,simplifyingthedesigncomplexityandspeedupthedesignspeed.Goodforthird-partyEDAtoolsupportalsoallowstheusertothevariousstagesinthedesignprocessusingthefamiliarthird-partyEDAtools.Inaddition,QuartusⅡandDSPBuildertoolsandbyMatlab/Simulinkcombination,youcaneasilyachieveavarietyofDSPapplications;supportAltera'sprogrammablesystemchip(SOPC)development,setsystem-leveldesign,embeddedsoftwaredevelopment,programmablelogicdesigninone,isacomprehensivedevelopmentplatform.MAX+PLUSⅡgenerationasAltera'sPLDdesignsoftware,duetoitsexcellenteaseofusehasbeenwidelyused.AlterahasnowstoppedMAX+PLUSⅡupdatesupport,QuartusⅡnotonlysupportthedevicetypeascomparedtotherichandthegraphicalinterfacechanges.AlteraQuartusⅡincludedinmanysuchSignalTapⅡ,ChipEditorandRTLViewerdesignaids,integratedSOPCandHardCopydesignprocess,andinheritMAX+PLUSⅡfriendlygraphicalinterfaceandeasytouse.MAX+PLUSⅡgenerationasAltera'sPLDdesignsoftware,duetoitsexcellenteaseofusehasbeenwidelyused.AlterahasnowstoppedMAX+PLUSⅡupdatesupport,QuartusⅡnotonlysupportthedevicetypeascomparedtotherichandthegraphicalinterfacechanges.AlteraQuartusⅡincludedinmanysuchSignalTapⅡ,ChipEditorandRTLViewerdesignaids,integratedSOPCandHardCopydesignprocess,andinheritMAX+PLUSⅡfriendlygraphicalinterfaceandeasytouse.AlteraQuartusⅡasaprogrammablelogicdesignenvironment,duetoitsstrongdesigncapabilitiesandintuitiveinterface,moreandmoredigitalsystemsdesignerswelcome.Altera'sQuartusⅡisthefourthgenerationofprogrammablelogicPLDsoftwaredevelopmentplatform.Theplatformsupportsaworkinggroupunderthedesignrequirements,includingsupportforInternet-basedcollaborativedesign.QuartusplatformandCadence,ExemplarLogic,MentorGraphics,SynopsysandSynplicityEDAvendorsandotherdevelopmenttoolsarecompatible.LogicLockimprovethesoftwaremoduledesignfeatures,addedFastFitcompileroptions,andpromotethenetworkeditingperformance,andimproveddebuggingcapabilities.MAX7000/MAX3000devicesandotheritemstosupporttheproduct.电子设计自动化EDA(电子设计自动化)技术是现代电子工程领域的一项新技术,它提供了计算机信息技术和电路设计方法。EDA技术的发展和应用,极大地促进了电子行业的发展。EDA技术的发展,硬件设计的电子电路可以依赖几乎所有电脑完成,从而大大缩短周期的硬件电子电路设计,让制造商快速开发各种少量的产品,以满足市场需求。EDA技术,基本观点是电脑的帮助下,EDA软件平台来完成电子电路设计、仿真和PCB设计的整个过程。对于更复杂的电路,如有必要,可用于实现可编程逻辑器件。EDA技术不仅在电子课程和分析仿真实验来解决各种各样的实验室组件,规格和数量限制是不够的,以避免伤害到学生在实验室组件和设备来刺激学习兴趣,开发他们的分析、电子产品的设计和开发能力,但也e工人设计,开发一个强大的工具,电子产品。思想教育和行业的EDA技术推广是一个技术热点在当今世界,EDA技术是现代电子工业中不可或缺的技术。EDA技术具有广泛的含义,但也是一个渐进发展的领域有强大的生命力。今天的EDA技术已经达到了一个“片上系统(SOC芯片,系统)阶段。开发人员可以使用强大的EDA设计软件,使用IP(知识产权)的IP核心,加上他的创新思维,构建自己的定制芯片,它具有自己的知识产权设计专用集成电路(ASIC,特定于应用程序的集成电路)。EDA技术在教学的普及,基于可编程设备的实际应用技术,其中包括四个基本条件:①大规模可编程设备,它是利用EDA技术载体的电子系统设计;②硬件描述语言它是使用EDA技术的电子系统设计,主要表达情感的方式;③软件开发工具,它是使用EDA技术的智能电子系统设计自动化设计工具。④实验开发系统,它是使用EDA技术在电子系统下载工具和硬件设计验证工具。可编程逻辑控制(CPLD/FPGA)在我们的设计中我们之所以选用CPLD/FPGA，因为它与传统的MCU相比有着许多优点，主要有以下几个方面：①编程方式简便先进。CPLD/FPGA产品中部分是采用菊花链在系统编程方式的。这种先进的编程方式已成为当今世界上各类可编程器件发展的趋势。因为它省却了价格昂贵，操作不便的专用编程器，只需要一个十分简单的下载编程电路和一条PC机的打印机通讯线就行了。它无须编程高压，在TTL电平下随时可进行在线编程，并可进行所谓菊花链式多片串行编程。其编程次数多达1万次，如Lattice的isles和AMD公司的MACH系列。此外，还可轻易地实现红外编程，超声编程或无线编程，或通过电话线远程在线编程。这些功能在通讯器件和军事器件上有特殊用途。②高速。CPLD/FPGA的时钟延迟可达ns级，结合其并行工作方式，在超高速应用领域和实时测控方面有非常广阔的应用前景。如果利用ALTERA的FLEX10K50开发通过USB接口的网络图像实时加密/解密ASIC系统，在FLEX10K50中进行高达56位二进制的并行四则运算，每一加密/解密周期只需数μs，而MCU需时近1分。又如在模具制造业的电火花成型加工中，电机控制的加工件的有效运行距离仅数μs，这要求极敏感和高速的控制饲服电路系统，否则不是发生短路拉弧，就是击穿不足。显然，这方面的工作，MCU也是难于直接参与的。如果利用ispLSI1032进行直接饲服控制，对测速电机的闭环饲服，利用ispLSI对AD1674直接进行采样控制，8位采用精度，最高速度达8μs/每次，从而实现了良好的闭环同步和变速控制。③高可靠性。在高可靠应用领域，MCU的缺憾为CPLD/FPGA的应用留下了很大的用武之地。这组器件尽管在功能开发上是通过EDA软件实现的。但物理机制却像一片74LS164那样纯属硬件电路，十分可靠。通过合理设计，大多数应用中，无须考虑复杂的复位和初始化。设计中只需利用简单的语句将闲置状态导入同一初始入口，就能有效防止任何可能的“死机”现象。由于是并行工作，它的任一输入脚都可用作类似于MCU的中断监测引脚，且反应速度仅为纳妙级。CPLD/FPGA的高可靠性还表现在几乎可将整个系统下载于同一芯片中，从而大大缩小了体积，易于管理和屏蔽。④功能强大，应用广阔。目前，CPLD/FPGA的可选择范围很大，可根据不同的应用选用不同容量的芯片，如Lattice的ispLSI和AMD公司的MACH，最小芯片的等效逻辑门为1000门，最大达数十万门。ALTERA和XILINX公司推出的百万门的CPLD/FPGA可实现几乎任何形式的数字电路或数字系统的设计。随着这类器件的广泛应用和成本的大幅下降，以及产品上市速率的提高，CPLD/FPGA在系统中的直接应用率正直逼ASIC的开发。⑤易学易用，开发便捷。单片机应用系统的设计对于行家里手来说是十分简单的事。然而，对于初学者，诸如CPU的工作方式、众多特殊寄存器的用法、中断概念等等，着实不是一件容易的事。相比之下，CPLD/FPGA应用的学习却不需要太多的预备知识，只要稍具一点数字电路和计算机软件设计的基础知识，就能在短期内掌握基本的设计方法和开发技巧。而且反过来去学用单片机，就显得轻车熟路多了。这无疑是高技术为我们的学习提供了捷径，站在巨人的肩膀当然能更快地获得成功。可以预言，我国EDA技术的学习热潮和CPLD/FPGA的应用热潮决不会逊色于过去10年的单片机热潮。⑥开发周期短。由于相应的EDA软件功能完善而强大，仿真能力便捷而实时，开发过程形象而直观，兼之硬件因素涉及甚少，因此可以在很短时间内完成十分复杂的系统设计，这是产品快速进入市场的最宝贵的特征。一些EDA专家预言，未来的大系统的CPLD/FPGA设计仅仅是各类再应用逻辑与IP核(CORE)的拼装，其设计周期仅以小时计。TI公司认为，一个ASIC百分之八十的功能可用IP核等现成逻辑合成。一.开发语言VHDLVHDL(VeryHighSpeedIntegratedCircuitHardwareDescriptionLanguage)是非常高速集成电路硬件描述语言，是可以描述硬件电路的功能、信号连接关系及定时关系的语言．它能比电路原理图更有效地表示硬件电路的特性。使用VHDL语言，可以就系统的总体要求出发，自上至下地将设计内容细化，最后完成系统硬件的整体设计。VHDL语言已作为一种IEEE的工业标准，设计结果便于复用和交流。目前，它还不能应用于模拟电路的设计，但已有人投入研究。VHDL程序结构包括：实体(Entity)、结构体(Architecture)、配置(Configuration)、包集合(Package)及库(Library)。其中，实体是一个VHDL程序的基本单元，由实体说明和结构体两部分组成：实体说明用于描述设计系统的外部接口信号；结构体用于描述系统的行为、系统数据的流程或系统组织结构形式。配置用语从库中选取所需的单元来组成系统设计的不同规格的不同版本，使被设计系统的功能发生变化。包集合存放各设计模块能共享的数据类型、常数、子程序等。库用于存放已编译的实体、构造体、包集合及配置：一种是用户自己开发的工程软件，另一种是制造商提供的库。VHDL语言的主要特点是：①功能强大，灵活性高：VHDL语言是一种功能强大的语言结构，可用简洁明确的代码来进行复杂控制逻辑的设计。同时VHDL语言还支持层次化的设计，支持设计库和可重复使用的元件生成。目前，VHDL语言已成为一种设计、仿真、综合的标准硬件描述语言。②器件无关性：VHDL语言允许设计者在生成一个设计时不需要首先选择一个具体的器件。对于同一个设计描述，可以采用多种不同器件结构来实现其功能。因此设计描述阶段，可以集中精力从事设计构思。当设计、仿真通过后，指定具体的器件综合、适配即可。③可移植性：VHDL语言是一种标准的语言，故采用VHDL进行的设计可以被不同的EDA工具所支持。从一个仿真工具移植到另一个仿真工具，从一个综合工具移植到另一个综合工具，从一个工作平台移植到另一个工作平台。在一个EDA工具中采用的技术技巧，在其它工具中同样可以采用。④自顶向下的设计方法：传统的设计方法是，自底向上的设计或平坦式设计。自底向上的设计方法是先从底层模块设计开始，逐渐由各个模块形成功能复杂的电路。这种设计方法优点是很明显的，因为它是一种层次设计电路，一般电路的子模块都是按照结构或功能划分，因此这种电路层次清楚，结构明确，便于多人合作开发，同时设计文件易于存档，易于交流。自底向上设计方法的缺点也很明显，往往由于整体设计思路不对而使的花费几个月的低层设计付之东流。平坦式设计是整个电路只含有一个模块，电路的设计是平铺直叙的，没有结构和功能上的划分，因此不是层次电路的设计方式。优点是小型电路设计时可以节省时间和精力，但随着电路复杂程度的增加，这种设计方式的缺点变的异常突出。自顶向下的设计方法是将要设计的电路进行最顶层的描述（顶层建模），然后利用EDA软件进行顶层仿真，如果顶层设计的仿真结果满足要求，则可以继续将顶层划分的模块进行低一级的划分并仿真，这样一级一级设计最终将完成整个电路的设计。自顶向下的设计方法与前面两种方法相比优点是很明显的。⑤数据类型丰富：作为硬件描述语言的一种VHDL语言的数据类型非常丰富，除了VHDL语言自身预定义的十种数据类型外，在VHDL语言程序设计中还可以由用户自定义数据类型。特别是std_logic数据类型的使用，使得VHDL语言能最真实模拟电路中的复杂信号。⑥建模方便：由于VHDL语言中可综合的语句和用于仿真的语句齐备，行为描述能力强，因此VHDL语言特别适合信号建模。目前VHDL的综合器能对复杂的算术描述进行综合（如：QuartusⅡ2.0以上的版本都能对std_logic_vector类型的数据进行加、减、乘、除），因此对于复杂电路的建模VHDL语言无论仿真还是综合都是非常合适的描述语言。⑦运行库和程序包丰富：目前支持VHDL语言的程序包很丰富，大多以库的形式存放在特定的目录下，用户可随时调用。如IEEE库收集了std_logic_1164、std_logic_arith、std_logic_unsigned等程序包。在CPLD/FPGA综合时，还可以使用EDA软件商提供的各种库和程序包。而且用户利用VHDL语言编写的各种成果都可以以库的形式存放，在后续的设计中可以继续使用。⑧VHDL语言是一种硬件电路的建模描述语言，因此与普通的计算机语言有较大差别，普通计算机语言是CPU按照时钟的节拍，一条指令执行完后才能执行下一条指令，因此指令执行是有先后顺序的，也即是顺序执行，而每条指令的执行占用特定的时间。而与VHDL语言描述结果相对应的是硬件电路，它遵循硬件电路的特点，语句的执行没有先后顺序，是并发的执行的；而且语句的执行不象普通软件那样每条指令占用一定的时间，只是遵循硬件电路自身的延迟时间。二.开发环境MAX+PLUSⅡ/QUARTERⅡAltera公司是世界三大CPLD／FPGA厂家之一，它的器件能达到最高的性能和集成度，不仅仅因为采用了先进的工艺和全新的逻辑结构，还在于它提供了现代化的设计工具一MAX+PLUSⅡ可编程逻辑开发软件，该软件是Altera公司推出的第三代PLD开发系统。提供了一种与结构