CS5216瑞奇达DP转HDMI芯片中文规格书（2021新版）

CS5216Datasheet

JitterCleaning3.0GbpsHDMIRepeater

CapStoneSemiconductorCorp.

CS5216

Datasheet

Contents

1

2

3

Introduction5

Features6

PinDefinition7

3.1

3.2

PinAssignments7

PinDescription7

4

ElectricalSpecifications10

4.1

4.2

4.3

AbsoluteMaximumConditions10

OperatingConditions10

ElectricalSpecification10

5

6

7

PackageSpecification13

OrderingInformation15

RevisionHistory16

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CS5216

Datasheet

ListofFigures

Figure1-1CS5216BlockDiagram5

Figure3-1CS5216PinLayout7

Figure5-1CS5216PackageOutline(QFN40Leads5x5mm)13

2

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CS5216

Datasheet

ListofTables

Table3-1CS5216PinDefinitions7

Table4-1AbsoluteMaximumConditions10

Table4-2NormalOperatingConditions10

Table4-3DCElectricalSpecification10

Table4-4ACElectricalSpecification12

Table5-1PackageDimension14

Table6-1CS5216OrderingInformation15

Table7-1DocumentRevisionHistory16

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CS5216

Datasheet

1Introduction

TheCapstoneCS5216isasingleportHDMI/DVILevelShifter/Repeaterwithre-timing.ItsupportsACandDC

coupledTMDSsignalsupto3.0-Gbpsoperationwithprogrammableequalizationandjittercleaning.Itincludes

Type2Dual-ModeDPCableAdaptorregisterswhichcanbeusedtoidentifythecableadaptor’scapabilities.The

jittercleaningPLLcanbettermeetHDMIjittercomplianceforhigherdatarates.Deviceoperationand

configurationcanberealizedthroughpinsettingsorI2Cbus.Automaticpowerdownandsquelchprovide

flexiblepowermanagement.

Equalizer

&ClockDetector

Sampler

&De-Skew

IN

Transmitter

OUT

PLL

AUX-to-DDCBridge

SCL_SNK

SDA_SNK

DDCActiveBuffer

Type2CableAdapterRegister

HPDLevel

Shift

HPD_SRC

CTLPins

HPD_SNK

I2CSlave

ControlRegister

Figure1-1CS5216BlockDiagram

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CS5216

Datasheet

2Features

General

ComplianttoHDMI1.4bspecificationupto3.0Gbps

Supports4Kx2K&3DvideoformatsoverHDMI

ACcouplingcapableforlevelshifting

DCcouplingcapableforrepeating

ProgrammablereceiverequalizationtocompensateforPCBand/orconnectorlosses

JitterCleaningPLLforbestcompliance

SuperiorIntra-pairandInter-pairde-skewing

Built-inDDCActivebufferingSide-bandSignals

ProgrammableTMDSoutputpre-emphasis

Automaticpowerdownmanagement

Automaticsquelchforfail-safeandpowermanagement

Type2Dual-ModeDPCableAdaptorregistersaccessiblebyI2C-over-AUXorDDC

Built-inAUXtoI2CbridgetosupportAUX-onlyGPU

Lowpowerconsumption

PincontrolmodeorI2Ccontrolmodeforflexibility

HDMIDigitalInput

HDMI1.4bcompliant

Built-inhigh-performanceadaptiveequalizer

SupportHotPlugDetection

HDMIDigitalOutput

HDMI1.4bcompliant

Maxdatarateupto3-Gbpsperchannel

Supportupto3840x2160@30Hzor4096x2160@30Hz

MISC

5x5mm40-pinTQFNRoHScompliantandlead-freepackage

0°to70°Coperatingtemperaturerange

ESD:HBM8kV

Power&Technology

Single3.3Vpowersupply

Build-in1.2VLDOforsaveBOMcost

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CS5216

Datasheet

3PinDefinition

3.1PinAssignments

Figure3-1CS5216PinLayout

3.2PinDescription

Table3-1CS5216PinDefinitions

Pin#

Description

Type

PU/PD

Note

Power/Ground

3.3VPower

11

VDD33

VDD33

DVDD12

AVDD12

VDD12

GND

P

P

P

P

P

G

37

3.3VPower,alsoLDOinput

Digital1.2VPower

Analog1.2VPower

LDOoutput

19

20,31

40

41

e-PAD

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CS5216

Datasheet

Pin#

Description

Type

PU/PD

Note

High-speedInterface

1,2

IN_D2P/N

Analog

Analog

Analog

Analog

Analog

Analog

Analog

Analog

I

I

HDMIdatachannel2differentpairinput

HDMIdatachannel1differentpairinput

HDMIdatachannel0differentpairinput

HDMIclockdifferentialpairinput

4,5

IN_D1P/N

6,7

IN_D0P/N

I

9,10

30,29

27,26

25,24

22,21

IN_CKP/N

I

OUT_D2P/N

OUT_D1P/N

OUT_D0P/N

OUT_CKP/N

O

O

O

O

HDMIdatachannel2differentpairoutput

HDMIdatachannel1differentpairoutput

HDMIdatachannel0differentpairoutput

HDMIclockdifferentialpairoutput

Low-speedInterface

3

HPD_SRC

HPD_SNK

LVTTL

LVTTL

O

I

HotplugdetectiontoSource,3.3VCMOSoutput

HotplugdetectionfromSink.Internalpulldownat150kΩ±20%;5V

tolerantCMOSinput

28

Note:Whenautomaticpowerdownisenabled,chipwillbepowered

downwhennocableispluggedin(noSinkdevicesdetected).

Multi-inputpins.EitherforsourcesideDDCdatalinesorAUX-only

sideband.Needexternal2KΩresistorpullupto3.3V.

39

38

SDA_SRC/AUXN

SCL_SRC/AUXP

Analog

Analog

I/O

I/O

Multi-inputpins.EitherforsourcesideDDCclocklinesorAUX-

onlysideband.Needexternal2KΩresistorpullupto3.3V.

33

32

34

SDA_SNK

SCL_SNK

CEC_EN

LVTTL

LVTTL

LVTTL

I/O

I/O

O

SinksideDDCdataline.5VtolerantI/O.

SinksideDDCclockline.5VtolerantI/O.

CECconnectionenable

Configuration

L:PowerdownLDO

36

8

PD#

LVTTL

I

I

H:PowerupLDO

L,M:Pincontrolwithfulljittercleaning

H:I2CcontrolwithdefaultI2Caddress

I2C_CTL_EN

3-state

InPincontrolmode:

L:DDCbufferwithdefaultthreshold

M:DDCbufferwiththreshold1

H:DDCbufferwiththreshold2

InI2Ccontrolmode:

14

DDCBUF/CSDA

3-state

I/O

ConfigI2Cdata

InPincontrolmode:

Reserved.

InI2Ccontrolmode:

13

17

CSCL

LVTTL

I

I

ConfigI2Cclock

InPincontrolmode:

L:EQforchannellossof12.4dB

M:EQforchannellossof4.3dB

H:EQforchannellossof8.6dB

InI2Ccontrolmode:

EQ/I2C_ADDR0

3-state

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CS5216

Datasheet

Pin#

Description

Type

PU/PDNote

I2CADDRselect0

InPincontrolmode:

L:DVIIDmode

H:HDMIIDmode

InI2Ccontrolmode:

23

CFG/I2C_ADDR1

LVTTL

I

I2CADDRselect1

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CS5216

Datasheet

4ElectricalSpecifications

4.1AbsoluteMaximumConditions

Permanentdamagemayoccurifabsolutemaximumconditionsareviolated.RefertoSection4.2forfunctional

operatinglimits.

Table4-1AbsoluteMaximumConditions

Symbol

Parameter

Min

-0.3

-0.3

-40

-65

—

Typ

—

Max

3.96

1.44

125

Unit

V

VDD33

3.3Vpowerinput

VDD12

TA

1.2Vpowerinput

—

V

Junctiontemperature

—

°C

QJA

Storagetemperature1

—

150

°C

ESDHBM

ESDprotection(Humanbodymodel)

—

TBD

TBD

KV

V

ESDCDM

1.

ESDprotection(ChargeDevicemodel)

—

—

Max260°Ccanbeguaranteedwithmax8secsolderingtime.

4.2OperatingConditions

Table4-2NormalOperatingConditions

Symbol

VDD12_OUT

VDD33

Parameter

Min

1.1

3.0

1.1

1.1

-10

—

Typ

1.2

Max

1.3

3.6

1.3

1.3

70

Unit

1.2VLDOoutput

V

V

3.3Vpowerinput

3.3

DVDD12

AVDD12

TA

1.2Vpowerinput

1.2

V

1.2Vpowerinput

1.2

V

Ambienttemperature

Packagethermalresistance,noairflow

°C

QJA

TBD

—

°C/W

4.3ElectricalSpecification

Table4-3DCElectricalSpecification

Symbol

Parameter

Min

Typ

Max

Unit

Three-levelcontrolpins:DDCBUF,PRE,EQ

VDD33–

0.6

V

IH

Three-levelinputHIGH

V

VDD33/2–

0.5

V

IM

IL

Three-levelinputMID

Three-levelinputLOW

VDD33/2+0.5

0.6

V

V

V

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CS5216

Datasheet

Symbol

Parameter

Min

Typ

Max

Unit

InputHigh-levelcurrent

=VDD33

|I

|I

IH

|

40

uA

V

IH

InputLow-levelcurrent

=0.5V

IL

|

10

uA

V

IL

Controlpins(Internalpull-down):IC_CTL_EN,DCIN_EN,I2C_ADDR1,I2C_ADDR0,CFG

2

V

IH

IL

LVTTLinputHigh-levelvoltage

LVTTLinputLow-levelvoltage

InputHigh-levelcurrent

2

VDD33

0.8

V

V

V

GND

|I

|I

IH

|

40

10

μA

μA

V

IH

=2VtoVDD33

InputLow-levelcurrent

IL

V=GNDto0.8V

IL

|

Controlpins(Internalpull-up):PD#

V

IH

IL

LVTTLinputHigh-levelvoltage

LVTTLinputLow-levelvoltage

InputHigh-levelcurrent

2

VDD33

0.8

V

V

V

GND

|I

|I

IH

|

10

40

μA

μA

V=2VtoVDD33

IH

IL

|

InputLow-levelcurrent

=GNDto0.8V

V

IL

ControlI2CPins:SCL_CTL,SDA_CTL

High-leveloutputvoltage

V

OH

External1.5kΩpull-uptoVDD33,IOL=8

mA

VDD33

0.4

V

V

V

OL

Low-leveloutputvoltage

HPDinputpin:HPD_SNK

V

IH

IL

LVTTLinputHigh-levelvoltage

LVTTLinputLow-levelvoltage

InputHigh-levelcurrent

2

5.3

0.8

V

V

V

GND

|I

|I

IH

|

80

20

uA

uA

V

IH

=2Vto5.3V

InputLow-levelcurrent

IL

V=GNDto0.8V

IL

|

Statusoutputpins:HPD_SRC

LVTTLHigh-leveloutputvoltage

V

OH

2.4

V

V

I

I

OH

=-8mA

V

OL

LVTTLLow-

leveloutput

voltage

OL

=8mA

0.4

TMDSDifferentialinputs:IN_Dxp,IN_Dxn,IN_CKp,IN_CKn

V

V

ID

Peak-to-peakdifferentialinputvoltage

Inputcommonmodevoltage

TMDSterminationvoltage

150

2.2

3

1560

mV

IC

CC

AV-0.04

V

V

AV

CC

3.3

45

3.6

R

T

Inputterminationresistance

50

55

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CS5216

Datasheet

Symbol

Parameter

Min

Typ

Max

Unit

TMDSDifferentialOutputs:OUT_Dxp,OUT_Dxn,OUT_CKp,OUT_CKn

V

OD

Peak-to-peakdifferentialoutputswing

800

1000

1200

mV

mV

Singleendhigh-leveloutputvoltage

AVCC=3.3V,

V

OH

AVcc-10

AVcc+10

Singleendlow-leveloutputvoltage

RT=50ohm

V

OL

AVcc-600

-10

AVcc-400

mV

I

I

OFF

SC

Singleendstandbyoutputcurrent

Outputshortcircuitcurrent

10

12

uA

mA

Resistors

R

RX-TERM

Differentialinputterminationresistor

80

120

Ω

Note:Alltypicalvaluesaremeasuredat25°Cand3.3V/1.2Vpowersupply.

Table4-4ACElectricalSpecification

Symbol

Parameter

Min

Typ

Max

Unit

TMDSdifferentialoutputs:OUT_Dyp,OUT_Dyn,OUT_CKp,OUT_CKn

Propagationdelay

low-to-highpropagationdelay

(300MHzclock)

t

t

PLH

PHL

1

1

ms

ms

high-to-lowpropagationdelay

(300MHzclock)

Risetime/falltime(20%~80%)

differentialoutputrisetime

AVcc=3.3V,RT=50Ω

t

t

r

90

90

243

243

ps

ps

differentialoutputfalltime

AVcc=3.3V,RT=50Ω

f

Intra-pair/Inter-pairskew

t

t

sk_intra

sk_inter

intra-pairdifferentialskew

inter-pairdifferentialskew

0.15

0.5

T

bit

bit

T

Clockjitter/Datajitter

tjit

ClockinputjitterClock>165MHz

ClockinputjitterClock<=165MHz

151.5

0.25

ps

T

bit

Clockoutputjitter

@297MHz

tjit

84.2

ps

ps

Clock