EDA实验报告60S电子闹钟

EDA实验报告60S电子闹钟EDA实验报告题目60秒电子闹钟学院电子工程学院专业学生姓名导师姓名初秀琴一功能描述电路上电后自动计时，到达预置的闹响时刻后，由扬声器发出音乐报警。闹响时刻可利用DIP开关设置，两位数：0～59。二设计思路电路主要由分频器、M60计数器、闹铃电路、显示电路等部分组成。秒信号脉冲可由分频器产生，用DIP开关设置闹响时刻，当M60计数器的输出与设置的闹响时刻相等时，闹铃电路输出脉冲驱动扬声器发出音乐报警。总体设计思路如图1所示：七段显示七段显示扬声器显示电路DIP开关闹铃电路M60计数器高频脉冲分频器图1总体设计思路三功能模块1分频器程序代码如下：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitydevideisport( clk :instd_logic;--输入时钟 clk_out :outstd_logic--输出信号 );enddevide;architecturearc_devideofdevideis signalcount:std_logic_vector(14downto0);--定义内部信号 begin process begin waituntilclk'eventandclk='1'; if(count<32767)then--改变最大计数值即可得到不同的分频系数 count<=count+1; clk_out<='1'; endif; endprocess;endarchitecturearc_devide;符号图如图2所示：图2分频器符号图2M60计数器程序代码如下：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitybcd_m60isport( CLK :instd_logic; EN :instd_logic; CR :instd_logic; QL,QH :outstd_logic_vector(3downto0)--8421BCD码个位、十位输出 );endbcd_m60;architecturebehavofbcd_m60is signalcouL,couH:std_logic_vector(3downto0);begin process(CR,CLK) begin ifCR='0'then--异步复位 couL<="0000"; couH<="0000"; elsifclk'eventandclk='1'then ifEN='1'then if(couL=9andcouH=5)then--个位计到9十位计到5回零 couL<="0000"; couH<="0000"; elsifcouL=9then--个位计到9回零十位加1 couL<="0000"; couH<=couH+1; else couL<=couL+1;--否则个位加1 endif; endif; endif; endprocess; QL<=couL; QH<=couH; endbehav;符号图如图3所示：图3M60计数器符号图仿真波形如图4所示：图4M60计数器仿真波形经分析，M60计数器仿真波形正确。3闹铃电路程序代码如下：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityalertisport( STOP :instd_logic;--控制是否响铃 CLK :instd_logic; DIPL,DIPH :instd_logic_vector(3downto0); QL,QH :instd_logic_vector(3downto0); SPEAK :outstd_logic );endalert;architecturebehavofalertisbegin process(STOP,CLK,QL,QH) begin ifSTOP='0'then SPEAK<='0'; elsifQL=DIPLandQH=DIPHthen--输出脉冲驱动扬声器 SPEAK<=CLK; endif; endprocess; endbehav;符号图如图5所示：图5闹铃电路符号图4显示电路程序代码如下：libraryieee;useieee.std_logic_1164.all;entityseg7isport(dat:instd_logic_vector(3downto0); a,b,c,d,e,f,g:outstd_logic);endseg7;architecturearcofseg7is signaltmp:std_logic_vector(6downto0);begin process(dat) begin casedatis when"0000"=>tmp<="0111111"; when"0001"=>tmp<="0000110"; when"0010"=>tmp<="1011011"; when"0011"=>tmp<="1001111"; when"0100"=>tmp<="1100110"; when"0101"=>tmp<="1101101"; when"0110"=>tmp<="1111101"; when"0111"=>tmp<="0000111"; when"1000"=>tmp<="1111111"; when"1001"=>tmp<="1101111"; when"1010"=>tmp<="1110111"; when"1011"=>tmp<="1111100"; when"1100"=>tmp<="0111001"; when"1101"=>tmp<="1011110"; when"1110"=>tmp<="1111001"; when"1111"=>tmp<="1110001"; whenothers=>null; endcase; endprocess; a<=tmp(6); b<=tmp(5); c<=tmp(4); d<=tmp(3); e<=tmp(2); f<=tmp(1); g<=tmp(0);endarc;符号图如图6所示：图6显示