半导体制造装备概述课件

先进制造技术半导体制造装备先进制造技术半导体制造装备1半导体制造装备概述课件2半导体制造装备概述课件3半导体制造装备概述课件4微电子封装一般可分为4级,如图所示,即:0级封装———芯片上器件本体的互连1级封装———芯片(1个或多个)上的输入/输出与基板互连2级封装———将封装好的元器件或多芯片组件用多层互连布线板(ＰＷＢ)组装成电子部件,插件或小整机3级封装———用插件或小整机组装成机柜整机系统微电子封装一般可分为4级,如图所示,即:5半导体制造装备概述课件6半导体制造装备概述芯片制造（前道）单晶硅拉制、切片、表面处理、光刻、减薄、划片芯片封装（后道）测试、滴胶、Diebonding、Wirebonding、压模半导体制造装备概述芯片制造（前道）7半导体封装的基本形式按其外部封装型式分：双列直插式封装(ＤＩＰ)表面安装技术(ＳＭＴ)

无引线陶瓷片式载体(ＬＣＣＣ)塑料有引线片式载体(ＰＬＣＣ)四边引线扁平封装(ＱＦＰ)四边引线塑料扁平封装(ＰＱＦＰ)平面阵列型(ＰＧＡ）球栅阵列封装(ＢＧＡ)半导体封装的基本形式8半导体制造装备概述课件9半导体制造装备概述课件10Chiptosubstrateinterconnecttechnologies按芯片的内部连接方式来分Chiptosubstrateinterconnect11外引线键合外引线键合过程示意图将带引线的芯片从载带上切下的示意图外引线键合外引线键合过程示意图将带引线的芯片从载带上切下的示12ＴＡＢ技术中的载带ＴＡＢ技术中的载带13概括而言,电子封装技术已经历了四代,现正在进入第五代。第一代：60年代前采用的是接线板焊接的方式,框架为电路板,主要插装元件是电子管。第二代：60年代采用穿孔式印刷电路板(ＰＣＢ)封装,主要元件是晶体管和柱型元件。第三代：70年代用自动插装方式将ＤＩＰ为代表的集成电路封装在ＰＣＢ板上,这是穿孔式封装技术的全盛时期。第四代：从80年代开始,采用ＳＭＴ将表面安装元件(ＳＭＣ)和表面安装器件(ＳＭＤ)安装在ＰＣＢ表面上。这一封装技术的革命改变了元器件和电子产品的面貌。第五代：这是90年代显露头角的微封装技术,是上一代封装技术的发展和延伸,是将多层ＰＣＢ技术、高密度互连技术、ＳＭＴ、微型元器件封装技术综合并发展,其代表性技术就是金属陶瓷封装(ＭＣＰ),典型产品是ＭＣM。最近由于系统级芯片(ＳＯＣ)和全片规模集成(ＷＳＩ)技术的发展,微电子封装技术正孕育着重大的突破概括而言,电子封装技术已经历了四代,现正在进入第五代。14半导体后封装的发展趋势向表面安装技术(ＳＭＴ)发展1988年ＳＭＴ技术约占封装市场份额的17.5%,1993年占44%,1998年占75%。传统的双列直插封装所占份额越来越小,取而代之的是表面安装类型的封装,如有引线塑料片式载体,无引线陶瓷片式载体,四边引线塑料扁平封装,塑料球栅阵列封装(ＰＢＧＡ)和陶瓷球栅阵列封装(ＣＢＧＡ)等,尤其是ＰＱＦＰ和ＢＧＡ两种类型最具典型.半导体后封装的发展趋势15向高密度发展目前,陶瓷外壳(ＣＣＧＡ)已达1089只管脚、ＣＢＧＡ达625只管脚、间距达0.5ｍｍ、ＰＱＦＰ达376只管脚、ＴＢＧＡ达1000只管脚。根据美国ＳＩＡ发展规划,到2007年,最大芯片尺寸将增大到1000ｍｍ*2,同时每枚芯片上的输入/输出数最多将达到5000个,焊点尺寸将缩小到0.127ｍｍ以下向高密度发展16从单芯片封装向多芯片封装发展ＭＣＭ起步于90年代初,由于ＭＣＭ的高密度、高性能和高可靠性而倍受青睐。受到世界各国的极大关注,纷纷投入巨额资金,如美国政府3年投入5亿美元,ＩＢＭ在10年投入10亿美元来发展ＭＣＭ,据预测,1999年全球ＭＣＭ产品销售额将达200亿美元。目前最高水平的ＭＣＭ—Ｃ是ＩＢＭ的产品,200ｍｍ*2、78层、300多万个通孔,1400ｍ互连线,1800只管脚,200Ｗ功耗从单芯片封装向多芯片封装发展17由陶瓷封装向塑料封装发展在陶瓷封装向高密度,多引线和低功耗展的同时,越来越多的领域正在由塑料封装所取代。而且,新的塑料封装形式层出不穷,目前以ＰＱＦＰ和ＰＢＧＡ为主,全部用于表面安装,这些塑料封装占领着90%以上的市场由陶瓷封装向塑料封装发展18高密度封装中的关键技术从技术发展观点来看,作为高密度封装的关键技术主要有:ＴＣＰ,ＢＧＡ,ＦＣＴ,ＣＳＰ,ＭＣＭ和三维封装载带封装

它可以提供超窄的引线间距和很薄的封装外形,且在ＰＣＢ板上占据很小的面积,可用于高Ｉ/Ｏ数的ＡＳＩＣ和微处理器,东芝公司1996年问世的笔记本电脑中就使用了ＴＣＰ承载ＣＰＵ,其引线间距0.25ｍｍ,焊接精度为±30μｍ,据报道,最小间距可达0.15ｍｍ高密度封装中的关键技术载带封装19球栅阵列封装(BGA)ＢＧＡ技术的最大特点是器件与ＰＣＢ板之间的互连由引线改为小球,制作小球的材料通常采用合金焊料或有机导电树脂。采用ＢＧＡ技术容易获得Ｉ/Ｏ数超过600个的封装体。由于ＢＧＡ完全采用与ＱＦＰ相同的ＳＭＴ回流焊工艺,避免了ＱＦＰ中的超窄间距,可以提供较大的焊盘区,因此使焊接工艺更加简单,强度大大提高,可靠性明显改善球栅阵列封装(BGA)20ＢＧＡ的尺寸通常大于ＣＳＰ(芯片规模封装),在21～40ｍｍ之间。可分为塑料ＢＧＡ(ＰＢＧＡ)、陶瓷ＢＧＡ(ＣＢＧＡ)或载带ＢＧＡ(ＴＢＧＡ)。在ＰＢＧＡ中,通常用引线键合采用焊球或引线键合将芯片贴在陶瓷基板上;在ＴＢＧＡ中,用标准ＴＡＢ内引线键合工艺或焊球将芯片贴在其带状框架上ＢＧＡ的尺寸通常大于ＣＳＰ(芯片规模封装),在21～21半导体制造装备概述课件22半导体制造装备概述课件23芯片规模封装与芯片尺寸封装(ＣＳＰ)芯片规模封装与芯片尺寸封装统称为ＣＳＰ,它被认为是本世纪先进封装的主流技术。在芯片规模封装中,封装体的尺寸是芯片尺寸的1.2倍以下;芯片尺寸封装中封装体的尺寸与芯片尺寸基本相当。这是在电路板面积不变的前提下,希望更换大芯片的集成电路时提出的。在这种情况下,将框架引线伸展到芯片上方形成芯片引线(ＬＯＣ),封装尺寸不变,芯片面积增大,封装体面积与芯片面积的比值变小芯片规模封装与芯片尺寸封装(ＣＳＰ)24半导体制造装备概述课件25多芯片组件(ＭＣＭ)将多只合格的裸芯片(ＫＧＤ)直接封装在多层互连基板上,并与其它元器件一起构成具有部件或系统功能的多芯片组件(ＭＣＭ),已成为蜚声全球的90年代代表性技术。多芯片组件(ＭＣＭ)26半导体制造装备概述课件27MCM封装MCM封装28COB----ChipOnBoardCOB----ChipOnBoard29半导体制造装备概述课件30ChiponBoard----COBChiponBoard----COB31DieBondingDieBonding32半导体制造装备概述课件33半导体制造装备概述课件34半导体制造装备概述课件35HistoryandapplicationsofwirebondingWirebondingistheearliesttechniqueofdeviceassembly,whosefirstresultwaspublishedbyBellLaboratoriesin1957.Sinethen,thetechniquehasbeenextremelydevelopedHistoryandapplicationsofwi36AdvantageFullyautomaticmachineshavebeendevelopedforvolumeproduction.Bondingparameterscanbepreciselycontrolled;mechanicalpropertiesofwirescanbehighlyreproduced.Bondingspeedcanreach100-125mspereachwireinterconnection(twoweldsandawireloop).Mostreliabilityproblemscanbeeliminatedwithproperlycontrolledandmuchimprovedtools(capillariesandwedges)andprocesses.Specificbondingtoolsandwirescanbeselectedbypackagingengineerstomeettherequirements.Infrastructureofthetechniquehasbeencomprisedbylargewirebondingknowledge,manufacturingpeople,equipmentvendersandmaterials.AdvantageFullyautomaticmachi37Themostpopularapplicationsthatusewirebondingare:Singleandmultitieredcofiredceramicandplasticballgridarrays(BGAs),singlechipandmultichipCeramicandplasticquadflatpackages(CerQuadsandPQFPs)Chipscalepackages(CSPs)Chiponboard(COB)Themostpopularapplications38BallbondWedgebondWirebonding的基本形式BallbondWedgebondWirebonding39Firstandsecondbondcomparison.(A)Ballbondingfirstbond.(B)Ballbondingsecondbond:stitchbondandtailbond.(C)Wedgebondingfirstbond.(D)Wedgebondingsecondbond.Firstandsecondbondcomparis40半导体制造装备概述课件41Wedgebondthebondingprocesscanbedefinedtothreemajorprocesses:

thermocompressionbonding(T/C)ultrasonicbonding(U/S)thermosonicbonding(T/S)asshowninTable1-1Wedgebond42半导体制造装备概述课件43半导体制造装备概述课件44BallBondingBallBonding45Thecapillariesaretypically1.585mmindiameterand11.1mmlong.Theyhavealargeentryholeatthetopandthentheholetapersdowntoasmallholediametertypicallybetween38-50mm,Thecapillariesaretypically4640-µmpadpitchballandwedgefirstbondcomparison.40-µmpadpitchballand47Schematicofdifferentlooping.(A)Ballbondinglooping.(B)Traditionalwedgeradialbondinglooping.(C)WedgebondingConstantGaplooping.Schematicofdifferentlooping4840mmpitchfirstbond.40mmpitchfirstbond.4940mmlooping.Shortwiresaretoground.Longwiresaretotheleads.40mmlooping.Shortwiresare50Wedgestitchbonding.Wedgestitchbonding.51半导体制造装备概述课件52半导体制造装备概述课件53半导体制造装备概述课件54半导体制造装备概述课件55LimitationofwirebondingFortheapplicationofwirebondingmethod,terminalsofchipshavetobearrangedattheperipheryofthechips,otherwiseshortcircuitiseasilycaused.Therefore,wirebondingtechniqueisdifficultforhighI/O(>500)interconnections.Limitationofwirebonding56BondingparametersBondingparametersareextremelyimportantbecausetheycontrolthebondingyieldandreliabilitydirectly.Thekeyvariablesforwirebondinginclude:·Bondingforceandpressureuniformity·Bondingtemperature·Bondingtime·UltrasonicfrequencyandpowerBondingparameters57BonddesignBallbonding·Ballsizeisapproximately2to3timesthewirediameter,1.5timesforsmallballapplicationswithfinepitches,and3to4timesforlargebondpadapplication.·Bondsizeshouldnotexceed3/4ofthepadsize,about2.5to5timesthewirediameter,dependingonthegeometryandmovingdirectionofcapillaryduringbonding.·Loopheightsof150umarenowcommon,butverydependingonthewirediameterandapplications.·Looplengthshouldbelessthan100timesthewirediameter.However,insomecases,highI/Osforinstance,wirelengthshavetoincreasetomorethan5mm.Thewirebondermustsuspendthelengthofwirebetweenthedieandleadframewithoutverticalsaggingorhorizontalswaying.Bonddesign58Wedgebonding·Ahigh-strengthwedgebondispossibleeventhebondisonly2-3mmwiderthanwirediameter.·Padlengthmustsupportthelongdimensionofthewedgebondaswellasthetail.·Thepad'slongaxisshouldbeorientedalongtheintendedwirepath.·Bondpitchmustbedesignedtomaintainconsistentdistancebetweenwires.Wedgebonding59CleaningToensurebondabilityandreliabilityofwirebond,oneofthecriticalconditionsisthatthebondingsurfacemustbefreeofanycontaminants.Thereforecleaningisanimportantworkbeforebonding.Themethodusuallyadaptedismolecularcleaningmethod,plasmaorUV-ozonecleaningmethod.Cleaning60BondevaluationDestructivebondpulltest(Method2011)Internalvisual(Method2010;TestconditionAandB)Delaymeasurements(Method3003)Nondestructivebondpulltest(Method2023)BallbondsheartestConstantacceleration(Method2001;TestconditionE)Randomvibration(Method2026)Mechanicalshock(Method2002)Stabilizationbake(Method1008)Moistureresistance(Method1004)Bondevaluation61Destructivebondpulltest(Method2011)Destructivebondpulltest(Me62Ifboththebondsareatthesamelevelandthehookisappliedatthecenter,theforcescanberepresentedWhenthebothanglesare30o,thepullforceisequaltothebreakload.Thefailureduringpulltestmayoccuratoneofthefivepositionsinthewirebondstructure:A.LiftofffirstbondB.WirebreakattransitionfirstbondC.WirebreakmidspanD.WirebreakattransitionsecondbondE.LiftoffsecondbondWhenproperlypulled,thebondshouldfailatBorD.IffailuresoccuratA,C,orE,thenthebondingparameters,metallization,bondingmachine,bondingtool,hook,hastobereviewed.Ifboththebondsareatthesa63Flip-ChipTechnologyFlip-ChipTechnology64Advantages:·Smallersize:SmallerICfootprint(onlyabout5%ofthatofpackagedICe.g.quadflatpack),reducedheightandweight.·Increasedfunctionality:TheuseofflipchipsallowanincreaseinthenumberofI/O.I/Oisnotlimitedtotheperimeterofthechipasinwirebonding.Anareaarraypadlayoutenablesmoresignal,powerandgroundconnectionsinlessspace.Aflipchipcaneasilyhandlemorethan400pads.·Improvedperformance:Shortinterconnectdeliverslowinductance,resistanceandcapacitance,smallelectricaldelays,goodhighfrequencycharacteristics,thermalpathfromthebacksideofthedie.·Improvedreliability:Epoxyunderfillinlargechipsensureshighreliability.Flip-chipscanreducethenumberconnectionsperpinfromthreetoone.·Improvedthermalcapabilities:Becauseflipchipsarenotencapsulated,thebacksideofthechipcanbeusedforefficientcooling.·Lowcost:Batchbumpingprocess,costofbumpingdecreases,costreductionsintheunderfill-processAdvantages:65Disadvantages:·Difficulttestingofbaredies.·Limitedavailabilityofbumpedchips.·ChallengeforPCBtechnologyaspitchesbecomeveryfineandbumpcountsarehigh.·ForinspectionofhiddenjointsanX-rayequipmentisneeded.·WeakprocesscompatibilitywithSMT.·Handlingofbarechipsisdifficult.·Highassemblyaccuracyneeded.·Withpresentdaymaterialsunderfillingprocesswithaconsiderablecuringtimeisneeded.·Lowreliabilityforsomesubstrates.·Repairingisdifficultorimpossible.Disadvantages:66底部填充工艺(UnderfillingProcess）温度膨胀系数小于3ppm/℃的硅器件直接同有机物印制线路板(温度膨胀系数在18～50ppm/℃)压接在一起,会产生严重的热机应力和疲劳,俗称“热机失配底部填充料锁住倒装片和印制板示意图底部填充工艺(UnderfillingProcess）底67半导体制造装备概述课件68Flipchipjoiningusingadhesives(isotropic,anisotropic,nonconductive)Flipchipjoiningusingadhesi69Flipchipjoiningbythermocompression.FlipchipthermosonicjoiningFlipchipjoiningbythermocom70FlipchipbondingusingthermocompressionFlipchipbondingusingthermo71Flipchipprocessbysolderjoining·diepreparing(testing,bumping,dicing)·substratepreparing(fluxapplicationorsolderpasteprinting)·pick,alignmentandplace·reflowsoldering·cleaningoffluxresidues(optional)·underfilldispensing·underfillcuring.Flipchipprocessbysolderjo72半导体制造装备概述课件73半导体制造装备概述课件74半导体制造装备概述课件75半导体制造装备概述课件76FlipchipjoiningusingadhesivesFlipchipjoiningusingadhesi77半导体制造装备概述课件78IntroductiontoCSPTechnologyDescriptionofvarioustypesofCSPsIntroductiontoCSPTechnology79半导体制造装备概述课件80BallGridArray(BGA)TechnologyBallGridArray(BGA)Technolo81ItisanICpackageforactivedevicesintendedforsurfacemountapplicationsItisanareaarraypackage,i.e.utilizingwholeorpartofthedevicefootprintforinterconnectionsTheinterconnectionsaremadeofballs(spheres)ofmostoftenasolderalloyorsometimesothermetalsMorespecifically,theBGApackageusuallyfulfilsthefollowingadditionalrequirements:Thelengthofthepackagebody(mostoftensquare)rangesfrom7to50mmLeadcountsover1000possible,but50to500rangemostcommontodayThepitch,i.ecenter-to-centerdistance,oftheballsisgenerallybetween1.0and1.5mmItisanICpackageforactive82Figure2.A160-lead0.3mm(11.8mil)pitchQFPplacedonagridof1.5mmpitchspheres(bottomsideofaPBGAS225).Figure2.A160-lead0.3mm(183半导体制造装备概述课件84半导体制造装备概述课件85Figure5.Across-sectionofaTape(orTAB)BGA-TBGA.Figure5.Across-sectionofa86Across-sectionofaSuperBGA-SBGA.Across-sectionofaSuperBGA87半导体制造装备概述课件88半导体制造装备概述课件89半导体制造装备概述课件90半导体制造装备概述课件91半导体制造装备概述课件92先进制造技术半导体制造装备先进制造技术半导体制造装备93半导体制造装备概述课件94半导体制造装备概述课件95半导体制造装备概述课件96微电子封装一般可分为4级,如图所示,即:0级封装———芯片上器件本体的互连1级封装———芯片(1个或多个)上的输入/输出与基板互连2级封装———将封装好的元器件或多芯片组件用多层互连布线板(ＰＷＢ)组装成电子部件,插件或小整机3级封装———用插件或小整机组装成机柜整机系统微电子封装一般可分为4级,如图所示,即:97半导体制造装备概述课件98半导体制造装备概述芯片制造（前道）单晶硅拉制、切片、表面处理、光刻、减薄、划片芯片封装（后道）测试、滴胶、Diebonding、Wirebonding、压模半导体制造装备概述芯片制造（前道）99半导体封装的基本形式按其外部封装型式分：双列直插式封装(ＤＩＰ)表面安装技术(ＳＭＴ)

无引线陶瓷片式载体(ＬＣＣＣ)塑料有引线片式载体(ＰＬＣＣ)四边引线扁平封装(ＱＦＰ)四边引线塑料扁平封装(ＰＱＦＰ)平面阵列型(ＰＧＡ）球栅阵列封装(ＢＧＡ)半导体封装的基本形式100半导体制造装备概述课件101半导体制造装备概述课件102Chiptosubstrateinterconnecttechnologies按芯片的内部连接方式来分Chiptosubstrateinterconnect103外引线键合外引线键合过程示意图将带引线的芯片从载带上切下的示意图外引线键合外引线键合过程示意图将带引线的芯片从载带上切下的示104ＴＡＢ技术中的载带ＴＡＢ技术中的载带105概括而言,电子封装技术已经历了四代,现正在进入第五代。第一代：60年代前采用的是接线板焊接的方式,框架为电路板,主要插装元件是电子管。第二代：60年代采用穿孔式印刷电路板(ＰＣＢ)封装,主要元件是晶体管和柱型元件。第三代：70年代用自动插装方式将ＤＩＰ为代表的集成电路封装在ＰＣＢ板上,这是穿孔式封装技术的全盛时期。第四代：从80年代开始,采用ＳＭＴ将表面安装元件(ＳＭＣ)和表面安装器件(ＳＭＤ)安装在ＰＣＢ表面上。这一封装技术的革命改变了元器件和电子产品的面貌。第五代：这是90年代显露头角的微封装技术,是上一代封装技术的发展和延伸,是将多层ＰＣＢ技术、高密度互连技术、ＳＭＴ、微型元器件封装技术综合并发展,其代表性技术就是金属陶瓷封装(ＭＣＰ),典型产品是ＭＣM。最近由于系统级芯片(ＳＯＣ)和全片规模集成(ＷＳＩ)技术的发展,微电子封装技术正孕育着重大的突破概括而言,电子封装技术已经历了四代,现正在进入第五代。106半导体后封装的发展趋势向表面安装技术(ＳＭＴ)发展1988年ＳＭＴ技术约占封装市场份额的17.5%,1993年占44%,1998年占75%。传统的双列直插封装所占份额越来越小,取而代之的是表面安装类型的封装,如有引线塑料片式载体,无引线陶瓷片式载体,四边引线塑料扁平封装,塑料球栅阵列封装(ＰＢＧＡ)和陶瓷球栅阵列封装(ＣＢＧＡ)等,尤其是ＰＱＦＰ和ＢＧＡ两种类型最具典型.半导体后封装的发展趋势107向高密度发展目前,陶瓷外壳(ＣＣＧＡ)已达1089只管脚、ＣＢＧＡ达625只管脚、间距达0.5ｍｍ、ＰＱＦＰ达376只管脚、ＴＢＧＡ达1000只管脚。根据美国ＳＩＡ发展规划,到2007年,最大芯片尺寸将增大到1000ｍｍ*2,同时每枚芯片上的输入/输出数最多将达到5000个,焊点尺寸将缩小到0.127ｍｍ以下向高密度发展108从单芯片封装向多芯片封装发展ＭＣＭ起步于90年代初,由于ＭＣＭ的高密度、高性能和高可靠性而倍受青睐。受到世界各国的极大关注,纷纷投入巨额资金,如美国政府3年投入5亿美元,ＩＢＭ在10年投入10亿美元来发展ＭＣＭ,据预测,1999年全球ＭＣＭ产品销售额将达200亿美元。目前最高水平的ＭＣＭ—Ｃ是ＩＢＭ的产品,200ｍｍ*2、78层、300多万个通孔,1400ｍ互连线,1800只管脚,200Ｗ功耗从单芯片封装向多芯片封装发展109由陶瓷封装向塑料封装发展在陶瓷封装向高密度,多引线和低功耗展的同时,越来越多的领域正在由塑料封装所取代。而且,新的塑料封装形式层出不穷,目前以ＰＱＦＰ和ＰＢＧＡ为主,全部用于表面安装,这些塑料封装占领着90%以上的市场由陶瓷封装向塑料封装发展110高密度封装中的关键技术从技术发展观点来看,作为高密度封装的关键技术主要有:ＴＣＰ,ＢＧＡ,ＦＣＴ,ＣＳＰ,ＭＣＭ和三维封装载带封装

它可以提供超窄的引线间距和很薄的封装外形,且在ＰＣＢ板上占据很小的面积,可用于高Ｉ/Ｏ数的ＡＳＩＣ和微处理器,东芝公司1996年问世的笔记本电脑中就使用了ＴＣＰ承载ＣＰＵ,其引线间距0.25ｍｍ,焊接精度为±30μｍ,据报道,最小间距可达0.15ｍｍ高密度封装中的关键技术载带封装111球栅阵列封装(BGA)ＢＧＡ技术的最大特点是器件与ＰＣＢ板之间的互连由引线改为小球,制作小球的材料通常采用合金焊料或有机导电树脂。采用ＢＧＡ技术容易获得Ｉ/Ｏ数超过600个的封装体。由于ＢＧＡ完全采用与ＱＦＰ相同的ＳＭＴ回流焊工艺,避免了ＱＦＰ中的超窄间距,可以提供较大的焊盘区,因此使焊接工艺更加简单,强度大大提高,可靠性明显改善球栅阵列封装(BGA)112ＢＧＡ的尺寸通常大于ＣＳＰ(芯片规模封装),在21～40ｍｍ之间。可分为塑料ＢＧＡ(ＰＢＧＡ)、陶瓷ＢＧＡ(ＣＢＧＡ)或载带ＢＧＡ(ＴＢＧＡ)。在ＰＢＧＡ中,通常用引线键合采用焊球或引线键合将芯片贴在陶瓷基板上;在ＴＢＧＡ中,用标准ＴＡＢ内引线键合工艺或焊球将芯片贴在其带状框架上ＢＧＡ的尺寸通常大于ＣＳＰ(芯片规模封装),在21～113半导体制造装备概述课件114半导体制造装备概述课件115芯片规模封装与芯片尺寸封装(ＣＳＰ)芯片规模封装与芯片尺寸封装统称为ＣＳＰ,它被认为是本世纪先进封装的主流技术。在芯片规模封装中,封装体的尺寸是芯片尺寸的1.2倍以下;芯片尺寸封装中封装体的尺寸与芯片尺寸基本相当。这是在电路板面积不变的前提下,希望更换大芯片的集成电路时提出的。在这种情况下,将框架引线伸展到芯片上方形成芯片引线(ＬＯＣ),封装尺寸不变,芯片面积增大,封装体面积与芯片面积的比值变小芯片规模封装与芯片尺寸封装(ＣＳＰ)116半导体制造装备概述课件117多芯片组件(ＭＣＭ)将多只合格的裸芯片(ＫＧＤ)直接封装在多层互连基板上,并与其它元器件一起构成具有部件或系统功能的多芯片组件(ＭＣＭ),已成为蜚声全球的90年代代表性技术。多芯片组件(ＭＣＭ)118半导体制造装备概述课件119MCM封装MCM封装120COB----ChipOnBoardCOB----ChipOnBoard121半导体制造装备概述课件122ChiponBoard----COBChiponBoard----COB123DieBondingDieBonding124半导体制造装备概述课件125半导体制造装备概述课件126半导体制造装备概述课件127HistoryandapplicationsofwirebondingWirebondingistheearliesttechniqueofdeviceassembly,whosefirstresultwaspublishedbyBellLaboratoriesin1957.Sinethen,thetechniquehasbeenextremelydevelopedHistoryandapplicationsofwi128AdvantageFullyautomaticmachineshavebeendevelopedforvolumeproduction.Bondingparameterscanbepreciselycontrolled;mechanicalpropertiesofwirescanbehighlyreproduced.Bondingspeedcanreach100-125mspereachwireinterconnection(twoweldsandawireloop).Mostreliabilityproblemscanbeeliminatedwithproperlycontrolledandmuchimprovedtools(capillariesandwedges)andprocesses.Specificbondingtoolsandwirescanbeselectedbypackagingengineerstomeettherequirements.Infrastructureofthetechniquehasbeencomprisedbylargewirebondingknowledge,manufacturingpeople,equipmentvendersandmaterials.AdvantageFullyautomaticmachi129Themostpopularapplicationsthatusewirebondingare:Singleandmultitieredcofiredceramicandplasticballgridarrays(BGAs),singlechipandmultichipCeramicandplasticquadflatpackages(CerQuadsandPQFPs)Chipscalepackages(CSPs)Chiponboard(COB)Themostpopularapplications130BallbondWedgebondWirebonding的基本形式BallbondWedgebondWirebonding131Firstandsecondbondcomparison.(A)Ballbondingfirstbond.(B)Ballbondingsecondbond:stitchbondandtailbond.(C)Wedgebondingfirstbond.(D)Wedgebondingsecondbond.Firstandsecondbondcomparis132半导体制造装备概述课件133Wedgebondthebondingprocesscanbedefinedtothreemajorprocesses:

thermocompressionbonding(T/C)ultrasonicbonding(U/S)thermosonicbonding(T/S)asshowninTable1-1Wedgebond134半导体制造装备概述课件135半导体制造装备概述课件136BallBondingBallBonding137Thecapillariesaretypically1.585mmindiameterand11.1mmlong.Theyhavealargeentryholeatthetopandthentheholetapersdowntoasmallholediametertypicallybetween38-50mm,Thecapillariesaretypically13840-µmpadpitchballandwedgefirstbondcomparison.40-µmpadpitchballand139Schematicofdifferentlooping.(A)Ballbondinglooping.(B)Traditionalwedgeradialbondinglooping.(C)WedgebondingConstantGaplooping.Schematicofdifferentlooping14040mmpitchfirstbond.40mmpitchfirstbond.14140mmlooping.Shortwiresaretoground.Longwiresaretotheleads.40mmlooping.Shortwiresare142Wedgestitchbonding.Wedgestitchbonding.143半导体制造装备概述课件144半导体制造装备概述课件145半导体制造装备概述课件146半导体制造装备概述课件147LimitationofwirebondingFortheapplicationofwirebondingmethod,terminalsofchipshavetobearrangedattheperipheryofthechips,otherwiseshortcircuitiseasilycaused.Therefore,wirebondingtechniqueisdifficultforhighI/O(>500)interconnections.Limitationofwirebonding148BondingparametersBondingparametersareextremelyimportantbecausetheycontrolthebondingyieldandreliabilitydirectly.Thekeyvariablesforwirebondinginclude:·Bondingforceandpressureuniformity·Bondingtemperature·Bondingtime·UltrasonicfrequencyandpowerBondingparameters149BonddesignBallbonding·Ballsizeisapproximately2to3timesthewirediameter,1.5timesforsmallballapplicationswithfinepitches,and3to4timesforlargebondpadapplication.·Bondsizeshouldnotexceed3/4ofthepadsize,about2.5to5timesthewirediameter,dependingonthegeometryandmovingdirectionofcapillaryduringbonding.·Loopheightsof150umarenowcommon,butverydependingonthewirediameterandapplications.·Looplengthshouldbelessthan100timesthewirediameter.However,insomecases,highI/Osforinstance,wirelengthshavetoincreasetomorethan5mm.Thewirebondermustsuspendthelengthofwirebetweenthedieandleadframewithoutverticalsaggingorhorizontalswaying.Bonddesign150Wedgebonding·Ahigh-strengthwedgebondispossibleeventhebondisonly2-3mmwiderthanwirediameter.·Padlengthmustsupportthelongdimensionofthewedgebondaswellasthetail.·Thepad'slongaxisshouldbeorientedalongtheintendedwirepath.·Bondpitchmustbedesignedtomaintainconsistentdistancebetweenwires.Wedgebonding151CleaningToensurebondabilityandreliabilityofwirebond,oneofthecriticalconditionsisthatthebondingsurfacemustbefreeofanycontaminants.Thereforecleaningisanimportantworkbeforebonding.Themethodusuallyadaptedismolecularcleaningmethod,plasmaorUV-ozonecleaningmethod.Cleaning152BondevaluationDestructivebondpulltest(Method2011)Internalvisual(Method2010;TestconditionAandB)Delaymeasurements(Method3003)Nondestructivebondpulltest(Method2023)BallbondsheartestConstantacceleration(Method2001;TestconditionE)Randomvibration(Method2026)Mechanicalshock(Method2002)Stabilizationbake(Method1008)Moistureresistance(Method1004)Bondevaluation153Destructivebondpulltest(Method2011)Destructivebondpulltest(Me154Ifboththebondsareatthesamelevelandthehookisappliedatthecenter,theforcescanberepresentedWhenthebothanglesare30o,thepullforceisequaltothebreakload.Thefailureduringpulltestmayoccuratoneofthefivepositionsinthewirebondstructure:A.LiftofffirstbondB.WirebreakattransitionfirstbondC.WirebreakmidspanD.WirebreakattransitionsecondbondE.LiftoffsecondbondWhenproperlypulled,thebondshouldfailatBorD.IffailuresoccuratA,C,orE,thenthebondingparameters,metallization,bondingmachine,bondingtool,hook,hastobereviewed.Ifboththebondsareatthesa155Flip-ChipTechnologyFlip-ChipTechnology156Advantages:·Smallersize:SmallerICfootprint(onlyabout5%ofthatofpackagedICe.g.quadflatpack),reducedheightandweight.·Increasedfunctionality:TheuseofflipchipsallowanincreaseinthenumberofI/O.I/Oisnotlimitedtotheperimeterofthechipasinwirebonding.Anareaarraypadlayoutenablesmoresignal,powerandgroundconnectionsinlessspace.Aflipchipcaneasilyhandlemorethan400pads.·Improvedperformance:Shortinterconnectdeliverslowinductance,resistanceandcapacitance,smallelectricaldelays,goodhighfrequencycharacteristics,thermalpathfromthebacksideofthedie.·Improvedreliability:Epoxyunderfillinlargechipsensureshighreliability.Flip-chipscanreducethenumberconnectionsperpinfromthreetoone.·Improvedthermalcapabilities:Becauseflipchipsarenotencapsulated,thebacksideofthechipcanbeusedforefficientcooling.·Lowcost:Batchbumpingprocess,costofbumpingdecreases,costreductionsintheunderfill-processAdvantages:157Disadvantages:·Difficulttestingofbaredies.·Limitedavailabilityofbumpedchips.·ChallengeforPCBtechnologyaspitchesbecomeveryfineandbumpcountsarehigh.·Forins