基于AT89C52单片机的交通灯控制系统的设计(外文翻译)

电子与信息工程学院本科毕业论文(设计)外文文献翻译译文题目：8-bitMicrocontrollerWith8KBytesFlashAT89C52学生姓名：专业：电气工程及其自动化指导教师：2012年11月外文资料8-bitMicrocontrollerWith8KBytesFlashAT89C52FeaturesCompatiblewithMCS-51™Products8KBytesofIn-SystemReprogrammableFlashMemoryEndurance:1,000Write/EraseCyclesFullyStaticOperation:0Hzto24MHzThree-levelProgramMemoryLock256x8-bitInternalRAM32ProgrammableI/OLinesThree16-bitTimer/CountersEightInterruptSourcesProgrammableSerialChannelLow-powerIdleandPower-downModesDescriptionTheAT89C52isalow-power,high-performanceCMOS8-bitmicrocomputerwith8KbytesofFlashprogrammableanderasablereadonlymemory(PEROM).ThedeviceismanufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standard80C51and80C52instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C52isapowerfulmicrocomputerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.PinConfigurationsBlockDiagramPinDescriptionVCCSupplyvoltage.GNDGround.Port0Port0isan8-bitopendrainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.Port0canalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpull-ups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverification.Externalpull-upsarerequiredduringprogramverification.Port1Port1isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput(P1.0/T2)andthetimer/counter2triggerinput(P1.1/T2EX),respectively,asshowninthefollowingtable.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.Port2Port2isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemoriesthatuse16-bitaddresses(MOVX@DPTR).Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemoriesthatuse8-bitaddresses(MOVX@RI),Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.Port3Port3isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepull-ups.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51,asshowninthefollowingtable.Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.RSTResetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.ALE/eq\x\to(PROG)AddressLatchEnableisanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput()duringFlashprogramming.Innormaloperation,ALEisemittedataconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternaldatamemory.Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.eq\x\to(PSEN)ProgramStoreEnableisthereadstrobetoexternalprogrammemory.WhentheAT89C52isexecutingcodefromexternalprogrammemory,isactivatedtwiceeachmachinecycle,exceptthattwoactivationsareskippedduringeachaccesstoexternaldatamemory.eq\x\to(EA)/VPPExternalAccessEnable.mustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.Note,however,thatiflockbit1isprogrammed,willbeinternallylatchedonreset.EAshouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage(VPP)duringFlashprogrammingwhen12-voltprogrammingisselected.XTAL1Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.XTAL2Outputfromtheinvertingoscillatoramplifier.SpecialFunctionRegistersAmapoftheon-chipmemoryareacalledtheSpecialFunctionRegister(SFR)spaceisshownintheTable1.Notethatnotalloftheaddressesareoccupied,andunoccupiedaddressesmaynotbeimplementedonthechip.Readaccessestotheseaddresseswillingeneralreturnrandomdata,andwriteaccesseswillhaveanindeterminateeffect.Usersoftwareshouldnotwrite1stotheseunlistedlocations,sincetheymaybeusedinfutureproductstoinvokenewfeatures.Inthatcase,theresetorinactivevaluesofthenewbitswillalwaysbe0.Timer2RegistersControlandstatusbitsarecontainedinregistersT2CONandT2MODforTimer2.Theregisterpair(RCAP2H,RCAP2L)aretheCapture/ReloadregistersforTimer2in16-bitcapturemodeor16-bitauto-reloadmode.InterruptRegistersTheindividualinterruptenablebitsareintheIEregister.TwoprioritiescanbesetforeachofthesixinterruptsourcesintheIPregister.DataMemoryTheAT89C52implements256bytesofon-chipRAM.Theupper128bytesoccupyaparalleladdressspacetotheSpecialFunctionRegisters.Thatmeanstheupper128byteshavethesameaddressesastheSFRspacebutarephysicallyseparatefromSFRspace.Whenaninstructionaccessesaninternallocationaboveaddress7FH,theaddressmodeusedintheinstructionspecifieswhethertheCPUaccessestheupper128bytesofRAMortheSFRspace.InstructionsthatusedirectaddressingaccessSFRspace.Forexample,thefollowingdirectaddressinginstructionaccessestheSFRatlocation0A0H.MOV0A0H,#dataInstructionsthatuseindirectaddressingaccesstheupper128bytesofRAM.Forexample,thefollowingindirectaddressinginstruction,whereR0contains0A0H,accessesthedatabyteataddress0A0H,ratherthanP2(whoseaddressis0A0H).MOV@R0,#dataNotethatstackoperationsareexamplesofindirectaddressing,sotheupper128bytesofdataRAMareavailableasstackspace.Timer0and1Timer0andTimer1intheAT89C52operatethesamewayasTimer0andTimer1intheAT89C51.Timer2Timer2isa16-bitTimer/Counterthatcanoperateaseitheratimeroraneventcounter.ThetypeofoperationisselectedbybitC/T2intheSFRT2CON.Timer2hasthreeoperatingmodes:capture,auto-reload(upordowncounting),andbaudrategenerator.ThemodesareselectedbybitsinT2CON,asshowninTable3.Timer2consistsoftwo8-bitregisters,TH2andTL2.IntheTimerfunction,theTL2registerisincrementedeverymachinecycle.Sinceamachinecycleconsistsof12oscillatorperiods,thecountrateis1/12oftheoscillatorfrequency.IntheCounterfunction,theregisterisincrementedinresponsetoa1-to-0transitionatitscorrespondingexternalinputpin,T2.Inthisfunction,theexternalinputissampledduringS5P2ofeverymachinecycle.Whenthesamplesshowahighinonecycleandalowinthenextcycle,thecountisincremented.ThenewcountvalueappearsintheregisterduringS3P1ofthecyclefollowingtheoneinwhichthetransitionwasdetected.Sincetwomachinecycles(24oscillatorperiods)arerequiredtorecognizea1-to-0transition,themaximumcountrateis1/24oftheoscillatorfrequency.Toensurethatagivenlevelissampledatleastoncebeforeitchanges,thelevelshouldbeheldforatleastonefullmachinecycle.CaptureModeInthecapturemode,twooptionsareselectedbybitEXEN2inT2CON.IfEXEN2=0,Timer2isa16-bittimerorcounterwhichuponoverflowsetsbitTF2inT2CON.Thisbitcanthenbeusedtogenerateaninterrupt.IfEXEN2=1,Timer2performsthesameoperation,buta1-to-0transitionatexternalinputT2EXalsocausesthecurrentvalueinTH2andTL2tobecapturedintoRCAP2HandRCAP2L,respectively.Inaddition,thetransitionatT2EXcausesbitEXF2inT2CONtobeset.TheEXF2bit,likeTF2cangenerateaninterrupt.ThecapturemodeisillustratedinFigure1.Auto-reload(UporDownCounter)Timer2canbeprogrammedtocountupordownwhenconfiguredinits16-bitauto-reloadmode.ThisfeatureisinvokedbytheDCEN(DownCounterEnable)bitlocatedintheSFRT2MOD.Uponreset,theDCENbitissetto0sothattimer2willdefaulttocountup.WhenDCENisset,Timer2cancountupordown,dependingonthevalueoftheT2EXpin.Figure2showsTimer2automaticallycountingupwhenDCEN=0.Inthismode,twooptionsareselectedbybitEXEN2inT2CON.IfEXEN2=0,Timer2countsupto0FFFFHandthensetstheTF2bituponoverflow.Theoverflowalsocausesthetimerregisterstobereloadedwiththe16-bitvalueinRCAP2HandRCAP2L.ThevaluesinTimerinCaptureModeRCAP2HandRCAP2Larepresetbysoftware.IfEXEN2=1,a16-bitreloadcanbetriggeredeitherbyanoverfloworbya1-to-0transitionatexternalinputT2EX.ThistransitionalsosetstheEXF2bit.BoththeTF2andEXF2bitscangenerateaninterruptifenabled.SettingtheDCENbitenablesTimer2tocountupordown,asshowninFigure3.Inthismode,theT2EXpincontrolsthedirectionofthecount.Alogic1atT2EXmakesTimer2countup.Thetimerwilloverflowat0FFFFHandsettheTF2bit.Thisoverflowalsocausesthe16-bitvalueinRCAP2HandRCAP2Ltobereloadedintothetimerregisters,TH2andTL2,respectively.Alogic0atT2EXmakesTimer2countdown.ThetimerunderflowswhenTH2andTL2equalthevaluesstoredinRCAP2HandRCAP2L.TheunderflowsetstheTF2bitandcauses0FFFFHtobereloadedintothetimerregisters.TheEXF2bittoggleswheneverTimer2overflowsorunderflowsandcanbeusedasa17thbitofresolution.Inthisoperatingmode,EXF2doesnotflaganinterrupt.外文资料译文：8位8字节闪存单片机AT89C52主要性能与MCS-51单片机产品兼容8K字节在系统可编程Flash存储器1000次擦写周期 全静态操作：0Hz～24Hz三级加密程序存储器256×8位内部存储器32个可编程I/O口线三个16位定时器/计数器八个中断源可编程串行通道低功耗空闲和掉电模式功能特性描述AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K内置可编程闪存。产品使用了Atmel公司高密度非易失性存储器技术制造，与工业80C51和80C52产品指令和引脚完全兼容。片上Flash允许程序存储器在系统可编程，亦适于常规编程器。在单芯片上，拥有灵巧的8位CPU和在系统可编程Flash，使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。引脚结构方框图VCC:电源GND:地P0口：P0口是一个8位漏极开路的双向I/O口。作为输出口，每位能驱动8个TTL逻辑电平。对P0端口写“1”时，引脚用作高阻抗输入。当访问外部程序和数据存储器时，P0口也被作为低8位地址/数据复用。在这种模式下，P0具有内部上拉电阻。在flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。程序校验时，需要外部上拉电阻。P1口：P1口是一个具有内部上拉电阻的8位双向I/O口，P1输出缓冲器能驱动4个TTL逻辑电平。对P1端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。此外，P1.0和P1.2分别作定时器/计数器2的外部计数输入（P1.0/T2）和时器/计数器2的触发输入（P1.1/T2EX），具体如下表所示。在flash编程和校验时，P1口接收低8位地址字节。P2口：P2口是一个具有内部上拉电阻的8位双向I/O口，P2输出缓冲器能驱动4个TTL逻辑电平。对P2端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。在访问外部程序存储器或用16位地址读取外部数据存储器（例如执行MOVX@DPTR）时，P2口送出高八位地址。在这种应用中，P2口使用很强的内部上拉发送1。在使用8位地址（如MOVX@RI）访问外部数据存储器时，P2口输出P2锁存器的内容。在flash编程和校验时，P2口也接收高8位地址字节和一些控制信号。P3口：P3口是一个具有内部上拉电阻的8位双向I/O口，p2输出缓冲器能驱动4个TTL逻辑电平。对P3端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（IIL）。P3口亦作为AT89S52特殊功能（第二功能）使用，如下表所示。在flash编程和校验时，P3口也接收一些控制信号。RST:复位输入。晶振工作时，RST脚持续2个机器周期高电平将使单片机复位。看门狗计时完成后，RST脚输出96个晶振周期的高电平。特殊寄存器AUXR(地址8EH)上的DISRTO位可以使此功能无效。DISRTO默认状态下，复位高电平有效。ALE/eq\x\to(PROG)：地址锁存控制信号（ALE）是访问外部程序存储器时，锁存低8位地址的输出脉冲。在flash编程时，此引脚（eq\x\to(PROG)）也用作编程输入脉冲。在一般情况下，ALE以晶振六分之一的固定频率输出脉冲，可用来作为外部定时器或时钟使用。然而，特别强调，在每次访问外部数据存储器时，ALE脉冲将会跳过。如果需要，通过将地址为8EH的SFR的第0位置“1”，ALE操作将无效。这一位置“1”，ALE仅在执行MOVX或MOVC指令时有效。否则，ALE将被微弱拉高。这个ALE使能标志位（地址为8EH的SFR的第0位）的设置对微控制器处于外部执行模式下无效。eq\x\to(PSEN):外部程序存储器选通信号（eq\x\to(PSEN)）是外部程序存储器选通信号。当AT89S52从外部程序存储器执行外部代码时，eq\x\to(PSEN)在每个机器周期被激活两次，而在访问外部数据存储器时，eq\x\to(PSEN)将不被激活。eq\x\to(EA)/VPP:访问外部程序存储器控制信号。为使能从0000H到FFFFH的外部程序存储器读取指令，eq\x\to(EA)必须接GND。为了执行内部程序指令，eq\x\to(EA)应该接VCC。在flash编程期间，eq\x\to(EA)也接收12伏VPP电压。XTAL1:振荡器反相放大器和内部时钟发生电路的输入端。XTAL2:振荡器反相放大器的输出端。特殊功能寄存器如图1中所示的存储器区域称为特殊功能寄存器。应该注意到，并不是所有的地址都会被定义，单片机中那些没有被定义的地址是无效的。读访问这些地址一般会返回随机数据，写访问这些地址则会产生一个不确定的影响。用户软件不应将那些没有被列举出来的地址置1。在这种情况下，复位后这些单元数值总是0。定时/计数器2定时/计数器2的控制和状态位位于T2CON和T2MOD。寄存器对（RCAO2H、RCAP2L）是定时器2在16位捕获方式或16位自动重装载方式下的捕获/自动重装载寄存器。中断寄存器所有单独的中断允许位都存在于中断允许寄存器IE中。中断优先级寄存器IP可以为六个中断源设置两个中断优先级。数据存储器AT89C52实现256字节片上RAM。高128个字节与特殊功能寄存器（SFR）地址是重叠的，也就是高128字节的RAM和特殊功能寄存器的地址是相同的,但物理上它们是分开的。当一条指令访问7FH以上的内部地址单元时，指令中使用的寻址方式是不同的，也即寻址方式决定是访问高128字节RAM还是访问特殊功能寄存器。如果指令是直接寻址方式则为访问特殊功能寄存器。例如，下面的直接寻址指令访问特殊功能寄存器0A0H（即P2口）地址单元。MOV0A0H，#data间接寻址指令访问高128字节RAM，例如，下面的间接寻址指令中，R0的内容为0A0H，则访问数据字节地址为0A0H，而不是P2口（0A0H）。MOV@R0，#data堆栈操作也是间接寻址方式，所以，高128位数据RAM亦可作为堆栈区使用。定时器0/定时器1AT89C52的定时器0和定时器1的工作方式与AT89C51相同。定时器2定时器2是一个16位定时/计数器。它既可当定时