数字设计基础双语课件(第5章)

1、 5. Sequential circuit design 5.1 Synchronous sequential circuit model 5.2Designing synchronous sequential circuits 1 5.1 Synchronous sequential circuit model 1. Mealy modelThe outputs Z are combinational functions of both the present state variables y and the inputs X.2 5.1 Synchronous sequential c

2、ircuit model X0Xn-1 : a set of n inputs, X; Z0Zm-1 : a set of m outputs, Z; y0yk-1 : a set of k internal signals, y, which define the present state of the circuit, i.e. present state variables. Y0Yk-1 : a set of k internal signals, Y, which are generated to produce the next state of the circuit, i.e

3、. next state variables.Y and Z are both combinational functions of the circuit inputs X and the present state y.3 5.1 Synchronous sequential circuit model 2. Moore modelThe outputs Z are combinational functions of only the present state variables y.4 5.2 Designing synchronous sequential circuit 1. D

4、esign procedure Derive the state diagram. Draw the state table. Assign state variable patterns to states. Draw the assigned state table. Derive the flip-flop input functions. Derive the output function of a Karnaugh map. Draw the logic circuit.5 5.2 Designing synchronous sequential circuit 2. Design

5、 examplesExp1: Suppose a synchronous counter is required which follows one of two repeating sequences depending upon a control input C. When C=0, the sequence is 00, 01, 11. When C=1, the sequence is 00, 11, 01. （1）Derive the state diagramOnly three states are in the sequence. The fourth state might

6、 appear upon switch-on, so we map it to lead to state 1.State diagram6 5.2 Designing synchronous sequential circuit （2）Draw the state transition tableState tableThe state transition table can be constructed from the state diagram.（3）State assignmentValues needs to be chosen for the present state var

7、iables for each state. For convenience, we assign:y2y1= 00 for state 1;y2y1= 01 for state 2;y2y1= 11 for state 3;y2y1= 10 for state 4;Assigned state table7 5.2 Designing synchronous sequential circuit （4）Derive the flip-flop input functionsThe Karnaugh maps for the two inputs to the flip-flops, Y1 a

8、nd Y2 can be established from the assigned state table.The Karnaugh maps for the input functions8 5.2 Designing synchronous sequential circuit From the Karnaugh maps, we get:Y2 = y2 y1 C + y2 y1 CY1 = y2 C + y2 y1 C + y2 y1 C（5）Draw the logic circuit9 5.2 Designing synchronous sequential circuit Exp

9、2: Suppose a synchronous sequential logic circuit is required that could detect a defined sequence appears on the input. The circuit has one data input, x, and one data output, Z, in addition to the clock input. Suppose the serial input to detect is 0110011, with Z becoming a 1 after the last bit ap

10、pears in the sequence.10 5.2 Designing synchronous sequential circuit （1）Derive the state diagramThe state diagram can be derived from the problem specification. The sequence has eight steps to reach the final pattern, therefore, eight states are needed.11 5.2 Designing synchronous sequential circui

11、t （2）Draw the state transition tableThe state transition table lists not only the next states but also the output values associated with each present state.State table of the detector12 5.2 Designing synchronous sequential circuit （3）State assignmentThree state variables are needed for eight states.

12、Using the characteristics of Gray code that adjacent codes differ by one bit. Based on the state table, we make the assignment:State table of the detectorState 1 = 000, State 2 = 111, State 4 = 001, State 3 = 101, State 5 = 010, State 6 = 110, State 8 = 100, State 7 = 011.13 5.2 Designing synchronou

13、s sequential circuit Assigned state tableWe can get:14 5.2 Designing synchronous sequential circuit （4）Derive the flip-flop input functionsThe input functions for the three flip-flops can be obtained by mapping the next state variables in the assigned state table onto Karnaugh maps.15 5.2 Designing

14、synchronous sequential circuit We get the input functions:Y3 = x y1 + x y3 + y2 y1Y2 = x + y3 y2 y1Y1 = y3 y1 + y3 y2 y1 + x y2 y1 + x y2 y1（5）Derive the output functionMapping the state table output column onto the Karnaugh map. we obtain the output function:Z = y3 y2 y116 5.2 Designing synchronous

15、 sequential circuit （6）Draw the logic circuit17 5.2 Designing synchronous sequential circuit 3. Some problems to discuss State minimizationThe number of states will determine the number of state variables, and hence the number of flip-flops.We want to reduce the number of states to a minimum because

16、 it could reduce the circuitry.Identical states whose next state and output entries are identical in the state table can be merged into a single state with the same number.18 5.2 Designing synchronous sequential circuit Equivalent statesTwo states are equivalent and can be replaced by one state if t

17、he following two conditions exist:) The outputs associated with the two states are the same;) Corresponding next states are the same or equivalent;Once these two conditions are satisfied, we can combine the two states into one newly named state.19 5.2 Designing synchronous sequential circuit State d

18、iagram using transition expressionsIf the transition from one state to another is specified by several input variables, the state diagram will be clumsy. A simpler way is to give the Boolean condition necessary for the transition or no transition in so-called transition expression.Each transition expression can be reduce