Altium教程FPGAHardwareD软件设计E0(精)

1、FPGA Hardware LED Chaser 10 Module 软件设计 第一部分原理图1.1 FPGA_LED_Chasser_IO_Module.SchDocVCCU3TCK TMS TDI TDO TRSTJT AG JT AG JT AG JT AGJT AGJT AG.Q15.OD15.0L CE CCLR SLI LEFT SRI U4SR16CLEDB Q15.0D15.0L CE CCLR SLI LEFT SRI U5SR16CLEDB Q15.0D15.0L CE CCLR SLI LEFT SRI U7A7.0SR16CLEDB Q15.OD15.0L CE CCL

2、RSLI LEFT SRI U8SR16CLEDB Q15.OQ31.16Q63.48Q47.32D15.0D31.16D63.48D47.32VCCVCC VCC VCC Q16Q32Q48Q64Q15.0Q16.31Q48.63Q47.32Q71Q15Q31Q47 1 Ch x 8 Bit Digital IOAIN7.OAOUT7.0CTRL IOB_1X8AOB15.OA1D15.OD31.16D63.48D47.32A15.OB15.OY15.0S0U9M16_B2B1A15.OB15.OY15.OSOU1OM16_B2B1A15.OB15.OY15.OSOU11M16_B2B1A1

3、5.OY15.0S0U6M16_B2B1GNDGNDGNDA2U120R3S LOADDIRMANUALQ7.0D7.0L CE CCLR SLI LEFT SRI U1SR8CLEDBQ71.64D71.64VCC Q0Q63GNDGNDGNDU13GNDGND D71.64A7.OB7.O丫7.0SOU2M8_B2B1GNDDIVN. = 1000000C D QU19FDU17C D QU18FDVCC SHIFTGNDVCCDigital I/O LED ChaserU14/ NCNTL31.OLOADU15CDIVN_32/ 5U16CDIV54 Ch x 16 Bit Digita

4、l IO AIN15.0BIN15.0CIN15.0DIN15.0AOUT15.0BOUT15.0COUT15.0DOUT15.0DIGIOIOB_4X16CLK_BRD PXXTEST_BUTTONPXX JTAG_NEXUS_TMSPXXJTAG_NEXUS_TCK PXX JTAG_NEXUS_TDO PXX JTAG_NEXUS_TDI PXX Thisexample impleme nts a 72 bit shift register to chase LEDs around a 4x16 Digital I/Omodule.The speed is k ept down to 1

5、0Hz to allow the I/O module to k eep up.You will n eed to up the refresh speed on the I/O module to 100ms (Opti ons butt onon the in strume nt.The 1x8 module con trols extra fun cti ons.Bit 0 (toggle high the low will load the chaser with the sett in gs en tered into the4x16.The 4x16 in puts are use

6、d to display the state of the chaser - this is the display.The 4x16 output bits are used to con trol the value that will be loaded into the chaserwhe n operat ing in Ma nual ModePower- On LoadHolds Load high for two shift clock cycles to force a load on startup.Relies on the factthat the DFFs will c

7、ome up with zero loaded.Load from three sources.1. Startup Load2. Test butt on Load3. Toggle Bit 0 of CTRL from in strume nt display.1.2FPGA_LED_Chasser.PAS. ProcedureUnRouteNet(Board : IPCB_Board; Net : IPCB_Net;VarIterator : IPCB_GroupIterator;Prim : IPCB_Prim;KillList : TList;i : In teger;Beg inI

8、terator := Net.Grouplterator_Create;Prim := Iterator.FirstPCBObject;KillList := TList.Create;While Prim NIl DoBeg inIf Prim.I sFreePrimitive The nKillList.Add(Prim;Prim := Iterator.NextPCBObject;End;For i := 0 TO KillList.Cou nt - 1 DoBoard. RemovePCBObject(KillListi;KillList.Free;End; . ProcedureUn

9、 routeClass(Board : IPCB_BOARD; NetClass : IPCB_OBjectClass;VarIterator : IPCB_Boardlterator;net : IPCB_Net;Beg inIterator := Board.BoardIterator_Create;lterator.SetState_FilterAII;lterator.AddFilter_ObjectSet(MkSet(eNetObject;Net := Iterator.FirstPCBObject;While Net NIl DoBeg inIf NetClass.lsMember

10、(Net.Name The nUn routeNet(Board, Net;Net := Iterator.NextPCBObject;En d;Board.ViewMa nager_FullUpdate;End; . ProcedureUn RouteSelectedClasses(Board : I_PCBBoard;Vari : In teger;Beg inFor i := 0 To GetNetClass.Classes.ltems.Count - 1 DoIf GetNetClass.Classes.Selectedi The nUnrouteClass(Board, GetNet

11、Class.Classes.ltems.Objectsi;End; . Fun cti onChooseNetCLass(Dummy : In teger = 0 : Boolea n;Beg inResult := GetNetClass.showmodal = mrOK;En d;. ProcedureFillNetClassList(Board : IPCB_Board;VarIterator : IPCB_Boardlterator;c : IPCB_ObjectClass;Beg inIterator := Board.BoardIterator_Create;lterator.Se

12、tState_FilterAII;lterator.AddFilter_ObjectSet(MkSet(eClassObject;c := Iterator.FirstPCBObject;While c NIl DoBeg inIf c.MemberKi nd = eClassMemberKi nd_Net The nGetNetClass.Classes.ltems.AddObject(c.Name, C;c := Iterator.NextPCBObject;En d;End; . ProcedureUn RouteNetClass;VarClassToU nroute : IPCB_OBjectClass;Board : IPCB_Board;Beg inPcbserver.PreProcess;TryBoard := PCBServer.GetCurre ntPCBBoard;If Not Assig ned(Board The nBeg inShowMessage(The Curre nt Docume nt is not a Protel PCB Docume nt.;Exit;En d;Fil