Kinetis GPIO Step by Step清华培训讲义PPT课件

1、Page 1Kinetis K10 Training第1页/共33页Page 2Kinetis K10 TrainingWhat we used?Reference :K10P100M100SF2RM.pdfKQRUG.pdfK10P100M100SF2.pdf第2页/共33页Page 3Kinetis K10 TrainingK10 board电源电源 直流直流5V 100mA调试用串口调试用串口UART0备用串口备用串口UART2第3页/共33页Page 4Kinetis K10 TrainingK10 board Debug & Reset buttonJTAG复位按钮复位按钮第

2、4页/共33页Page 5Kinetis K10 TrainingK10 board LedsLEDs第5页/共33页Page 6Kinetis K10 TrainingK10 board Power & Reset第6页/共33页Page 7Kinetis K10 TrainingK10 board RS232 & JTAG第7页/共33页Page 8Kinetis K10 TrainingK10 board CLOCK 32768第8页/共33页Page 9Kinetis K10 TrainingK10 board CLOCK 4MHz第9页/共33页Page 10Kine

3、tis K10 TrainingK10 board Power Supply第10页/共33页Page 11Kinetis K10 TrainingK10 LEDs 第11页/共33页Page 12Kinetis K10 TrainingK10 Clock previous第12页/共33页Page 13Kinetis K10 TrainingK10 SIM第13页/共33页Page 14Kinetis K10 TrainingK10 SIM第14页/共33页Page 15Kinetis K10 TrainingK10 SIM第15页/共33页Page 16Kinetis K10 Traini

4、ngK10 GPIO ConfigureControl Mode:PORTx_PCRn Pin Control RegisterPORTx_GPCLR Global Pin Control Low RegisterPORTx_GPCHR Global Pin Control High RegisterPORTx_ISFR Interrupt Status Flag RegisterPORTx_DFER Digital Filter Enable RegisterPORTx_DFCR Digital Filter Clock RegisterPORTx_DFWR Digital Filter W

5、idth Register第16页/共33页Page 17Kinetis K10 TrainingK10 GPIO PCRInterrupt Status FlagInterrupt Configuration0000 Interrupt/DMA Request disabled.0001 DMA Request on rising edge.0010 DMA Request on falling edge.0011 DMA Request on either edge.0100 Reserved.1000 Interrupt when logic zero.1001 Interrupt on

6、 rising edge.1010 Interrupt on falling edge.1011 Interrupt on either edge.1100 Interrupt when logic one.Drive Strength EnableOpen Drain EnablePassive Filter EnableSlow Rate EnablePull EnablePull SelectPull UpPull DownDetail in Page 239 of K10P100M100SF2RM.pdf第17页/共33页Page 18Kinetis K10 TrainingK10 G

7、PIO PCRPin Mux Control000 Pin Disabled (Analog).001 Alternative 1 (GPIO).010 Alternative 2 (chip specific).011 Alternative 3 (chip specific).100 Alternative 4 (chip specific).101 Alternative 5 (chip specific).110 Alternative 6 (chip specific).111 Alternative 7 (chip specific / JTAG / NMI).Detail in

8、Page 239 of K10P100M100SF2RM.pdfK10 Signal Multiplexing and Pin AssignmentsFind in Page 59 of K10P100M100SF2.pdf第18页/共33页Page 19Kinetis K10 TrainingK10 GPIO PCRDetail in Page 239 of K10P100M100SF2RM.pdfK10 Signal Multiplexing and Pin AssignmentsFind in Page 59 of K10P100M100SF2.pdf第19页/共33页Page 20Ki

9、netis K10 TrainingK10 GPIO PCR C Code/* Set pin0,pin1 of PORTD as GPIO */PORTD_PCR0=(0|PORT_PCR_MUX(1);PORTD_PCR1=(0|PORT_PCR_MUX(1);第20页/共33页Page 21Kinetis K10 TrainingK10 LEDs 第21页/共33页Page 22Kinetis K10 TrainingK10 GPIOControl Mode:GPIOx_PDOR Port Data Output RegisterGPIOx_PSOR Port Set Output Re

10、gisterGPIOx_PCOR Port Clear Output Register GPIOx_PTOR Port Toggle Output RegisterGPIOx_PDIR Port Data Input Register GPIOx_PDDR Port Data Direction RegisterDetail in Page 1477 of K10P100M100SF2RM.pdf第22页/共33页Page 23Kinetis K10 TrainingK10 GPIO PDORDetail in Page 1482 of K10P100M100SF2RM.pdf第23页/共33

11、页Page 24Kinetis K10 TrainingK10 GPIO PSORDetail in Page 1482 of K10P100M100SF2RM.pdf第24页/共33页Page 25Kinetis K10 TrainingK10 GPIO PCORDetail in Page 1483 of K10P100M100SF2RM.pdf第25页/共33页Page 26Kinetis K10 TrainingK10 GPIO PTORDetail in Page 1484 of K10P100M100SF2RM.pdf第26页/共33页Page 27Kinetis K10 Trai

12、ningK10 GPIO PDIRDetail in Page 1484 of K10P100M100SF2RM.pdf第27页/共33页Page 28Kinetis K10 TrainingK10 GPIO PDDRDetail in Page 1485 of K10P100M100SF2RM.pdf第28页/共33页Page 29Kinetis K10 TrainingK10 GPIO C Code/* set pin0,pin1 to be output*/GPIOD_PDDR=GPIO_PDDR_PDD(GPIO_PIN(0)|GPIO_PIN(1);GPIOD_PDOR &=

13、 GPIO_PDOR_PDO(GPIO_PIN(1)|GPIO_PIN(0);#define GPIO_PDDR_PDD(x) (uint32_t)(uint32_t)(x)GPIO_PDDR_PDD_SHIFT)&GPIO_PDDR_PDD_MASK)#define GPIO_PDOR_PDO(x) (uint32_t)(uint32_t)(x)GPIO_PDOR_PDO_SHIFT)&GPIO_PDOR_PDO_MASK)#define GPIO_PDOR_PDO_MASK 0 xFFFFFFFFu#define GPIO_PDOR_PDO_SHIFT 0#define G

14、PIO_PIN_MASK 0 x1Fu#define GPIO_PIN(x) (1)(x & GPIO_PIN_MASK)第29页/共33页Page 30Kinetis K10 TrainingK10 GPIO C CodeGPIOD_PDOR |= GPIO_PDOR_PDO(GPIO_PIN(0);GPIOD_PDOR &= GPIO_PDOR_PDO(GPIO_PIN(0);#define GPIO_PDDR_PDD(x) (uint32_t)(uint32_t)(x)GPIO_PDDR_PDD_SHIFT)&GPIO_PDDR_PDD_MASK)#define GPIO_PDOR_PDO(x) (uint32_t)(uint32_t)(x)GPIO_PDOR_PDO_SHIFT)&GPIO_PDOR_PDO_MASK)#define GPIO_PDOR_PDO_MASK 0 xFFFFFFFFu#define GPIO_PDOR_PDO_SHIFT 0#define GPIO_PIN_MASK 0 x1Fu#define GPIO_PIN(x) (1)(x & GPIO_PIN_MASK)第30页/共3