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1、M802 Quick Reference ManualRevision 0.3M802Quick Reference ManualRevision: 0.3Release date: 10/28/2013Amlogic, Inc.1/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevision 0.3COPYRIGHT© 2013 Amlogic, Inc. No part of this document may be reproduced. Transmitted, transcribed, or translate

2、d into any language in any form or by any means with the written permission of Amlogic, Inc.TRADEMARKSAMLOGIC is a trademark of Amlogic, Inc. All other trademarks and registered trademarks are property of their respective companies.DISCLAIMERAmlogic Inc. may make improvements and/or changes in this

3、document or in the product described in this document at any time.This product is not intended for use in medical, life saving, or life sustaining applications.Circuit diagrams and other information relating to products of Amlogic Inc. are included as a means or illustrating typicalapplications. Con

4、sequently, complete information sufficient for production design is not necessarily given. Amlogic makes no representations or warres with respect to the accuracy or completeness of the contents presented in this document.REVISION HISTORYCONTACT INFORMATIONAmlogic, Inc.2518 Mission College Blvd, Ste

5、 120 Santa Clara, CA 95054U.S.A.2/41AMLOGIC, Inc. ProprietaryRevision NumberRevision DateChanges0.12013/8/6Initial draft0.22013/9/29Update specifications0.32013/10/28Correct Ethernet supportM802 Quick Reference ManualRevision 0.3Contents1.2.3.General Description4Features Summary5Pin Out Specificatio

6、n93.1Pin-Out Diagram (top view)93.23.3Pin Order10Pin Description143.43.5Pin Multiplexing Tables24Signal Descriptions284.Operating Conditions364.14.24.3Absoluteum Ratings36Recommended Operating Conditions36DDR3/LPDDR2/LPDDR3 SDRAM Specifications374.3.1Recommended Operating Codditions374.3.24.3.3DC sp

7、ecifications - DDR3/DDR3L/DDR3U mode37DC Specifications LPDDR2 mode374.3.4DC Specifications LPDDR3 mode374.4Recommended Oscillator Electrical Characteristics384.54.6Recommended Power on sequence38Power consumption395.Mechanical Dimensions403/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevi

8、sion 0.31.General DescriptionM802 is an advanced application processor designed for Tablet and MID applications. It integrates a powerful CPU/GPUsubsystem, and a secured 4KCODEC engine with all major peripherals to form the ultimate low power multimedia AP.The main system CPU is a quad core ARM Cort

9、ex-A9r4 CPU with 32KB L1 instruction and 32KB data cache for each core and alarge 1MB L2 unified cache to improve system performance. In addition, the Cortex-A9 CPU includes the NEON SIMD co- processor to improve software media processing capability. The quad core ARM Cortex-A9 CPU can run up to 2GH

10、z and has a wide bus connecting to the memory sub-system.The graphic subsystem consists of eight graphic engines and a flexible/graphic output pipeline. The eight core ARM Mali-450 GPU including dual geometry processors (GP) and six pixel processors (PP) handles all the OpenGL ES 1.1/2.0 and OpenVGg

11、raphics programs, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversionoperations. Theoutput pipeline can perform advanced image correction and enhancements. Together, the Cnd GPUhandle all operating system, networking, user-interface and garelated

12、tasks.Four additional processors offload the Cortex-A9 CPUs by handling all audio andCODEC processing the MediaCndtri-core AmlogicEngine (AVE) including dedicated hardwaredecoders and encoders. The MediaCPU is audiooptimized and handles all audio decoding tasks. The scalable tri-core AVE is capable

13、of decoding 4K2K resolutionwithcomplete TrustedPath (TVP) for secure applications and supports full formats including MVC, MPEG-1/2/4, VC-1/WMV,AVS, Real, MJPEG streams, H.264, H265 and also JPEG pictures with no size limitation. The independent encoder is ableto encode in JPEG and H.264 up to 1080p

14、 at 30fps.M802 integrates all standard audio/input/output interfaces including the LVDS, RGB888 TTL, MIPI-DSI, eDP panelinterface, an1.4b transmitter with 3D support, 4K UHD output, CEC and HDCP, a complete audio CODEC with headphonePA and microphone bias, I2S and SPDIF digital audio input/output in

15、terfaces, a PCM audio interface, a MIPI-CSI and a DVPcamera input interface with integrated high quality ISP.M802 integrates a set of functional blocks for digital TV broadcasting streams. The built-in demux can process the TV streamsfrom transport stream input interface, which can connect to extern

16、al tuner/demodulator.The processor has rich advanced network and peripheral interfaces, including a 10/100 Ethernet MAC with RMII interface, dualUSB 2.0 high-speed ports (one OTG and one HOST), two SDIOs with multi-standard memory card controller, five UARTinterfaces, five I2C interfaces, one high-s

17、peed SPI interface and sevens.Standard development environment utilizing GNU/GCC Android tool chain is supported. Please contact your AMLOGIC salesrepresentative for more information.4/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevision 0.32.Features SummaryCPU Sub-system···

18、;····Quad core ARM Cortex-A9r4 CPU up to 2GHz (DVFS) and 20,000DMIPSARMv7 instruction set, multi-issue superscalar, out-of-order architecture with dynamic branch prediction 32KB instruction cache and 32KB data cache1MB Unified L2 cacheAdvanced NEON and VFP co-processorAdvanced Tr

19、ustZocurity systemApplication based traffic optimization using internal QoS-based switching fabrics3D Graphics Processing Unit·······Eight core ARM Mali-450 GPU up to 600MHz (DVFS)Dual Geometry Processors with 32KB L2 cache Six Pixel Processors with 2x 128KB L2 cac

20、hes Concurrent multi-core processing 3600Mpix/sec and 132Mtri/secFull scene over-sampled 4X-aliasing engine with no additional bandwidth usageOpenGL ES 1.1/2.0 and OpenVG 1.1 support5/41AMLOGIC, Inc. ProprietaryMemory InterfaceSystem InterfaceM802Core and FabricInput UnitOutput UnitAudio Input UnitA

21、udio Output UnitTrustZocurityInput/Output InterfacesIRRx & TxSAR ADCx4I2Cx5UARTx5SPIx7USB OTGUSB Host10/100Ethernet MACSDXC/ SDHC/ SDSDIO2G/3GI/F2.5D Graphic ProcessingPower Management ProcessorCrypto EngineSecured NV storageMediaCVEore 0AVECore 1AVECore 2SPDIFAudio I/FI2SPCM x2Line-in x3Audio A

22、DCMic BiasAudio I/FSPDIFI2S (5.1)PCM x2Audio DACLine-outHeadphone2G MonoDVPCamera ISPMIPI-CSIRGB888De-interlacerScalarEnhancementRGB888 TTLLVDSMIPI-DSIeDPPanel & BL SupportTS InputDemuxMali-450 GPMali-450 GPMali-450 PPMali-450 PPMali-450 PPMali-450 PPMali-450 PPMali-450 PP288KB L2 CacheMMUCortex

23、-A9v4 32KB I/D-Cache NEON/VFPCortex-A9v4 32KB I/D-Cache NEON/VFPCortex-A9v4 32KB I/D-Cache NEON/VFPCortex-A9v4 32KB I/D-Cache NEON/VFP1MB L2 CacheMMUPLLsPMUJTAGRTCTemp SensorPerfMonDDR3/3L & LPDDR2/3Memory ControllerNAND/eMMC/iNAND/ tSD Flash ControllerSPI NORFlash ControllerM802 Quick Reference

24、 ManualRevision 0.32.5D Graphics Processor······Fast bitblt engine with dual inputs and single outputProgrammable raster operations (ROP) Programmable polyphase scaling filterSupports multipleformats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits gra

25、phics layer)Fast color space conversionAdvanced-flickering filterCrypto Engine·Supports AES block cipher with 128/192/256 bits keys, standard 16 bytes block size and streamodesECB, CBC and CTR··Supports DES/3DES block cipher with ECB and CBC modes supporting 64 bits key for DES and 19

26、2 bits key for 3DESBuilt-in LSFR Random number generator/Picture CODECTri-cores Amlogic an encoders·Engine (AVE) based on scalable multi-core architecture with dedicated hardware decoders···Hardware based trustedSupports multiple “secured”/Picture Decodingpath (TVP)decoding sessi

27、ons and simultaneous decoding and encodingo o o o o o o o o o o o ooH.264 HPL5.1 up to 4Kx2K30fpsH.264 MVC up to 1080P60fpsMPEG-4 ASPL5 up to 1080P60fps (ISO-14496)WMV/VC-1 SP/MP/AP up to 1080P60fps AVS JiZhun Profile up to 1080P60fpsMPEG-2 MP/HL up to 1080P60fps (ISO-13818) MPEG-1 MP/HL up to 1080P

28、60fps (ISO-11172)Real8/9/10 up to 1080P60fpsH.265 HEVC up to 720PWebM up to VGAMultiple language and multiple format sub-titlesupportMJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)Supports JPEG thumbnail, scaling, rotation and transition effectsSupports *.mkv,*.wmv,*.mpg, *.mpeg,

29、*.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats·/Picture Encodingo ooIndependent JPEG and H.264 encoder with configurable performance/bit-rateJPEG image encodingH.264encoding up to 1080P30fpsPost-Processing EngineMotion adaptive 3D noise reduction filter····&#

30、183;···Advanced motion adaptive edge enh3:2 pull-down supportng de-interlacing engineProgrammable poly-phase scalar for both horizontal and vertical dimension for zoom and windowingProgrammable color management filter (to enhance blue, green, red, face and other colors) Dynamic Non-Li

31、near Luma filterProgrammable color matrix pipelinemixer: 2planes and 2 graphics planes peroutput6/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevision 0.3Digital LCD Panel Output········Single channel LVDS up to 1366x768 resolutionRGB888 TTL interfac

32、e with TCON supporting digital panel up to 1920x1200 resolution 4-lane MIPI-DSI supporting panel up to 1920x1200 resolution4-lane eDP supporting panel up to 2560x1600 resolutionVertical panel supportBuilt-in LED and LCD controlsThree independent Gamma tables for LCD panel tuningDithering logic for m

33、apto different LCD panel color depthOutputBuilt-in output·1.4b transmitter including both controller and PHY with CEC and HDCP, 4Kx2K30 max resolution···Supports all standard SD/HD/UHDoutput formats: 480i/p, 576i/p, 720p ,1080i/p and 4Kx2KSupports dualoutput with combination of L

34、CD+Supports 3D LCD panel and 3DdisplayAudio CODEC and Input/Output···Low power MediaCPU with DSP audio processingSupports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 5.1 down-mixingInternal audio CODEC supporting 3 channels stereo input, 1 channel stereo HP/SPK output and 1 cha

35、nnel 2G mono outputI2S audio interface supporting 6-channel(5.1) out and 2-channel in Built-in SPDIF/IEC958 and PCM serial digital audio input/outputSupports concurrent dual audio stereo channel output with combination of analog+PCM or I2S+PCM···Camera Interfaces and ISP··&#

36、183;DVP parallel camera input and MIPI-CSI camera interface with 4 lanes and 1Gbps per laneSupports RAW, YUV or RGB camera input formats Built-in 12MP Image Signal Processor (ISP) supportso o o o o o o ooUp to 10-bits RAW Bayer format data from MIPI-CSI or DVPMax resolution 4320x4096 and up to 1080p

37、303A (AE, AF, AWB)Defect pixel detection/correction Black level correctionLens shade correction2D noise reduction, and 3D noise reduction for SharpeningGamma and color correctionmodeMemory and Storage Interface·····Dual-channel 32-bit SDRAM memory interface running up to DDR

38、1600Supports up to 4GB DDR3, DDR3L, LPDDR2 and LPDDR3 memory TrustZone protected DRAM memory region and internal SRAMSupports SLC/MLC/TLC NAND Flash with 60-bit ECC, compatible to ONFI 2.1 and Toggle 2.0 mode SDSC/SDHC/SDXC card and SDIO interface with 1/4-bit data bus width supporting spec version

39、2.x/3.x/4.x modes up to UHS-I/II SDR104Support tSD 4bits module/chip which is compatible with SDIO Spec.DS/HS·7/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevision 0.3·eMMC and MMC card interface with 1/4/8-bit data bus width supporting spec version 4.4x/4.5x HS SDR 52MHz,compat

40、ible with standard iNAND interfaceSupports serial 1, 2 or 4-bit NOR Flash via SPI interface··Built-in 4k bits One-Time-ProgramROM for key storageNetwork···Integrated IEEE 802.3 10/100 Ethernet controller with RMII interfaceOptional 50MHz clock output to Ethernet PHYWiFi/IEEE

41、802.11 & Bluetooth supporting via SDIO/USB/UART/PCMDigital Television Interface·Transport stream(TS) input interface with built-in demux processor for connecting to external digital TVtuner/demodulator·Built-in, I2C and SPI interfaces to control tuner and demodulatorIntegrated I/O Cont

42、rollers and Interfaces·······Dual USB 2.0 high-speed USB I/O, one USB Host and one USB OTG5 UART, 5 I2C and SPI interface with 3 slave selectsSevensProgrammable IR remote input/output controllers2G/3G interfaces for both voice and data Built-in 10bit SAR ADC with 4

43、 input channelsA set of General Purpose IO interfaces with built-in pull up and pull downSystem, Peripherals and Misc. Interfaces····Integrated general purpose timers, counters, DMA controllersIntegrated RTC with battery backup option 24 MHz and 32 KHz crystal oscillator input Em

44、bedded debug interface using ICE/JTAGPower Management······Multiple external power domains controlled by PMICMultiple internal power domains controlled by software Multiple sleep modes for CPU, system, DRAM, etc.Multiple internal PLLs for DVFS operation Multi-voltage I/

45、O design for 1.8V and 3.3VPower management auxiliary processor in dedicated always-on (AO) power domain to communicate with external PMICSecurity····Trustzone based Trusted Execution Environment (TEE)Secured boot, OTP, internal control buses and storageProtected memory regions an

46、d scrambled memory data interfaceTrustedPath and Secured (needs SecureOS software)Package·LFBGA, 19x19mm, 531-ball, 0.65 ball pitch, RoHS compliant8/41AMLOGIC, Inc. ProprietaryM802 Quick Reference ManualRevision 0.33.Pin Out Specification3.1Pin-Out Diagram (top view)9/41AMLOGIC, Inc. Proprietar

47、yM802 Quick Reference ManualRevision 0.33.2Pin OrderTable 1. Pin Order10/41AMLOGIC, Inc. ProprietaryBALL #NET NAMEBALL #NET NAMEBALL #NET NAMEA1VDDCPUB28TX_CKND25DVSSA2GPIOX_12C1GPIOX_18D26XTAL24_xoA3GPIOX_10C2GPIOX_17D27_CEXTA6CARD_2C3GPIOX_8E2GPIOY_4A7VDDCPUC4GPIOX_6E3GPIOX_21A10GPIODV_6C5DVSSE4GP

48、IOX_14A11GPIODV_8C6CARD_3E5GPIOX_13A14GPIODV_21C7CARD_5E6GPIOX_4A15GPIODV_23C8GPIODV_2E7GPIOX_3A18USBA_VBUSC9GPIODV_4E8GPIOX_2A19USBA_DPC10GPIODV_7E9GPIOX_1A22EXTC_HPLLC11VDDCPUE10GPIODV_10A23GPIOH_4C12GPIODV_17E11GPIODV_11A26TX_1PC13GPIODV_19E12GPIODV_13A27TX_0PC14GPIODV_22E13GPIODV_14A28TX_CKPC15R

49、REF_DPLLE14GPIODV_24B1DVSSC16SARADC_CH2E15GPIODV_26B2GPIOX_11C17SARADC_CH0E16GPIODV_27B3GPIOX_9C18USBA_TXRTUNEE17SARADC_AVSS18B4GPIOX_7C19USBB_TXRTUNEE18SARADC_AOUTB5CARD_0C20NC2E19USBB_DMB6CARD_1C21NC1E20USBB_DPB7CARD_4C22GPIOH_8E21AVDD18_HPLLB8CARD_6C23GPIOH_2E22AVSS18_HPLLB9GPIODV_3C24GPIOH_0E23G

50、PIOH_6B10GPIODV_5C25TX_2NE24GPIOH_5B11GPIODV_9C26_REXTE25VDDIO_HB12GPIODV_16C27DVSSE27XTAL24_xiB13GPIODV_18C28VDDEE_0V9F1GPIOY_7B14GPIODV_20D2GPIOX_20F2GPIOY_6B15EXTC_DPLLD3GPIOX_19F3GPIOY_5B16SARADC_CH3D4VDDCPUF4GPIOX_15B17SARADC_CH1D5GPIOX_5F5GPIOX_16B18USBA_IDD7VDDCPUF8DVSSB19USBA_DMD9GPIOX_0F9GP

51、IODV_0B20NC4D11DVSSF10GPIODV_1B21NC3D13GPIODV_15F11GPIODV_12B22GPIOH_9D15GPIODV_25F12VDDIO_CARDB23GPIOH_3D17GPIODV_29F13VDDIO_DVB24GPIOH_1D19DVSSF14VDDIO_ZB25TX_2PD21USBB_VBUSF15GPIODV_28B26TX_1ND23GPIOH_7F16USB_VDD33B27TX_0ND24VDDEE_0V9F17VDDIO_XTAL_18M802 Quick Reference ManualRevision 0.311/41AML

52、OGIC, Inc. ProprietaryBALL #NET NAMEBALL #NET NAMEBALL #NET NAMEF18SARADC_AVDD18J23CSI_0_pM11VDDCPUF19USB_VDD18J24CSI_1_pM13VDDCPUF20AVDD18J25CSI_1_nM15DVSSF21TX_AVSSJ26DIF_4_pM17VDDEE_0V9F22TX_AVSSJ27DIF_3_nM19DVSSF24TX_AVDD18K1BOOT_15M22CSI_AVDD18F26_AVSS18K2BOOT_16M23CSI_4_pF27DIF_0_pK3BOOT_17M24CSI_4_nF28DIF_0_nK4GPIOY_14M26GPIOZ_1G1VDDCPUK5GPIOY_16M27GPIOZ_0G2GPIOY_9K6GPIOY_15N2BOOT_4G3GPIOY_8K8VDDCPUN3BOOT_5G5GPIOY_0K11DVSSN5BOOT_3G6GPIOY_1K13DVSSN6VDDIO_BOOTG10VDDCPUK15DVSSN7VDDCPUG12DVSSK17DVSSN10DVSSG14VDDCPUK22DIF_AVSSN12DVSSG16DVSSK23CSI_2_pN14DVSSG18USB_VSSAK24CSI_2_