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1、ti ads5294 80msps 8路医学图像解决方案ti公司的ads5294是80msps/14位 8路,具有低功耗,高snr和低sfdr,以及延续过载复原,适用于高性能系统设计. ads5294具有数乁信号处理核,包括数字模块, 可编程数字增益0 db到12 db,内部和外接基准,1.8v工作电压,主要用在超声图像,通信设备和多路数据采集.本文介绍了ads5294主要特性,方框图, 模拟输入模型和,评估模块测试图以及评估模块,材料清单和布局图.using process technology and innovative circuit techniques, the ads5294 i

2、s a low power 80msps 8-channel adc. low power consumption, high snr, low sfdr, and consistent overload recovery allow users to design high performance systems.the ads5294 has a digital processing block that integrates several commonly used digital functions for improving system performance. it inclu

3、des a digital filter module that has built-in decimation filters (with low-pass, high-pass and band-pass characteristics).the decimation rate is also programmable (by 2, by , or by 8). this makes it useful for narrow-band applications, where the filters can be used conveniently to improve snr and kn

4、ock-off harmonics, while at the same time reducing the output data rate. the device includes an averaging mode where two channels (or even four channels) can be averaged to improve snr.serial lvds outputs reduce the number of interface lines and enable the highest system integration. the digital dat

5、a from each channel adc can be output over one or two wires of lvds output lines depending on the adc sampling rate. this 2-wire interface helps keep the serial data rate low, allowing low cost based receivers to be used even at high sample rate. the adc resolution can be programmed to 12 bit or 14

6、bit through register. a very unique feature is the programmable mapping module that allows flexible mapping between the input channels and the lvds output pins. this helps greatly reduce the complexity of lvds output routing and can potentially result in cheaper system boards by reducing the number

7、of pcb layers.the device integrates an internal reference trimmed to accurately match across devices. best performance is expected to be achieved through the internal reference mode. the device can be driven with external references as well. the device is available in a 12 mm × 12 mm 80-pin qfp

8、. it is specified over a 40°c to 85°c operating temperature range. ads5294 is completely pin-to-pin and register compatible to ads5292 qfp. it is specified over a 40°c to 85°c operating temperature range. ads5294 is completely pin-to-pin and register compatible to ads5292.ads5294

9、主要特性:um sample rate: 80 msps/14-bithigh signal-to-noise ratio75.5-dbfs snr at 5 mhz/80 msps78.2-dbfs snr at 5 mhz/80 msps and decimation filter enabled84-dbc sfdr at 5 mhz/80 mspslow power consumption58 mw/ch at 50 msps77 mw/ch at 80 msps (2 lvds wire per channel)digital processing blockprogrammable

10、 fir decimation filter and oversampling tominimize harmonic interferenceprogrammable iir high pass filter to minimize dc offsetprogrammable digital gain: 0 db to 12 db2- or 4- channel averagingflexible serialized lvds outputs:one or two wires of lvds output lines per channeldepending on adc sampling rateprogrammable mapping between adc input channels andlvds output pins-eases board designvariety of test patterns to verify data captureby fpga/receiverinternal and external reference

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