数字逻辑课程设计之电子琴

1、.数字逻辑课程设计之电子琴实验内容：设计一个八音电子琴，能通过八个键进行手动控制音响，也可以通过自动控制有效自动播放一段音乐。实验设计：本实验分为四个模块：一个模块是主程序，一个模块是自动播放音乐部分，一个模块是音调发生器部分，一个模块是数控分频部分。通过接口和结构体component的定义将各个模块连接起来。本程序总的有11个输入，1个输出，2个输入为时钟脉冲，1个输入是控制电子琴自动演奏或者手动演奏的使能端，8个输入端为电子琴的八个键，1个输出为扬声器输出音乐。在音调发生器部分中，需要按照模=50000/频率的方法进行分频，但是要达到提高音量使占空比为50%的效果还需要再对信号进行二分频，

2、因此最后得到的音调发生器进行分频预置值如下：音符 (C)1234567i频率(Hz)262294330349392440494523模9585757163565047当某位音符电平输入有效时，对应不同的分频预置值，将分频预置值输出并作为数控分频部分的输入，分频预置值控制对主频的分频。在数控分频部分，将输入的分频预置值和时钟脉冲作为输入，最后输出直接连接扬声器。这一部分一共包含了两个进程，第一个进程是根据不同音符的不同频率进行在主频下进行分频，得到音符的相应频率，第二个进程是为了提高音量使占空比为50%而进行二分频。在自动播放部分，1个时钟脉冲输入，1个自动播放的使能端输入，还有8个音符的键为输

3、入，输出为音符对应的8位高低电平，输出连接到音调发生器的8位输入，如果自动播放的使能端（auto）无效则进行手动操作，在手动操作下，该模块的输出直接为输入。如果自动播放的使能端输入有效，则播放事先存储的一段音乐，首先将主频50进行10000分频，因此一个脉冲为.秒，每来一个脉冲进行计数并播放一个音符。直到设置的音符全部播放完毕，计数器回。源代码：主模块部分：定义了结构体和各模块函数library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all;entity

4、 piano is port(clk0,clk1:in std_logic; auto:in std_logic; inplay:in std_logic_vector(7 downto 0); play:out std_logic); end piano;architecture run of piano is component autoplay is自动播放部分 port(A:in std_logic_vector(7 downto 0); B,C:in std_logic; D:out std_logic_vector(7 downto 0); end component; compo

5、nent tone is音调发生器部分 port(A:in std_logic_vector(7 downto 0); B:out integer range 0 to 170); end component; component control is数控分频部分 port(A:in std_logic; B:in integer range 0 to 170; C:out std_logic); end component; signal sw0:std_logic_vector(7 downto 0);自动播放部分的输出和音调发生器的输入，表示八个音符 signal tone0:integ

6、er range 0 to 170;音调发生器的输出和数控分频部分的输入，表示音符的频率begin 在这个进程中把各个部分连接起来 G1:autoplay port map(A=>inplay,B=>auto,C=>clk0,D=>sw0); G2:tone port map(A=>sw0,B=>tone0); G3:control port map(A=>clk1,B=>tone0,C=>play);end run;自动播放模块：library ieee;use ieee.std_logic_1164.all;use ieee.std_l

7、ogic_arith.all;use ieee.std_logic_unsigned.all;entity autoplay is port(A:in std_logic_vector(7 downto 0); -A=>inplay,B=>auto,C=>clk0,D=>sw0 B,C:in std_logic; D:out std_logic_vector(7 downto 0);end autoplay;architecture music of autoplay is signal clk2:std_logic; -对50脉冲进行分频得到的的脉冲信号 signal

8、 count0:integer range 0 to 62; -记录自动播放的乐曲的脉冲并控制播放 signal count3:integer range 0 to 10000;-分频时的计数 begin separate:process(C,B)分频将脉冲变为的信号 begin if B='0' then count3<=0;clk2<='0' elsif(C'event and C='1') then count3<=count3+1; if count3=5000 then clk2<='1'

9、 elsif count3=10000 then clk2<='0'count3<=0; end if; end if; end process; half:process(clk2) begin if(clk2'event and clk2='1') then如果脉冲个数多于自动播放的音符，则计数器回，否则记录第几个脉冲 if count0=62 then count0<=0; else count0<=count0+1; end if; end if; end process; musicplay:process(C,B,A)

10、 begin if B='1' then启动自动播放后，在的脉冲下，每来一个脉冲相应播放一个音符 case count0 is when 0 => D<="00010000" when 1 => D<="00000100" when 2 => D<="00000100" when 3 => D<="00000100" when 4 => D<="00001000" when 5 => D<="000

11、00010" when 6 => D<="00000010" when 7 => D<="00000010" when 8 => D<="00000001" when 9 => D<="00000010" when 10 => D<="00000100" when 11 => D<="00001000" when 12 => D<="00010000" when

12、13 => D<="00010000" when 14 => D<="00010000" when 15 => D<="00010000" when 16 => D<="00010000" when 17 => D<="00000100" when 18 => D<="00000100" when 19 => D<="00001000" when 20 => D<

13、;="00000010" when 21 => D<="00000010" when 22 => D<="00000010" when 23 => D<="00000001" when 24 => D<="00000100" when 25 => D<="00010000" when 26 => D<="00010000" when 27 => D<="00000

14、001" when 28 => D<="00000001" when 29 => D<="00000001" when 30 => D<="00000001" when 31 => D<="00000010" when 32 => D<="00000010" when 33 => D<="00000010" when 34 => D<="00000010" whe

15、n 35 => D<="00000010" when 36 => D<="00000100" when 37 => D<="00001000" when 38 => D<="00001000" when 39 => D<="00000100" when 40 => D<="00000100" when 41 => D<="00000100" when 42 => D&

16、lt;="00000100" when 43 => D<="00000100" when 44 => D<="00001000" when 45 => D<="00010000" when 46 => D<="00010000" when 47 => D<="00010000" when 48 => D<="00000100" when 49 => D<="000

17、00100" when 50 => D<="00000100" when 51 => D<="00001000" when 52 => D<="00000010" when 53 => D<="00000010" when 54 => D<="00000010" when 55 => D<="00000001" when 56 => D<="00000100" w

18、hen 57 => D<="00010000" when 58 => D<="00010000" when 59 => D<="00000001" when 60 => D<="00000001" when 61 => D<="00000001" when 62 => D<="00000001" when others => null; end case; else D<=A;如果不进行自动播

19、放，则将输入位音符直接输出，并且不执行前两个进程的操作 end if; end process;end music;音调发生器模块：library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all;entity tone is port(A:in std_logic_vector(7 downto 0);输入的是位音符的电平 B:out integer range 0 to 170);输出的是各音符对应的模值end tone;architecture rtl

20、 of tone isbegin search:process(A) begin case A is when "00000001" =>B<=95; when "00000010" =>B<=85; when "00000100" =>B<=75; when "00001000" =>B<=71; when "00010000" =>B<=63; when "00100000" =>B<=56; whe

21、n "01000000" =>B<=50; when "10000000" =>B<=47; when others =>B<=170; end case; end process;end rtl;数控分频模块：library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_unsigned.all;entity control is port(A:in std_logic;时钟信号 B:in intege

22、r range 0 to 170;各音符的模值 C:out std_logic);end control;architecture abc of control is signal spk:std_logic; begintwoclock:process(A,B)将各个音符按照不同的模值分频得到各音符的频率的倍 variable count1:integer range 0 to 170; begin if(A'event and A='1') then if count1=B then count1:=0;spk<='1' else count1:=count1+1;spk<='0' end if; end if; end process;reverse:process(spk)二分频使占空比为并直接输出 variable count2:std_logic; begin