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1、SMT设备原理与应用Principle and Application of SMT Equipment,2010.9,本课程主要讲述内容,时间安排,考试安排,实验,辅导和平时考勤 SMT工艺流程和相关设备,SMT设备概述 Summarize,SMT概述与发展趋势 4学时 summary and trend 焊膏组成与印刷的方式 4学时 solder paste composition and printing technology 印刷机原理与应用 6学时 principle and application of printer 贴片机原理与设备 12学时 principle and app
2、lication of placement machines 波峰焊原理与应用 6学时 principle and application of wave soldering oven 再流炉原理与应用 6学时 principle and application of reflow soldering oven 检测设备 4学时 inspection equipment,本课程的主要内容Including,SMT生产线参观(印刷机、再流炉) 2学时 Visiting SMT production line(printer, reflow oven) 贴片机编程原理; 2学时 Mounter (
3、placement machines) program 贴片设计性实验。 2学时 Placement process design experiment,实验内容 experiment content,期末考试:开卷,占总分60% 平时:20%(作业50%+考勤40%+特别贡献10%) 实验:20%,考试方式 test rules,联系方式:, 辅导时间和地点: 地点: 时间:每周,辅导时间和联系方式,SMT概述与发展趋势,Summary and Trends,Surface mount technology was developed in the 1960s an
4、d became widely used in the late 1980s. Much of the pioneering work in this technology was by IBM. Components were mechanically redesigned to have small metal tabs or end caps that could be directly soldered to the surface of the PCB. Components became much smaller and component placement on both si
5、des of a board became far more common with surface mounting than through-hole mounting, allowing much higher circuit densities. Surface mounting lends itself well to a high degree of automation, reducing labor cost and greatly increasing production rates. SMDs can be one-quarter to one-tenth the siz
6、e and weight, and one-half to one-quarter the cost of equivalent through-hole parts.,SMT技术发展历史和优点History and benefits,常用术语Terms,Chip Resistor,chip capacitor,chip inductor,discrete semiconductor,SO,Chip Carrier,Plastic Leadless Chip Carrier,Leadless Ceramic Chip Carrier,Quad Flat Package,Ball grid ar
7、ray,The solder joint congurations of the IC packages can be represented by ve major categories,Gullwing leads 翼型引脚,J-lead design J型引脚,Butt-leads 对接引脚,leadless,Ball-lead 球形引脚,Types of surface mount assemblytechnology,表面组装技术的类型,Type I surface mount boards have SMCs only for both sides of the boards,Ty
8、pe II boards have both SMCs and THCs on one side of the board and chip components on the other side,Type III SMT have THCs on one side of the board and chip components on the other side,Surface mount soldering process,表面组装焊接类型,Wave soldering,适用于通孔装配技术THT和通孔元件THC 为了减小阴影效应(shadowing effect),通常采用双波峰技术(
9、dual wave),前面是湍流波(turbulent wave)用于确保所有的引脚润湿,后面的层流波(laminar wave)用于焊接 波峰焊仅适用于小的SMCs,大的SMCs和行间距依然是存在桥接(bridge)和焊锡不足等问题,reflow soldering,使用预配置好的焊膏(solder paste)进行焊接,焊膏本身可以作为粘接剂 焊膏用模版印刷到PCB上 采用贴片机进行元件放置 在回流炉(reflow oven)中多个温区进行整体加热焊接,reflow soldering,solder paste serves not only as a solder material, b
10、ut also as a glue. the deposition of solder paste is usually conducted by the stencil or screen printing, dispensing, or pin-transferring processes. The premetered deposition of solder material onto the sites to be soldered ensures a consistent solder volume for the joints, and accordingly eliminate
11、s the insufcient solder volume problems due to the shadowing effect encountered by wave soldering. In addition, this premetered solder deposition also reduces the incidence of bridging.,Advantages of solder paste technology in SMT,the use of mass reow process allows a well-controlled graduate heatin
12、g prole, thus eliminating potential damage of the SMCs due to the thermal shock caused by the wave soldering the use of solder paste allows the possibility of step soldering. the soldering performance of solder paste is not sensitive to the type of solder mask used on the PCBs. For the wave solderin
13、g process, a solder mask with a smooth nish is found to cause solder ball and bridging problems .,Advantages of solder paste technology in SMT,技术发展趋势,Surface mount technology trends,Technology driving force,Smaller Faster Higher complexity Lower power Lower cost,Speed,processing speed increases appr
14、oximately ve times in every 5 years; results from reduction in both on-chip delay in semiconductors and packaging delay this improvement in speed is closely associated with miniaturization of IC components, as demonstrated by the simultaneous reduction in line widths,IC transistor integration The co
15、mplexity of semiconductor chips can be measured by transistor integration. microprocessor integration has increased by 2000 since its introduction in 1970 This increase in complexity of semiconductor chips essentially drives the evolution of corresponding packaging and assembly technology,Complexity
16、,Pin count number the pin count number will increase almost 100 from the through-hole technology in the early 1980s to modules/system packaging in the late 1990s.,Complexity,IC feature size Discrete component size,Miniaturization,Area array packages,Pressure of speed, complexity, and miniaturization
17、 have driven the peripheral package design down to 0.3mm (16mil) pitch for QFP 17 the rapidly increasing defect rate associated with miniaturization of peripheral design was recognized very quickly as the bottleneck in further improvements in performance. the assembly defect rate (ppm) of QFP is a s
18、trong function of the pitch size. The defect rate is 25 to 40 ppm for 50mil pitch, and gradually increases to 25 to 100 ppm for 30mil pitch and 40 to 233 ppm (5 sigma control) for 25mil pitch. The defect rate becomes prohibitively high, 100 to 2300 ppm, for 20mil pitch. This high defect rate is primarily associated with the vulnerability of the slim, thin gullwing leads of QFP toward handling. The high precision required for the ultra-ne-pitch component placement as well
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