89c51单片机外文翻译

89c51单机翻

GeneralofChapter1ofareinacommercialsuchasmotor-controlairconditionerautomotiveengineandandperipheralthesemakethemsuitableforHowever,theseapplicationalsothatarereliable.ThehighlowbeaprocessandaproperenvironmentforthemicrocontrollersandatEngineeringdevelopedenvironmentforAT89C51automotiveThegoalsofthisenvironmentwastoprovideaenvironmenttheautomotivemicrocontrollers,toenvironmentbefortheseveralotherfutureTheenvironmentwasdevelopedconjunctionwithMicrosoft(AT89C51).describestheandofitswithenvironmentalandAT89C51.1.1TheAT89C51arehandlecalculationsandfastMCSareusedforapplicationsincludemotor-controlaircontrolTheautomotiveMCSinengine-controlsystems(ABS).AT89C51issuitedtoapplicationsandenhancedon-chipperipheralfunctionsset,suchasautomotivesuspension,braking,stabilitythesecriticalthe

acontrolleralowinterruptlatencytoservicetimeperipheralsneededrealtimeCPUwithaverageasinglepackage.Thefinancialriskhavingthatunpredictablyhigh.Onceparticularlyinmissionapplicationssuchasanoranti-lockbrakingsystem,Redesigncostsrunashigha$500K,muchmoreifthefixannotatingitacrossaproductfamilythatperipheraldesignflaw.Inaddition,asdevicesaresealedinwithavalueseveralthatofToitessentialofatthecomponentsystemworstcaseandThisandnotonlyaprocessbutproperenvironmentandtoolstofacilitateexecutesuccessfully.ChandlerPlatformpostsilicon(SV)ofvariousThesystemvalidationintoTheofdeviceitsapplicationrequirementsdeterminetypesoftestingare1.2AT89C51standardfeatures:4KbytesofFlash,32I/Olines,atwo-levelfulldupleport,oscillatorclockIntheAT89C51iswithstaticdownzerosupportstwosoftwareselectablesavingmodes.TheModestopsCPUwhilethetimer/counters,serialportinterruptfunctioning.ModesavesRAMoscillatordisablingall

pinscanasinputs0alsobeconfiguredtobethemultiplexedlowaddress/databusaccessestoexternaldatamemory.Inthishasinternalpullups.Port0alsoreceivesbytesFlashoutputsthecodebytesduringverification.pullupsarerequiredduringprogramPort：Port1isI/OportwithinternalPortfourTTL1swrittenPortbyinternalusedasinputs.Asinputs,Port1pinsthatareexternallypulledwillsourcecurrent(IIL)becausePortreceiveslow-orderaddressbytesprogrammingandverification.Port：2I/OportwithinternalThePortfourTTL1swrittenPortbyinternalusedasinputs.Asinputs,Port2thatareexternallypulledsource(IIL)becausepullups.PortemitsbyteduringfetchesexternalmemoryduringaccessestoPortpinsareexternallybeingpulledlowwillsourcecurrent(IIL)becauseinternalPort2thehigh-orderbyteduringfetchesprogrammemoryduringaccessestothat16-bitaddressesInapplication,itusesstronginternalwhenemittingaccessesexternalmemoryaddresses(MOVXRI),PortthetheP2SpecialFunctionPortalsoreceivestheandcontrolsignalsduringprogrammingPortPortisan8-bitI/OwithinternalThePortfourTTL1swrittenPortbyinternalusedasinputs.Asinputs,Port3thatexternallybeingpulledsource(IIL)becausepullups.PortofspecialsofttheasRSTResetinput.Ahighonthisfortwocyclestheoscillatorrunning

ALE/PROGAddressLatchoutputpulseforlowaddressaccessestoexternalmemory.isthepulseinput(PROG)duringInnormaloperationALEemittedaconstant1/6oscillatorfrequency,andbeusedtimingorclockinghowever,ALEduringaccesstoexternalDataIfdesired,ALEoperationdisabledbysettingbit0ofSFRlocationWithbitactiveduringaMOVXorMOVCinstruction.Otherwise,ishigh.theALE-disablehasifinPSEN：ProgramStoreEnablestrobeprogramWhenisexternalprogramtwiceeachmachinethattwoPSENactivationseachtoexternaldatamemory.EA/VPPExternalEnable.mustbetoordertodevicefetchexternalprogramlocationsat0000HuptoFFFFH.however,thatifbit1isEAwillbeinternallylatchedreset.EAtoexecutions.Thispinalltheprogramming12-voltXTAL1：InputoscillatorandtotheclockoperatingXTAL2:Outputinvertingamplifier.CharacteristicsXTAL1XTAL2theinputandoutput,aninvertingwhichforuseasanon-chipFigure1.Eitherquartscrystalormaybeused.drivethedeviceanexternalclocksource,XTAL2XTAL1asshowninFigure2.Therearerequirementsonthecycleofthesignal,sincetheinputinternalclockingcircuitryisthroughabutminimummaximumvoltagelowtimespecificationsmustIdleInidleCPUputssleepwhilealltheonperipheralsmodeisinvokedTheon-chipRAMandallspecialregistersremainduringidlemodecanterminatedanyenabledorbyreset.It

benotedthatwhenidleisterminatedbyathedevicenormallyprogramexecution,whereituptomachinecyclesinternalresetalgorithmtakesOn-chipaccesstointernalRAMinthisbutportisnotTopossibilityunexpectedwriteaIdleterminatedbyinstructiontheinvokesIdlebewritesaortomemory.ModeInpower-downmode,oscillatorisinvokesislastTheon-chipRAMRegistersretainuntilthemodeterminated.Theexitpower-downisahardwarereset.ResetSFRbutdoestheon-chipRAM.notitsnormalmustbeenoughtoallowoscillatorAT89C51codememoryarrayprogrammedbyteinprogrammingmode.anynonblanktheon-chipFlashentirememorymustbeerasedusingtheEraseProgrammingthethedatacontrolbesetFlashprogrammingmodeFigure4.ToprogramtheAT89C51,takesteps.1.InputdesiredonInputthe3.correctofsignals.EA/VPP12Vthehigh-voltagemode.ALE/PROGaarrayortheistypically1.5ms.Repeatsteps1throughtheandfortheentirearrayorendofisreached.DataPolling:TheAT89C51Pollingtheofwriteawritecycle,anreadthelastbytewrittenwillinofdatumPO.7.Oncethewritecyclebeentruevalidonallmayafterawritecycle

2.1Ready/Busy:TheprogrammingcanalsobyRDY/BSYoutputhighprogrammingtoindicateBUSY.P3.4ishighagainwhenprogrammingistoindicateProgramVerify:IflockLB2thecodereadbackviadataforverification.Thecannotdirectly.Verificationthebitsisfeaturesare2-1-1

2-2-2Verifying2.2Erase:ThearrayiserasedelectricallybythecombinationofcontrolsignalsandbyALE/PROGlow10ms.codearrayiswrittenall“1Thechiperaseoperationmuthememorycan2.3ReadingtheSignatureBytes:Thesignaturereadsameprocedurenormalverificationoflocations030H,031H,032H,musttoalow.Thevaluesreturnedareas:(030H)=1EHindicatesby(031H)=51Hindicates89C51(032H)=FFHindicates12Vprogramming(032H)=05Hindicates5V2.4ProgrammingInterface

codeinarrayandarraycanbeerasedtheofTheoperationisselftimedandoncewillautomaticallycompletion.Amicrocomputerinterfaceinformationbetweentwoforms.Outsidemicrocomputertheansystemasaphysicalitisnumerically.Theofanyinterfacecanamodifythedatainsomeprocessofbetweenexternalcarriedoutinanumbersteps.Anistovariablesignaltoacorrespondingcantakeoneanumberpossiblebinaryvalues.Iftheoftransducerdoesvarycontinuously,ADCisnecessary.Incasetheconditioningsectiontheincomingaformnextpartofthetheinput/outputsectionmicrocomputerinterfacesasimilarobviousbeingflowinformationistheoppositedirection;itthetheoutsideIncasethecallansupervisestheoperationandnumbersmayneededforconverter.Thissubroutineinformationturnproducesacorrespondingelectricalsignal,couldconvertedintoaisaformsuitablean.microcomputeraresmalltoctlytotheoutsideworld”andsomekindofinterfacemustbeusedtotomoreform.TheofsectionisoftheimportantfacingwishingtoapplyWeseeninmicrocomputersinformationisrepresenteddiscretethisdigitalformmicrocomputerwhichswitchedorwherebitrepresentthestateofaorTosolvereal-worldamorethanCPU,aadatamemory.InmustcontainCPUtoinformationoutsideworld.OncetheCPUgathersinformationthedata,itmustalsobeableto

portionoftheoutsidecalledtheCPU’swindowtheoutside.Themostmicrocontrollersgeneralport.EachofI/Opinscanbeusedaseitherinputoutput.TheofeachdeterminedorcorrespondingacorrespondingdirectionthestageofaEachpinaoralogicCPUinstructionsmayviewedCPUinstructions.ontoallowtheCPUtobit-seriallywithexternalbitformatinsteadbit-parallelI/Operformcommunicationfunction,whichitSerialareperformedeithersynchronouslyorasynchronously.AT89C51的概况1AT89C51应单片机泛应用于商：诸如制解调器，动机控系统，空调制系统，汽发动机和其一些领。这些单片的高速理速度和增型外围备集合得它们适合这种高事件应用场。然而这些关键应领域也求这些片机高度可。健壮测试环境和于验证些无论在元件层次是系统别的单片机合适的具环境保证高可靠和低市场风。Intel平台工部门开发了种面向象的用于验它的AT89C51汽车单片机多性测试环。这种环境目标不是为AT89C51汽车单片提供种健壮试环境，而开发一种能容易扩并重复用来证其他种将来的单机。开的这种境连接了AT89C51本文讨论了这种试环境设计和原理它的和种硬件软件环境部的交互，以及如何用AT89C51

1.1介8位T89C51CHMOS工艺单片被设计用于理高速算和快速输输出。MCS51单片机典的应用是高事件控系统商业应包括调制解器，电机控制系统打印机影印机，空控制系，磁盘驱动和医疗备车工把M单片机用发动机制系悬挂系和反锁动系。AT89C51尤其很好用于得于它的处理度和增型片上外围能集，如：汽动力控制，辆动态挂，反锁制和稳定控制应用。于这些定性应，市场需要种可靠具有低干扰伏响应费用效能控制，服务大量时和事件驱动在实时用需要的集外围的力，具有在一程序中高出均处理功率中央处器。拥有操不可预的设备的经和法律险是很的。一旦进市场，其任务决定应用诸自动驾驶仪反锁制系统，错误是财力所禁止的。新设计费用可以高500K美元，果产品族享同样内核或围设计陷的话，费会更高另外，部件替代品域是极昂贵的，因设备要来把模块典地焊接一个总体的值比各部件高倍。为了缓这些问，在最坏的境和电条件下对这单片机行无论部件级别还系统级上的综合测是必需。IntelChandler平台工程组供了各种单机和处器的系统验。这种统的验证处可以被解为三主要部分。统的类和应用需求定了能在设备上执的测试型。1.2供下准能4k字节FLASH闪速存器，字节内部R，32个/O口线2个16位定/数器，一个5向量两级断结构，个全双串行通信口片内振荡器及钟电路。同，AT89C51降至Hz的静态逻辑操作，支持两可选的节工作模式。闲方式制的工作，允许RAM，定时计数，串行通口及中断系继续工。电方保存RAM中内容，振荡器体制工作并止其他所有见工作到下一个硬复位。

图1-2-1AT89C51方框图1.3脚能明电源电地口：口是一组位漏极开型双向/O口，即地址数据总线复用。作输出口用时每位能收电流的方驱动个TL逻辑门电路对端口写“可作为高抗输入用。在访问部数据储器或程序储器时这组口线时转换地址低8位）和数总线复，在访问期激活内上拉电阻。在lash编程时，P0口接受指令节，而程序验时，出指令字节校验时要求外接上电阻。

口：P1是一个带内上拉电的位双向I/O口P1的出缓冲可驱动吸收或输出流）个TL逻辑门电路对端口写“，通过内的上拉电把端口拉到电平，时可作输入。作为入口使用时因为内存在上电阻，某个脚被外信号拉低时输出一电流（IIL）。编程和程校验期间，P1接受低位地址口：P2是一个带有部上拉阻的8位双向I/O口P2的输出缓级可驱（吸收或输电流）个TL逻辑门电路对端口“”，过内部的上拉阻把端口拉高电平此时可作输口。作输入口使用，因为部存在拉电阻，某引脚被部信号拉低会输出个电流（IIL）。在访问外部程存储器或16位四肢的部数据储器（例如行MOVX@DPTR令）时，口送出8位地址据，在问8位地址的外部据存储（例执行MOVX@RI指令）时P2口线上的内（也即特殊能寄存（SFR）区中R寄存器的容），整个访问期不改变编程和程序校时，P2也接收高位地址和他控制号。口：P3是一个带有部上拉阻的8位双向I/O口P3的输出缓级可驱（吸收或输电流）个逻辑门电路对端口“”，通内部的上拉阻把端口拉高电平此时可作输口。作输入口使用，因为部存在拉电阻，某引脚被部信号拉低会输出个电流IIL）。P3口还接收一用于Flash闪速存器编程程序校验的制信号复位输。当振器工作时，引脚出现两个器周期上高电平将单片机复位·ALE/PROG当访问部程序存储或数据储器，ALE地址锁允许）输脉冲用于锁地址的位字。即使访问外部存器，仍以时钟振频率的1/6输出固定正脉冲信号因此它可对外出时钟用于定时目的要注意是每当访外部数据存器时将过一LE脉冲。对存储器程期间，该脚还用输入编程脉（PROG。如必要，通过特殊功寄存器（SFR）中的8单元D位置，可禁ALE操作。位置位后只有一条MOVX和OVC指令ALE才会被活。此外，引脚会微弱拉，单片机执外部程时，应设置ALE无。程序存允许输出是部程序储器的读选型号，89C51由外部存器取指令（数据），每个机器期两次PSEN有效，即出两个脉冲。此期间，当问外部据存储器，两次有的PSEN信号不出。：外访问允。欲使CPU仅访问外部程存储器地址为0000H），EA端必须保持低电平接地）需注意的是如果加密位B1被编程复位时部会锁存EA端状态如EA端为高电（接Vcc

端），则执行内程序存储器的指令Flash存储器编时，该脚加上+12v的编允许电Vpp，当这必须该器使用12v编程电压V。·XTAL1：振荡器相放大及内时钟发器的输入端XTAL2振荡器相放大器的出端。中有一个于构成内部荡器的增益反相放器引脚XTAL1和XTAL2分是该放器的输入端输出端。个放大器与为反馈件的片外石晶体或瓷谐振器一构成自振荡器振荡电路参图5。接石英体或陶瓷谐器及电C2接在大器的馈回路中构并联振电路。对电C、虽没有十分严格的求，但电容量的大小会微影响荡频率的高、振荡工作的稳定、起振难易程及温度稳定，如果用石英晶体我们推电容使用Pf，而如使陶瓷谐振器议选择。户也可采用外部时。这种况下，部时钟脉冲到XTAL1端，即内部时发生器输入端XTAL2则悬空。·掉电式：在掉电式下，振荡停止工，进入掉电式的指是最后一条执行的指令，片内RAM和特殊功能存器的容在止掉电式前被冻结推出掉电模式唯一方法是件复位复位后将重定义全特殊功能寄器但不变R中的内，在Vcc恢复到正工作电平前复位应效，且必须持一定时以使振荡器启动并定工作。89C51的程序存储阵列是用字节写入方编程的，每写入一字符，要对个芯片EPROM程序存储器写入一个空字节，必使用片除的方法将个存储的内容清楚2编程法编程前设置好地数据及制信号编程单元地址加在1口和P2口的2.0—P2.3（11位地范围为0000H—0FFFH），数据P0口输，引脚P2.6、P2.7和PP3.7的电平设置表6，PSEB为低电平，RST持高电平，EA/Vpp引脚编程电源的入端，要求加上编电压，ALE/PROG引脚输入程脉（负脉）编程时可采用4的时振荡89C51编程方如下：在地线上加要编程单元地址信在数据线上上要写的数据节。激活相的控制号。在高电编程方时，将EA/Vpp端加上+12v编程电压。每Flash存储阵列写入一个节或每入一程序加位，加上一ALE/PROG编程脉冲改变编程单的地址写入的数据重复—步骤，道全部文件程结束每个字节写周期是身定时的，常约为1.5ms数据查询9C51单片机数据查方式来检测个写周是否结束，在一个周期中，如要读取