![同济控制系复试-微机原理课件余有灵_第1页](http://file4.renrendoc.com/view/3db186e71805ecc0e844e4e5c03f89b8/3db186e71805ecc0e844e4e5c03f89b81.gif)
![同济控制系复试-微机原理课件余有灵_第2页](http://file4.renrendoc.com/view/3db186e71805ecc0e844e4e5c03f89b8/3db186e71805ecc0e844e4e5c03f89b82.gif)
![同济控制系复试-微机原理课件余有灵_第3页](http://file4.renrendoc.com/view/3db186e71805ecc0e844e4e5c03f89b8/3db186e71805ecc0e844e4e5c03f89b83.gif)
![同济控制系复试-微机原理课件余有灵_第4页](http://file4.renrendoc.com/view/3db186e71805ecc0e844e4e5c03f89b8/3db186e71805ecc0e844e4e5c03f89b84.gif)
![同济控制系复试-微机原理课件余有灵_第5页](http://file4.renrendoc.com/view/3db186e71805ecc0e844e4e5c03f89b8/3db186e71805ecc0e844e4e5c03f89b85.gif)
版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领
文档简介
Chapter12
InterruptsInstructor:Dr.YuYoulingContentBasicInterruptProcessingHardwareInterruptsExpandingtheInterruptStructure8259AProgrammableInterruptControllerExamples2023/1/17第2页InterruptsInterruptprocessingisanalternativetopolling.TheIntelmicroprocessorssupporthardwareinterruptsthrough:Twopinsthatallowinterruptrequests,INTRandNMIOnepinthatacknowledges,INTA,theinterruptrequestedonINTR.Andsoftwareinterruptsthroughinstructions:INT,INTO,INT3,BOUNDControlisprovidedthroughIFandTFflagbitsIRETandIRETD2023/1/17第3页InterruptVectorTableINTandINT3behaveinasimilarway.INTn:CallsISRlocatedatvectorn(n*4).TheINTinstructionrequirestwobytesofmemory,opcodeplusn.BOUNDandINTOarebothconditional.BOUND: BOUNDAX,DATAparesAXwithDATAAXiscomparedwithDATAandDATA+1,iflessthananinterruptoccurs.AXiscomparedwithDATA+2andDATA+3,ifgreaterthananinterruptoccurs.INTO:Checkstheoverflowflag(OF).IfOF=1,theISRiscalled.IRETremoves6bytesfromthestack,2forIP,2forCSand2forFLAGS.2023/1/17第4页InterruptVectorTableTheinterruptvectortableislocatedinthefirst1024bytesofmemoryataddresses00000Hthrough003FFH.Thereare2564-byteentries(segmentandoffsetinrealmode).2023/1/17第5页RealModeInterruptsAftertheexecutionofeachinstruction,themicroprocessordetermineswhetheraninterruptisactivebychecking,inorder:Single-stepNMICoprocessorsegmentoverrunINTRINTIfoneormoreoftheseconditionsarepresent,then:FLAGSispushedontothestackBoththeinterrupt(IF)andtrap(TF)flagsarecleared,whichdisablestheINTRpinandthetraporsingle-stepfeature.TheCSandIParepushedontothestack.TheinterruptvectorcontentsarefetchedandloadedintoCSandIPandexecutionresumesintheISR.OnIRET,CS,IPandFLAGSarepopped.2023/1/17第6页RealandProtectedModeInterruptsThereturnaddress(CS/IP)ispushedontothestackduringtheinterrupt.Thereturnaddresscanpointto:Thenextinstruction.Theoffending(current)instruction.Thismakesitpossibletotrytheinstructionagain.2023/1/17第7页HardwareInterruptsTheINTRpinmustbeexternallydecodedtoselectavector.Anyvectorispossible,buttheinterruptvectorsbetween20HandFFHareusuallyused(Intelreservesvectorsbetween00Hand1FH).INTAisanoutputofthemicroprocessortosignaltheexternaldecodertoplacetheinterruptnumberondatabusconnectionsD7-D0.TheINTRpinissetbyanexternaldevice(8259A)andclearedintheISR.Theinputisautomaticallydisabledbythemicroprocessoronceitisrecognizedandre-enabledbyIRETorIRETDinstruction.Timingdiagramofthehandshake.2023/1/17第8页HardwareInterruptsSimpliestmethodofgeneratinganinterruptvector:2023/1/17第9页Tri-stateBufferforGeneratingtheInterruptVector2023/1/17第10页Handlingmorethan1IRQIfanyofIRQxgoeslow,theNANDoutputgoeshighrequestinganinterrupt.NotethatifmorethanoneIRQgoeslow,auniqueinterruptvectorisgeneratedandaninterruptpriorityneedstobedefined.TheInterruptVectortablemustbeexpandedtomodatethis.2023/1/17第11页Example2023/1/17第12页2023/1/17第13页Instruction2023/1/17第14页ExternalHardwareInterruptsExternalhardwareinterruptinterfacecircuitry-ResponsiblefordeterminingwhichofanypendinginterruptshashighestpriorityINTR:InterruptrequestLevel-triggered–“1”mustbemaintaineduntilINTA.Mustgobackto“0”beforeserviceroutineisdone.INTA:InterruptacknowledgeTwopulses...theCPUissaying:PULSE1:“Gotit–nowsendthetypenumber”PULSE2:“PlacetheTypenumberondatabus”2023/1/17第15页Read/WriteInterruptVectorTable设置中断向量把由AL指定的中断类型的中断向量DS:DX放置在中断向量表的相应位置中。 AH=25H执行:INT21H AL=中断类型号 DS:DX=中断向量取中断向量把由AL指定的中断类型的中断向量从中断向量表中取到ES:BX中
预置:AH=35H执行:INT21H AL=中断类型号
返回:ES:BX=中断向量2023/1/17第16页ExampleMOVAL,N;typeNInterruptMOVAH,35H;getInterruptvectorINT21H;PUSHES; savetheoldbaseandPUSHBX;offsetofinterruptNPUSHDS;MOVAX,SEGINTHAND;MOVDS,AX;baseofINTHANDinDSMOVDX,OffsetINTHAND;offsetinDXMOVAL,N;MOVAH,25H;SetInterruptVectorINT21H;2023/1/17第17页POPDS;…POPDX; restoretheoldoffsetPOPDS; andbaseofinterruptMOVAL,N;MOVAH,25H;setinterruptvectorINT21H;RET;returnINTHAND:….InterruptProcessingRoutineIRET例:使用DOS功能调用存取中断向量TypicalArchitecture2023/1/17第18页The8259Aadds8vectoredpriorityencodedinterruptstothemicroprocessor.Itcanbeexpandedto64interruptrequestsbyusingonemaster8259Aand8slaveunits.8259AProgrammableInterruptController2023/1/17第19页8259AProgrammableInterruptControllerINTConnectstotheINTRpinonthemicroprocessor.INTAConnectstotheINTApinonthemicroprocessor.A0Selectsdifferentcommandwordsinthe8259A.SP/ENSlaveProgram(1formaster,0forslave)/EnableBuffer(controlsthedatabustransceiverswheninbufferedmode).CAS2-CAS0Usedasoutputsfromthemastertotheslavesincascadedsystems.2023/1/17第20页8259AProgrammableInterruptControllerAsingle8259Aconnectedinthe8086.2023/1/17第21页Programmingthe8259AProgrammedbyInitialization(ICWs)andOperation(OCWs)CommandWords.Thereare4ICWs.Atpower-up,ICW1,ICW2andICW4mustbesent.IfICW1indicatescascademode,thenICW3mustalsobesent.ICW1:LTIMindicatesifIRQlinesarepositiveedge-triggeredorlevel-triggered.2023/1/17第22页ICW2:ThesebitsdeterminethevectornumbersusedwiththeIRQinputs.Forexample,ifprogrammedtogeneratevectors08H-0FH,08Hisplacedintothesebitpositions.ICW3:Programmingthe8259A2023/1/17第23页Programmingthe8259AICW4:Fullynestedmodeallowsthehighest-priorityinterruptrequestfromaslavetoberecognizedbythemasterwhileitisprocessinganotherinterruptfromaslave.AEOI,if1,indicatesthataninterruptautomaticallyresetstheinterruptrequestbit,otherwiseOCW2isconsultedforEOIprocessing.2023/1/17第24页InitializationFlow2023/1/17第25页Programmingthe8259ATheOperationCommandWords(OCWs)areusedtodirecttheoperationofthe8259A.OCW1:OCW1isusedtoreadorsettheinterruptmaskregister.Ifabitisset,itwillturnoff(mask)thecorrespondinginterruptinput.OCW2:OnlyprogrammedwhentheAEOImodeinICW4is0.Allowsyoutocontrolprioritiesaftereachinterruptisprocessed.2023/1/17第26页Programmingthe8259AOCW2Non-specificEOI:Here,theISRsetsthisbittoindicateEOI.The8259Aautomaticallydetermineswhichinterruptwasactiveandre-enablesitandlowerpriorityinterrupts.SpecificEOI:ISRresetsaspecificinterruptrequestgivenbyL2-L0.Rotatecommandscauseprioritytoberotatedw.r.t.thecurrentonebeingprocessed.Setpriority:allowsthesettingofthelowestpriorityinterrupt(L2-L0).2023/1/17第27页Programmingthe8259AOCW3Ifpollingisset,thenextreadoperationwillreadthepollword.Iftheleftmostbitissetinthepollword,therightmost3bitsindicatetheactiveinterruptrequestwithhighestpriority.AllowsISRtoservicehighestpriorityinterrupt.Therearethreestatusregisters,InterruptRequestRegister(IRR),In-ServiceRegister(ISR)andInterruptMaskRegister(IMR).IRR:Indicateswhichinterruptrequestlinesareactive.ISR:Leveloftheinterruptbeingserviced.IMR:Amaskthatindicateswhichinterruptsareon/off.2023/1/1
温馨提示
- 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
- 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
- 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
- 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
- 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
- 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
- 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。
最新文档
- 构建高效生产线的质量保障体系
- 社交平台在促进消费中的作用
- 基本公共卫生个人工作计划
- 知识产权在互联网时代的重要性及挑战
- 现代都市人居心理学在单身公寓设计中的应用
- 高低压配电系统维保合同范本
- 装饰装修材料采购合同范本
- 磁性材料市场发展趋势及其在智能交通的潜力
- 校校战略合作协议书范本
- 电动化趋势下的汽车产业变革与挑战
- GB∕T 9286-2021 色漆和清漆 划格试验
- DB33T 1233-2021 基坑工程地下连续墙技术规程
- 天津 建设工程委托监理合同(示范文本)
- 广东中小学教师职称评审申报表初稿样表
- 部编一年级语文下册教材分析
- 火炬及火炬气回收系统操作手册
- 北师大七年级数学下册教学工作计划及教学进表
- 菜肴成本核算(课堂PPT)
- 光纤通信原理课件 精品课课件 讲义(全套)
- 第二课堂美术教案
- 化工投料试车方案(一)
评论
0/150
提交评论