dsp原理ADC模数转换及应用

1、ADC模数转换原理及应用（1）一、逐次逼近A/D转换器功能 模拟量 数字；几个概念：基准电压、输入范围、A/D转换器位数转换时间、转换结果（范围内、范围外）、启动转换6 - 1ADC模数转换原理及应用（2）二、采样保持器保持：解决A/D转换器转 换时间问题。采样：跟踪输入信号，问题是合上开关多长时间才能与输入信号一致？三、多路开关有多个量要解决时，节约 硬件成本6 - 22812的ADC模数转换器（3）ADC模块位置；ADC模块模拟电路的电源；1、可把整个模块模拟电源关闭；（off）2、可以利用外部参考电源；3、也可以自产参考电源，并输出自产电源；4、由加电顺序决定用哪个电源；6 - 3C28

2、1x Block Diagram32x32 bitMultiplier32x32 bit MultiplierSectoredFlashSectored FlashA(18-0)D(15-0)Program BusData BusRAMRAMBootROMBootROM32-bitAuxiliary Registers32-bit Auxiliary Registers332 bit Timers332 bitTimersRealtimeJTAGRealtime JTAGRegister BusCPUR-M-WAtomic ALUR-M-WAtomic ALUPIEInterruptManag

3、er32322232Event Manager AEventManager AEvent Manager BEventManager B12-bit ADC12-bit ADCWatchdogWatchdogMcBSPMcBSPCAN2.0BCAN2.0BSCI-ASCI-ASCI-BSCI-BSPISPIGPIOGPIO6 - 4ADC Control Register 3ADCTRL3 0 x007118Sampling Mode Select0 = sequential sampling mode1 = simultaneous sampling modeADC Clock Presca

4、leADCCLKPS3ADCCLKPS2ADCCLKPS1ADCCLKPS0SMODE_SEL4201375615 - 8reservedADCRFDNADCBGNDADCPWDNADC Reference Power Down0 = powered down1 = powered upADC Bandgap Power Down0 = powered down1 = powered upADC Power Down (except Bandgap & Ref.)0 = powered down1 = powered up6 - 52812的ADC模数转换器（4）模数转换器时钟：ADC模块的时

5、钟有多个分频 因子; ；1、HSPCLK形成，允许输出到ADC2、经ADCTRL3形成FCLK，（ 4;Example: read RESULT0 register#include DSP281x_Device.hvoid main(void)Uint16 value;/ unsignedvalue = AdcRegs.ADCRESULT0 4;6 - 122812的ADC模数转换器（6）两个8选一多路开关，可接16路模拟量；两个采样保持器，可同时或顺序采样；1、如果不计算两个模拟量的关联，则用顺序采样。2、有时计算有关联的量，如:R=U/I，需要同时采样。因此在硬件安排上，考虑UI分开。3、

6、不可能实现2个以上的同时采样。6 - 1312-bit A/D ConverterResult SelectResult MUXRESULT0. . .RESULT1RESULT2RESULT15CHSEL00 (state 0)CHSEL01 (state 1)CHSEL02 (state 2)CHSEL03 (state 3).CHSEL15 (state 15)MAX_CONV1Start Sequence TriggerSOCEOCAuto sequencerSoftwareEVA EVBExt Pin (ADCSOC)ADC Module Block Diagram (Cascade

7、d Mode) Analog MUXMUX AADCINA0 ADCINA1ADCINA7.MUX BADCINB0 ADCINB1ADCINB7.S/HAS/HMUXS/HB6 - 142812的ADC模数转换器（7）可以设置转换16路通道的转换顺序，甚至一 个通道转换多次；可以设置两个独立的转换序列（每个不超过8通道），也可以是一个转换序列（不超过16通道）。16个转换结果寄存器。多种启动方式。.6 - 15ADC Input Channel Select Sequencing Control RegisterBits 15-12Bits 11-8Bits 7-4Bits 3-00 x00

8、71030 x0071040 x0071050 x007106CONV03CONV02CONV01CONV00CONV07CONV06CONV05CONV04CONV11CONV10CONV09CONV08CONV15CONV14CONV13CONV12ADCCHSELSEQ1ADCCHSELSEQ2 ADCCHSELSEQ3 ADCCHSELSEQ46 - 16ADC Module Block Diagram (Dual-Sequencer mode)12-bit A/D ConverterSoftwareEVAExt Pin(ADCSOC)Result SelectResult MUXRE

9、SULT0. . .RESULT1RESULT7Result SelectRESULT8. . .RESULT9RESULT15CHSEL00 (state 0)CHSEL01 (state 1)CHSEL02 (state 2).CHSEL07 (state 7)MAX_CONV1Auto sequencerStart Sequence TriggerSOC1/ EOC1SEQ1CHSEL08 (state 8)CHSEL09 (state 9)CHSEL10 (state 10).CHSEL15 (state 15)MAX_CONV2Auto sequencerStart Sequence

10、TriggerSEQ2Sequencer ArbiterSOC2/ EOC2Software EVBAnalog MUXMUX AADCINA0 ADCINA1ADCINA7.MUX BADCINB0 ADCINB1ADCINB7.S/HAS/HMUXS/HB6 - 17ADC Control Register 2 - Upper ByteADCTRL2 0 x007101151413121089EVB_SOC_SEQRST_SEQ1Interrupt Enable (SEQ1)0 = interrupt disable1 = interrupt enableEVB SOC(cascaded

11、mode only)0 = no actionsignal11Reset SEQ10 = no action1 = immediate reset SEQ1 to “initial state”1 = start by EVBStart Conversion (SEQ1)0 = clear pending SOC trigger1 = software trigger-start SEQ1EVA SOCSEQ1 Mask Bit0 = cannot be started by EVA trigger1 = can be started by EVA triggerINT_ENA_ SEQ1IN

12、T_MOD_SEQ1reservedEVA_SOC_ SEQ1SOC_SEQ1reservedInterrupt Mode (SEQ1)0 = interrupt every EOS1 = interrupt every other EOS6 - 18ADC Control Register 2 - Lower ByteADCTRL2 0 x00710176201EXT_SOC_SEQ1RST_SEQ2External SOC (SEQ1)0 = no action1 = start by signal from ADCSOC pinReset SEQ20 = no action1 = imm

13、ediate reset SEQ2 to “initial state”Start Conversion (SEQ2)(dual-sequencer mode only)0 = clear pending SOC trigger1 = software trigger-start SEQ2543EVB SOCSEQ2 Mask bit0 = cannot be started by EVB trigger1 = can be started by EVB triggerINT_ENA_ SEQ2INT_MOD_SEQ2reservedEVB_SOC_ SEQ2SOC_SEQ2reservedI

14、nterrupt Enable (SEQ2)0 = interrupt disable1 = interrupt enableInterrupt Mode (SEQ2)0 = interrupt every EOS1 = interrupt every other EOS6 - 19Example - Sequencer “Start/Stop” OperationI1, I2, I3V1, V2, V3I1, I2, I3V1, V2, V3EVATimer 1EVA PWMSystem Requirements:Three auto conversions (I1, I2, I3) off

15、 trigger 1 (Timer underflow)Three auto conversions (V1, V2, V3) off trigger 2 (Timer period)Event Manager A (EVA) and SEQ1 are used for this example with sequential sampling mode6 - 202812的ADC模数转换器（8）转换序列（次序）设置：可以设置为一列，也可为两列；如果为一列，转换次数可以在MAX_CONV1寄存 器中设置，最大次数为16次；每次转换的结果放在对应的结果寄存器中；转换开始有2种模式：连续与启停方式

16、 启停：一个序列完成就停止；连续：一个序列完成继续转换。6 - 21Maximum Conversion Channels RegisterADCMAXCONV 0 x007102reservedMAX_ CONV 2_2MAX_ CONV 2_1MAX_ CONV 2_0MAX_ CONV 1_3MAX_ CONV 1_2MAX_ CONV 1_1MAX_ CONV 1_0Dual ModeSEQ2SEQ1Bit fields define the maximum number of auto conversions (binary+1)Cascaded ModeAuto conversio

17、n session always starts with the “initial state” and continues sequentially until the “end state”, if allowedSEQ1SEQ2CascadedInitial stateEnd stateCONV00CONV07CONV08CONV15CONV00CONV156 - 22Example - Sequencer “Start/Stop” Operation15-1211-87-43-0Bits 0 x0071030 x007104V1I3I2I1xxV3V2ADCCHSELSEQ1 ADCC

18、HSELSEQ2(Continued)MAX_CONV1 is set to 2 and Channel Select Sequencing Control Registers are set to:Once reset and initialized, SEQ1 waits for a triggerFirst trigger three conversions performed: CONV00 (I1), CONV01 (I2), CONV02 (I3)MAX_CONV1 value is reset to 2 (unless changed by software)SEQ1 waits

19、 for second triggerSecond trigger three conversions performed: CONV03 (V1), CONV04 (V2), CONV05 (V3)End of second auto conversion session, ADC Results registers have the following values:RESULT0I1RESULT3V1RESULT1I2RESULT4V2RESULT2I3RESULT5V3 User can reset SEQ1 by software to state CONV00 and repeat

20、 same trigger 1, 2 sessionSEQ1 keeps “waiting” at current state for another trigger6 - 232812的ADC模数转换器（9）启停方式：一旦启动，则开始一个序列的转换，转换了 MAX_CONV1次后停止；再来一个启动，从MAX_CONV1+1开始。对排序器复位才能从初始通道开始；连续运行方式：超越位才起作用，可以重新从初始通道开始6 - 242812的ADC模数转换器（10）ADC模块中的PF；end6 - 2566- 26Analog-to-Digital Converter RegistersADCTRL1ADCTRL20 x0071000 x007101ADC Control Register 1 ADC Control Register 2ADCMAXCONV0 x007102 ADCCHSELSEQ1 0 x007103ADCCHSELSEQ2 0 x007104ADCCHSELSEQ3 0 x007105ADCCHSELSEQ4 0 x007106 ADCASE