aps有效文件单片机-english

1、微处理器（sor、微型计算机puter、单片机（Single-A sor incorporates(表现为) the functions of a computers central unit (CPU)onaegratedcircuit,1(IC)oratmostafew egratedcircuits(集成电路作为 器（RAM、ROM和EPROM等Aputer is a computer微处理器（sor、微型计算机puter、单片机（Single-A sor incorporates(表现为) the functions of a computers central unit (CPU)o

2、naegratedcircuit,1(IC)oratmostafew egratedcircuits(集成电路作为 器（RAM、ROM和EPROM等Aputer is a computer sor as its central sing unit. includes sor, memory, and input/output (I/O). They are physically small . keyboardandscreenfor input and output)are alcomputers 块Amicrocontroller(sometimes abbreviated（缩写）CuCo

3、rMCU) is asmall computer on circuitaprogrammableinput/output器件）. Program he form of flashorOTP ROMis also often included on chip, as well as a typically small amount of thesorsusedalcomputersorothergenerale , ALU 。Inanunita tperformsarithmeticandlogicaloperations. TheALUisafundamental（基本的）building o

4、f the central sing unit of a computer, and even the simplest sors one for ech as ma aining timers. The sors found inside modern CPUs graphics（图解计算）singunitsmodate（适应）erfulandcomplexALUs;asinglecomponentmaycontainanumberof Incomputing and lly in computer hardware, controller isachip, ancard, a stand-

5、alone （独）device (usually called a control Incomputing and lly in computer hardware, controller isachip, ancard, a stand-alone （独）device (usually called a control tripheraldevice.Thismaybealinkntwopartsofacomputer(for leatmanagesstomemoryforthecomputeroracontrolleronanexternal （部tmanagestheoperationo

6、f(andconnectiont bus累加器（A）accumulator：运算前用于保存操作数，运算后用于保存结果。anaccumulatorisaregister inermediatearithmeticandlogicresultsare TheMemory Data Register (MDR) istheregister ofa computerst containsdata to be stored in the computer storage (e.g. RAM), or the data after a fetch from computer storage. It act

7、s like a buffer(缓存区) and holds t is copied from memoryreadyforthe sortouse（ID：IRIncomputing, aninstruction register (IR) is the part of aCPUs instructioncurrentlybeingexecutedort stores The program counter (PC)is a computerisinitsinstructionsor t indicates where TheMemory Address Register (MAR)is aC

8、PUt either stores the address from which data will befetched to the CPU or the address to which data will be and 器还接收CPU的控制信号，以确定执行读/Connect puter with the 8 bit address bus and 8 bit data bus, address bus groupofeightdata 器还接收CPU的控制信号，以确定执行读/Connect puter with the 8 bit address bus and 8 bit data b

9、us, address bus groupofeightdata CPU to the memory address decoder, todetermineselected unit. The storage receives CPU signals determinetheread/write Theconnectionofexternal andsormust go througherface adapter(I erface),eachI/erface and the corresponding external device has a fixed （Binarymlc计算机中常用编

10、码：BCD（BinaryCodedDecimal）ASCII（American StandardCodeMachinenumber:thecomputerexpressed numbersinTrue value: the value represented by the number of machines The absolute value ofthe ode+theabsolutevalueoftheoriginalcode=Theabsolute value of the absolute value of the negativecomplement, -1 = negative

11、the Overflow: refers to the result of the operation number of symbols of beyond the -128-range,anddestroyedthesign l Function Register，用以存放可以读 Two l Function Register，用以存放可以读 Two 16-bit timer / counters, each of which can be set for the count to count events,sobesetfortimingcontrolcomputer,andaccord

12、ingtothecountor 一个全双工 full UART（ 通用异步接收发送器 Universal 行通信(UsedtoimplementserialcommunicationandPC.)nthemicrocontrollerorOn-cillator and clock generation circuit, but the need for external quartz 来选择的省电方式空闲方式（Idle Mode）和掉电方式Mode15%；掉电方式中，片内振荡器停止工作，一切工作暂停，只保存片内 RAM 中的内容，直到下一次硬件复位为止，此时电流降至Compared with

13、8051, er-saving work, leisure er-down Operating frequency can be reduced to 0Hz, wo software saving- idlemode(IdleMode)er-downmodeerDown,theMode),theMode stops the CPU, RAM, timer / counters, serial line port errupt system continueworking,thecurrent can bereducedto 15% oferdown mode, on-cillator to

14、stop working, all work spended, only to save the contents theon-chip RAM, untilthe rdware reset.Thecurrent dropsbelow15 sminimumto0.6. WhenmultipleMCUtocompeteusingtheexternalbus,youcancontrolthebus 11. 89C51的CPU运算器：包括 ALU，8 位暂存器 1. WhenmultipleMCUtocompeteusingtheexternalbus,youcancontrolthebus 11.

15、 89C51的CPU运算器：包括 ALU，8 位暂存器 1（TMP1）temporary)、暂存器 2（TMP2，8ACCB 和程序状态寄存器PSW Program ACCisoften used asanoperand操作数)by othe ALUinputoperator theotherfromtheTMP1theoperandsconducted,theresultssentbacktotheThePSWisusedtoindicatetheusinformationoftheinstruction Bregistermultiply,andperationswhenusedtosto

16、reoperands,alsousedstorepartoftheresultsofheabsenceofoperation,canbeusedgeneral-eregisters.ThereisabitaccumulatorCforhandlingbit 。The program counter by two 8-bit CH and PCL, a total of 16, save addressofthenextinstructiontobeexecuted.Oscillatorandtimingcircuitsneedexternal quartz crystal and freque

17、ncy tuning capacitor, the frequency of 0-24MHz, basic beat ofthe pulse signal as the 89C51, the smallesttime unit.12. 单片机引脚结构图（图示2. XTAL1（19 脚）XTAL2（18 脚。XTAL2 crystalpinsis(19feet)andare (18feet). XTAL2 pick end ofthe external crystal fine-tuning capacitor, the output of ernal circuitXTAL1 isconnec

18、tedtothe otherside,theinputofernaloscillation circuitfrequencyisthenatural frequencyofthecrystal,tochecktheoscillationcircuitis working properly,canbeusedoscilloscopeviewXTAL2whetherthec ntisapulseoutput.Ifanexternalclock, XTAL2 should be left unconnected, XTAL1 is RST、ALE、PSEN/EA/。RSTcircuitfrequen

19、cyisthenatural frequencyofthecrystal,tochecktheoscillationcircuitis working properly,canbeusedoscilloscopeviewXTAL2whetherthec ntisapulseoutput.Ifanexternalclock, XTAL2 should be left unconnected, XTAL1 is RST、ALE、PSEN/EA/。RST（9 脚完成复位。ALE（Address latch enable，30 脚）89C51正常工作时，ALE 好坏。器29 脚） 89C51 Cont

20、rol signal pins, RST, ALE, PSEN / and EA / RST (9 feet): to ma ain two machine cycles high to complete reset. ALE (Address the latch the enable, 30 feet) 89C51 properly,theALEitivepulse signal,afrequency of 1/6ofthe oscillatorfrequency,candetermine thechipis good or bad.CPUto soff-chip memory,the AL

21、Esignal as a latched low eight address control signal. PSEN (ProgramStore Enable, memory,29feet)to memoryinstruction basis of the chipmemory address allow the output terminal, when the89C51 chip fetch machine cycle output two pulses work. EA (Enable Address, 31 feet) onlytoallowtheinput,thenthehighc

22、sFlashROM,thenthelowstoexternalInput / output portsP0-P3.Quasi-t isusedastheinput, you shouldwriteaport multiplexing 13. 64KB ROM 64KBROM1000H- FH，片内外 编址。RAM 用于存放运算的中间结果、数据暂存和缓冲、标志位等，片内 256 字节，地址从 0000H-00FFH，片外从 0100H- FH128RAM RAM32字节（00-1F）为thechipcanbeexpandedupto64KBROM,theFH,ece inside and the

23、unifiedaddressing.RAMusedtostore ermediateresultsofoperationsfortemporarystorage and buffering flag, on-chip256-byte address from 0000H-00FFH, off-chip FH.Thelower128bytesofon-chipRAMisreallytheRAMarea,ofwhichthereare89C51 64KB ROM and data memory for the memory: program memory, 64KB of RAM.ROM storing programmed procedures and table data, on-chip Flash ROM 4KBad