硬件及接口类_3接口microblaze介绍04-peripherals

1、Introduction to MicroBlaze PeripheralsAfter completing this module, you will be able to:ObjectivesSpecify the free MicroBlaze peripherals and their functionSpecify the function of the MPD, PAO and BBD FilesDescribe the differences between EDIF and HDL flowsDescribe attributes and how they affect imp

2、lementationExplain the concept of drivers and the MDD fileOutlineMicroBlaze PeripheralsPeripheral DefinitionCommon LibrariesSummaryWhat is a MicroBlaze Peripheral?A piece of hardware that connects to a bus to provide extra functionality to the systemUARTEthernetArbiterInterrupt controllerMemory cont

3、rollerGPIOUARTGPIOMemory ControllerEthernetInterrupt ControllerArbiterMicroBlaze PeripheralsSome peripherals that come with the EDK:ArbiterBlock RAM ControllerGeneral Purpose I/OInterrupt ControllerIPIFJTAG UARTMemory Controller (EMC)SPI ControllerWatchdog TimerTimerUART LiteZBT ControllerThe Xilinx

4、 Embedded Processor IP Handbook gives full descriptions of each peripheral and how to use it.MicroBlaze PeripheralsArbiterUsed in Multiple-Master OPB systemsControls access to the OPBDetects OPB bus timeouts and resolves themILMBILMBArbiterDOPBOPBMasterMicroBlazeJTAG UARTUART LiteGPIORS-232IEEE 1149

5、.1LMBBramDLMBEMCINTCExternal RamIOPBI/OSample SystemMicroBlaze PeripheralsUART Lite / JTAG UARTUsed as in input / output deviceCommunicates by RS-232 or JTAGCan be a standard I/O (STDIO) or debug deviceILMBILMBArbiterDOPBOPBMasterMicroBlazeJTAG UARTUART LiteGPIORS-232IEEE 1149.1LMBBramDLMBEMCINTCExt

6、ernal RamIOPBI/OSample SystemMicroBlaze PeripheralsGPIOUsed as a general-purpose input / output peripheralConfigurable widthILMBILMBArbiterDOPBOPBMasterMicroBlazeJTAG UARTUART LiteGPIORS-232IEEE 1149.1LMBBramDLMBEMCINTCExternal RamIOPBI/OSample SystemMicroBlaze PeripheralsInterrupt ControllerExpands

7、 the number ofinterrupts MicroBlaze soft processor can handleLevel / edge sensitiveUp to 32 interruptsILMBILMBArbiterDOPBOPBMasterMicroBlazeJTAG UARTUART LiteGPIORS-232IEEE 1149.1LMBBramDLMBEMCINTCExternal RamIOPBI/OSample SystemMicroBlaze PeripheralsExternal Memory ControllerInterfaces to external

8、Flash / SRAMUp to 8 memory banksAddress mapableILMBILMBArbiterDOPBOPBMasterMicroBlazeJTAG UARTUART LiteGPIORS-232IEEE 1149.1LMBBramDLMBEMCINTCExternal RamIOPBI/OSample SystemOutlineMicroBlaze PeripheralsPeripheral DefinitionCommon LibrariesSummaryPeripheral DefinitionA peripheral consists of:Bus con

9、nectionsSettingsCustom I/OSource codeDriversE.g., GPIOOPB BusI/O WidthUser I/O PinsVHDLread / writeE.g., UART LiteOPB BusBaud rateTX/RXVHDLOutbyte / inbytePeripheral specifications are defined in System Interface Format - This consists of files to specify the peripheral, dependencies, drivers, and f

10、unctionalityPeripheral DefinitionA peripheral can be included in a system as:HDL E.g., GPIO peripheralEDIF netlist A mixture of the HDL and EDIFAll flows have a MicroProcessor Peripheral Definition (.mpd), to describe bus / I/O connectivityHDL peripherals have a Peripheral Analyze Order (.pao) file

11、to specify the HDL to synthesize, and in what orderEDIF has a Black Box Definition file (.bbd) to specify which netlist to use for a given configurationA mixed HDL / EDIF peripheral contains both .pao and .bbd filesPeripheral SIF File Structure.vhd.vhd.vhd/my_peripheral/data/hdl/netlist/simmodels.mp

12、d.pao.bbd.vhd.vhd.vhd.vhd.edn.vhd.vhd.vhd.vhd/my_peripheral/Drivers/Processor/IP2Peripheral DefinitionAll installed peripherals are under the Xilinx_EDK DirectoryAll have an .mpd file in the data directoryMost have VHDL, in the HDL directory, but this is often encrypted IPSome have EDIFPeripheral De

13、finition - .mpdThe MicroProcessor Peripheral Definition file defines the interface of a systemPorts and default connectivity for bus interfacesParameters and default valuesAny parameters and default values can be overwritten by the MicroProcessor Hardware Specification file, which defines the system

14、Peripheral Definition - .mpdSELECT slave opb_gpio, EDIF=TRUE# Generics for vhdl or parameters for verilogCSET attribute C_BASEADDR = 0 x20000000, std_logic_vectorCSET attribute C_HIGHADDR = 0 x200000FF, std_logic_vectorCSET attribute C_OPB_DWIDTH = 32, integerCSET attribute C_OPB_AWIDTH = 32, intege

15、r CSET attribute C_GPIO_WIDTH = 32, integer CSET attribute C_ALL_INPUTS = 0, integer CSET bus_interface BUS=SOPB, BUS_STD=OPB, BUS_TYPE=SLAVE# Global portsCSET signal OPB_Clk = OPB_Clk, in, ISCLOCK=TRUECSET signal OPB_Rst = OPB_Rst, in# OPB signalsCSET signal OPB_ABus = OPB_ABus, in, 0:C_OPB_AWIDTH-

16、1, BUS=SOPBCSET signal OPB_BE = OPB_BE, in, 0:C_OPB_DWIDTH/8-1, BUS=SOPBCSET signal OPB_DBus = OPB_DBus, in, 0:C_OPB_DWIDTH-1, BUS=SOPBCSET signal OPB_RNW = OPB_RNW, in, BUS=SOPBCSET signal OPB_select = OPB_select, in, BUS=SOPBCSET signal OPB_seqAddr = OPB_seqAddr, in, BUS=SOPBCSET signal GPIO_errAc

17、k = Sl_errAck, out, BUS=SOPBCSET signal GPIO_retry = Sl_retry, out, BUS=SOPBCSET signal GPIO_toutSup = Sl_toutSup, out, BUS=SOPBCSET signal GPIO_xferAck = Sl_xferAck, out, BUS=SOPB# gpio signalsCSET signal GPIO_IO = , inout, 0:C_GPIO_WIDTH-1, ENABLE=MULTIENDAttributesBus AddressRangeSignalsNo defaul

18、t signal nameDefault signal namePeripheral TypeCommon .mpd CommandsSelectSpecifies peripheral type, name, and configurationCset AttributesHDL Flow - Get passed into the HDL as generic parametersEDIF Flow - Can be used in the .bbd as a lookup table parameterCset SignalsSpecifies the signals (in, out,

19、 bidirectional) that connect to the peripheralSELECT slave opb_gpio, EDIF=TRUECSET attribute C_BASEADDR = 0 x20000000, std_logic_vectorCSET signal OPB_ABus = OPB_ABus, in, 0:C_OPB_AWIDTH-1, BUS=SOPBPeripherals The .pao FileThe Peripheral Analyse Order file contains a list of HDL files that are neede

20、d for synthesisAdditionally, it defines the analyze order for compilation lib common_v1_00_a common_types_pkglib common_v1_00_a pselectlib opb_gpio_v1_00_a gpio_corelib opb_gpio_v1_00_a opb_gpioLibrary NameHdl File to includeCommon FunctionsSupplied with MDKUsers HDL files in Analyze orderPeripheral

21、s The .bbd FileThe Black Box Definition file manages the file locations of optimized hardware netlists for black-box peripheralsIt is a look-up table that lists netlist filesC_FAMILY CONFIGURATION Files#virtex1virtex/my_ip_1.edfvirtex2virtex/my_ip_2.edfvirtex3virtex/my_ip_3.edfvirtex4virtex/my_ip_4.

22、edfvirtex5virtex/my_ip_5.edfvirtex6virtex/my_ip_6.edfspartan21spartan2/my_ip_1.edfspartan22spartan2/my_ip_2.edfspartan23spartan2/my_ip_3.edfspartan24spartan2/my_ip_4.edfspartan25spartan2/my_ip_5.edfspartan26spartan2/my_ip_6.edfLookup TableHeaderComparison FieldsConfiguration NetlistsLookup TablePeri

23、pherals Defining the DriversThe MicroProcessor Driver Definition file contains directives for customising software driversUsed by the Library Generator (Libgen) to customize the driver depending on different options in the software specificationOnly really of interest when generating custom peripher

24、alsPeripherals Defining the DriversBEGIN driver XUartLiteconstant VERSION = 2.0.0 # uses SIF 2.0.0parameter LEVEL = 0 # default levelENDBEGIN level 0constant INBYTE = XUartLite_RecvByte, DEFINED_IN = xuartlite_lconstant OUTBYTE = XUartLite_SendByte, DEFINED_IN = xuartlite_lconstant COPYFILES = (xuar

25、tlite_l.c xuartlite_l.h Makefile)constant DEPENDS = (common_v1_00_a)constant CONFIG_INCLUDE = xparameters, VALUES = ( NUM_INSTANCES C_BASEADDR )parameter INT_HANDLER = XIntc_DefaultHandler, INT_PORT = InterruptENDBEGIN level 1constant COPYFILES = ALLconstant DEPENDS = (common_v1_00_a)constant CONFIG

26、_INCLUDE = xparameters, VALUES = ( NUM_INSTANCES C_BASEADDR DEVICE_ID )constant CONFIG_FILE = xuartlite_g, VALUES = ( DEVICE_ID C_BASEADDR )parameter INT_HANDLER = XUartLite_InterruptHandler, INT_PORT = InterruptENDLevel 1 -OS-levelDriversSTDIO DriversC files to copy into system projectDriver Depend

27、enciesPreprocessor configurationsInterrupt service rouineFull details of the .mdd file format can be found in the Embedded System Tools GuideOutlineMicroBlaze PeripheralsPeripheral DefinitionCommon LibrariesSummaryCommon LibrariesThe EDK includes some useful VHDL librariesOptimized functionalityComm

28、on MicroProcessor functionsMultiplexers - (Mux_encode_sel, Mux_onehot)Gates - (or_bits, or_gate)Address Decoders - (pselect , pselect_top)Common LibrariesPselect.vhd - Parameterizable Peripheral Select (Address Decoder) generic ( C_AB : integer := 9; C_AW : integer := 32; C_BAR : std_logic_vector(0

29、to 31) := X33000000 ); port ( A : in std_logic_vector(0 to C_AW-1); AValid : in std_logic; PS : out std_logic );end entity pselect;Example Pselect implementation for decoding the address range 0 xFFFF8000 to 0 xFFFF803FC_AB = number of address bits to decodeC_AW = width of address busC_BAR = base ad

30、dress of peripheralOptimized for XilinxArchitectures (MuxCY)OutlineMicroBlaze PeripheralsPeripheral DefinitionCommon LibrariesSummarySkills CheckReview QuestionsThe JTAG UART and UART Lite can perform two functions. What are they?Which configuration file is required for all peripherals?What extra fi

31、le is required for HDL flows ? for EDIF flows?Using the .BBD slide, which netlist is selected if the .mhs file has :C_FAMILY=Virtex Configuration=3?What is the purpose of Pselect?AnswersThe JTAG UART and UART Lite can perform two functions. What are they?It can run as a STDIO (Standard I/O Periphera

32、l) and also as a debug peripheralWhich configuration file is required for all peripherals?Every peripheral has a Microprocessor Peripheral Definition (.mpd) file. This specifies the ports and attributes that can be set for the peripheral along with default signal assignmentsWhat extra file is required for HDL flows? A Peripheral Analyze Order (.pao) file. This spe