外文翻译晶闸管投切电容器控制系统的设计..

1、学生毕业设计（论文）外文译文学生姓名：学号：专业名称：译文标题（中英文）：晶闸管投切电容器控制系统的设计Desig n of the Con trol System for Thyristor Switched Cap acitor Devices译文出处：Proceedi ngs of the IEEE Po wer Engin eeri ng Society Tran smissi onand Distribution Conference, v 2, Blazing Trails in Energy Delivery and Services, 2003, p 606-610指导教师审阅

2、签名：外文译文正文:晶闸管投切电容器控制系统的设计本文为晶闸管投切电容器在 6KV-10KV中低压配电系统中的应用，该系统能在投入时刻避免冲击电流并且在电流过零时立即断开。本文首先对电容器的投切瞬间进行了分析，对中压系统TSC电压测试进行了介绍。TSC构造简单，实践证明电压过零检测方法是非常可靠、准确的。其投切补偿后的性能优越。.TSC装置介绍分流电容器在中高压电力传输网络中是很重要的无功补偿电源，晶闸管投切电容器利用投切电容器组来实现电压调节和无功功率平衡，因此能提高系统容量、减少电网网络损耗、提高电压质量、产生无功功率，来避免电压崩溃和提高系统的稳定极限。晶闸管自动投切电容器在改善电能传输

3、和配送的经济可靠方面是十分经济实用的。本文TSC装置的电压应用范围为6到35KV，它能够灵活自如的控制补偿容量，在电流过零时切除，并且避免投入时过电流的产生。TSC在投切时刻过电流和过电压的产生方面比传统的机械投切有无比优越性。理想情况下，电容器投切时刻的初始电流为零，这样可以保证电容器平稳的投入。从理论上讲。单相电容器投切的最大时间为电源周期的一半，这样可以确保无冲击电流的产生。一个重要的技术问题就是怎样避免晶闸管投切电容器在投切时刻过电压和电流的产生。.TSC投切时刻条件这是一个由双向晶闸管控制的单相 TSC装置图形。如图1所示。图1单相TSC装置示意图此装置的数学表示为rl iu =Um

4、Sin(wt +*) = L +4 fidt dt初始电流为i(0=i(0=0电容器初始电压为u(0=u(0=Uc0Wot以上方程等价与i =lmCOsWt+如-ImCO妙cosA0t+(W2LC1)uc0 +UmSnsi nw0t1-w LC这里0 =1/皿为震荡频率，Im是电流稳定时的峰值。为了使得(1)式中的电流能直接到稳定值，避免瞬间冲击。以下两个条件必须同时满足:Uc0Um1 -w2lc* = ±-2这里Uc0是电容器的残余电压，是电容器投入时的初始相角。(a)电容器电压必须和Uc0以上两个条件可以进一步解释为: 21-W Ic保持一致。在 WLCVV1电容器电压可认为是和

5、电源电压峰值相等。（b） 电容器电压必须在投切时刻与电源电压峰值是大小相等，极性一致当以上两个条件同时满足时，电源电流就会处于无畸变的稳定状态。这时兀i =lmCOS（Wt +-）但是在实际操作当中，电源电压具有波动性。并且电容器的电压有残余电压使得同时满 足以上两个条件显得有点可望而不可及。然而，当系统电压过零时如果投入电容器能较好的 实现，当电容器的电压为零时。Umsi nd%当W2LC2 <<1，表达式（1）可以变为i = I m COS（Wt +町 一 Im COS© COS Wot由此可见，当端点电压和电容器之间的电压差为零时，电容器投切时刻的瞬间电压峰值不会超

6、过稳定电压峰值的两倍。进一步讲，如果投切时刻的相位角小于90度，无瞬变电流的投切是可能实现的。所以与电容器之间的电压为零时刻来出发晶闸管来投入电容器是有原理 可寻的。三. 电容器残余电压的测试:E h- tk I L 4 - - !_!_ '上-卜- r -J-q r=-=-；匕y ¥十厂 一 匚.ra - : W4 J 十"- _ ，.- I _ _ -T ' - 1- I1:H H I IM I"s*_ 匸.图2并联电容器端的电压差为非零时的现场电流测试波形晶闸管投切确保无瞬间突变电流的关键是电压的准确检测，在高压系统里，TSC的电压测量显得有

7、些困难。在10KV系统中，电容器端的峰值电压将达到14140V（ DC），当投入系统时，电子管两端的电压波形将是直流和交流的叠加，其中直流将会逐渐衰减为零，如果电压不能被准确的测量出，投切电压差很大，变化的电流，将会使得di/dt很大，它可能损坏晶闸管，图2为电容器与电源电压差不为零时，投切后的在线电流检测波形， TSC在高压系统 中。每相一般有12到60个晶闸管控制，其耐压水平从 6KV到35KV不等，控制电路版块在地面，电压测量信号通过传输通道传送到地面控制部分。触发脉冲必须从地面控制系统，及 时准确地触发晶闸管，在高压系统中。地面低压和高压之间应可靠、独立的认真设计，以避免相互干扰和在高

8、压电路逻辑间的误触发。在6KV 35KV相对较小的无功补偿系统中，图3采用的是无源检测装置，采集到的信号通过光纤传输到可相互通信的中央处理器。在组织结构方面这种检测方法比有源的是简单易行的。可有效的避免电磁干扰。高压信号量电源控制决策系统高压区电路独立逻辑电路独立3触发和控制系统4接地区图3逻辑电路和无源测量图4显示的是电子管串联时电压检测的一种方框图，通过电阻器分压后，当并联电容器 组的残余电压与检测电源电压的峰值一致时，电压信号就成比例的并行传送给光纤线路，在与并联电容器组的电压差为零时。逻辑电路从光纤电路中输出触发信号到TSC的控制器，来控制那些电容器需要投切。借助功率放大器的触发信号是

9、电磁隔离的。晶闸管一旦被触发他 们就导通，电容器就投切上去工作。当两端电压接近零时，并且低于检测的最小值，触发器 就一产生触发脉冲电容器就投入使用，但同时要确保晶闸管的可靠导通。当投切命令撤消时。触发脉冲停止发送。当电流衰减到零时晶闸管关断。当下一组投切命令传输时，电容器组将从系统中断开。3*比丄仙*r IVb<44MpT 问 IZcrp-itar LI 5 .nj r I&<Xi图4串联电压测试的方框图晶闸管动作后的电压波形如图5所示，电压负半波是反向的。从波形图中我们可以看出电压波形的正负半波周期是不对称的。其中在正半波周期存在 电压峰值，这是由于接通时电容器存在残余电

10、压。t (ms)晶闸管两端电压过零检测的过程如下:连续不断的取三相电压 Va、Vb和Vc进行比较，如果有Va>Vb>Vc,并且Vc电压小于给定 的电压V1。如图5所示，就认为有过零电压出现。这种检测方法相对简单，但和单纯的与预 置小电压比较而言，这种方法又是更可靠、更具防干扰能力。而且不受谐波影响。通过实验 我们更可以看出这种检测方法是更实用、更可靠的。投切命令一旦发出，三相晶闸管将被触发，三相回路闭合。但在实际操作中三相晶闸管 不可能被同时触发，因为各相晶闸管的触发是根据各自的过零检测零电压的出现而触发的。所以整个过程的投切是一个短暂的三相不对称投切过程。当不对称的冲击不足以对过

11、零保护 系统造成威胁时。这种干扰对系统来说可以忽略。在三相投切过程中，有一种情况是有可能发生的，即一相电压检测没有过零且没有被投 切。为了避免长期的三相不对称状态，投切过程将被立即停止。触发阀将被隔离。错误信号 会发出。当切断信号从主控制系统发出，触发器是不工作的，为了切断电子管，触发脉冲立即停 止。如果触发脉冲启用，那么晶闸管将必须连续保持导通。如果发生反常情况，例如一个很 短周期内出发脉冲丢失。当触发脉冲不能够立即撤除，一旦接到导通命令，对晶闸管来说在 任何时候的偶然接通都是有可能的。在没有零电压差检测的情况下的任何投入电容器。都有 可能产生过电流甚至损坏晶闸管的情况发生。因此一旦在电子管

12、导通的时候，过零电压检测 系统失灵，触发脉冲应立即停止，在这个情况下，如果没有切断命令，故障信号应发出。晶闸管都有短暂的过电流极限，所以控制器将有快速处理过电流的能力，一个硬件中断程序来对付过电流的产生，它能够在检测到有过电流产生时立即终止启动信号，并且发出故 障信号。过电压也有可能损坏晶闸管，当电容器上没有残余电压时，图6显示是电子管单元上面的过电压波形。£20 8图6 无电压残余时的过电压波形电子管阀间过电压产生的原因是有些电子管的损坏，或者系统电压的过大。在投入之间,电子管间的端电压将被检测。如果有过电压的产生，触发信号将被停止，并且故障信号发出。电子管端电压是连续等间隔的被抽

13、样，样本数据不是唯一判断投切的逻辑。但是在过电压的 检测中。如果样本电压是预置电压的 5倍，如图6所示，电子管间的电压被认为过高，投入命令将被终止。四. TSC控制器的现场性能实验A .投入无涌流电流的性能实验AC、按照上述原理方法设计的TSC控制器已经在北京燕山石化公司 6KV-35KV变电所中投入使用。在这次测试中不会有电感与电容器串联的情况。投入命令一旦发出。控制器就按AB、BC的次序接通电容器组。夹线式电流计在 A相电路输入端。测量AC两相电路的线电流lac投入时刻的电流波形被记录，并如图 7所示。L迎&Mm四1 _图7 电流记录波形图中，a点是投入过程的开始点，此时AC支路的

14、电容器被投入。b点是AC两相投入过 程的终结点。这时BC相的晶闸管将被触发。在a点和b点之间。电流的尖峰值为18A，在稳定时电流峰值为16A。两者之间的比率 为 1.125o在b点之后，电流的尖峰值为33A，稳定时的峰值为28A，两者的比率为1.178。以上实验经过上千次都得到几乎相同的结果，经过上面的实验，我们可以看出零电压检 测控制器是可靠有效的，投入效果比较满意。动态响应图形为图8所示，从主控制器释放信号（a点）到第二阶段电容器被接入的开始 点（b点），整个过程是触发器的工作过程。从图形中我们可以看出TSC的合闸时间仅仅17秒，包括触发控制器从串联通信口接收到投入命令的时间和零电压检测时

15、间。反复实验可以看出电容器投入运行的时间在20秒内，三相整个投入使用的时间不会超过 50秒。- rl- J -r- 电-IT h Jr- Brlrr-Ks, - u -p -r Btr-st* HAh图8触发过程的动态响应图形图8记录的是从控制器发出关断命令（a点）到三相电容器关断（b点）的波形。反复实 验表明关断时间在20秒内。五. 结论本文所介绍的6KV-35KV TSC装置及其控制策略经验证结果表明各项技术指标都达到了设计要求。尤其在电容器投入非涌流方面更胜一筹。在线验证结果表明对级联电子管而言零 电压检测方法是正确的。TSC控制器可以根据控制策略可靠的执行主控功能。英文原文:Desig

16、 n of the Con trol System for Thyristor SwitchedCap acitor DevicesAbstractA thyristor switched cap acitor (TSC) device app lied in 6 to 10 KV po wer distributio n systems is described in the paper, which can switch on the cap acitors without over inr ush curre nt and switch off at the in sta nt whe

17、n curre nt is reduced to zero. The con diti ons of non-tran sie nt switch on/off are discussedfirst, and a voltage detect ing principle for the medium voltage TSC is in troduced. The propo sed TSC is simple in structure. On-site test result shows that the zero-voltage detect method correct and relia

18、ble, and the switch-on p erforma nee is satisfactory.I. INTRODUCTIONThe shunt capacitor is an important reactive power sources in medium and high voltage tran smissi on n etworks. The reactive po wer compen sati on by means of automatic switch on/off of the cap acitor banks can be used to effectivel

19、y adjust the system voltage and bala nee the reactive po wer flow, so as to enhance the system po wer factor, reduce the n etwork losses, imp rove the voltage quality, in crease the reactive po wer reserve to avoid voltage colla pse and enhance the system stability limit. Reactive po wer automatic c

20、ompen sati on is an econo mic and realistic means to imp rove the op erat ing economy and reliability for the tran smissi on and distributio n n etworks.The app lied voltage range for the TSC device men ti oned in this paper is from 6 to 35 kV, which is able to con trol the cap acitor banks to be sw

21、itched on without over curre nt and off at the in sta nt of zero curre nt. TSC has the adva ntagesover the mecha ni cal switchgears in terms of the inr ush curre nt and op erati ng over-voltage whe n the cap acitor banks are switched on and off. The theoretical and ideal switch on con diti on for th

22、e cap acitor is that the in itial curre nt at the in sta nt of the switch on is zero so as to put the capacitor hanks directly into stable operation without any transient procedure. In principle, the maximum time of switch on and off for the single-phase capacitor bank is half cycle of the power fre

23、quency in order to ensure non-inrush current. An imp orta nt tech ni cal p roblem that has to be solved in TSC desig n is how to make the thyristors and cap acitors avoid being damaged by the inr ush curre nt and tran sie nt over-voltage duri ng the switch on and off p eriod.n. CONDITIONS FOR NON-TR

24、ANSIENT SWITCE ON-OFFThe equivale nt circuit of a sin gle-p hase cap acitor switched on/off by a bi-direct ional thyristor valve is show n in Figure 1.Figure 1 Equivale nt circuit of a sin gle-p hase TSCThe mathematic equati on for the circuit isu =UmSin(wt +$) =l2 +吉 fidtdt Where the in itial curre

25、 nt for the in ducta nee isi(0=i(0=0and the in itial voltage for the cap acitor isu(0+)=u(0=Uc0The soluti on of the above equati on isi = lm coswt+0) j mcoZ cosw0t +w0r (W2LC2 -1九0 +U m si n©si n w0t (1)1-w LCWhere 0 =1/诳C, and Im is the peak current when the circuit is stable. In order for the

26、 curre nt exp ressed in (1) to be directly reached into stable without tran sie nt p rocedure, the followi ng two con diti ons should be satisfied simulta neously.Uc0=±71-w Ic<U±-2Where Uco is the residual voltage of the cap acitor, and 0 is the in itial p hase an gle whe n switch on.Th

27、e two con diti ons mea n that UmUc0(a) The capacitor must be charged to the=ZE1w2|c . When WLC<<1, it can be con sidered that the cap acitor should be charged to the p eak value of the source voltage.(b) The valve must be switched on at the instant that the source voltage reaches to the peak v

28、alue, and the p olarity of the source and the cap acitor voltages must be the same. Whe n the above two conditions are met, the circuit current wilt be directly reached to stable without transient兀i = I m COS(Wt +)procedure, that is,2 .In p ractice, the ran dom fluctuati on of the system voltage and

29、 the un certa inty off the cap acitor residual voltage make it very difficult to satisfy simultaneously the above two conditions. Nevertheless, the con diti on that the voltage differe nee across the cap acitor term in als is zero at the in sta nt of switch ing on the cap acitor can be relatively ea

30、sily realized. Whe n the voltage differe nee across the capacitor terminals is Zero, that isU m si U c0, as W LC 1.The Exp ressi on (1) becomesi = I m COS(Wt M) Im COS© COSW0tIt can be see n that, if the voltage differe nee across the cap acitor term in als is zero, the p eak value of the tran

31、sie nt curre nt whe n switched on will n ever excess two times of the p eak value of the stable curre nt, and further more, if the switched on p hase an gle is p ositive or minus 90 degrees, the con diti ons of the non-tran sie nt switch-on will be p erfectly achieved. So it is reas on able to make

32、the criteri on that the voltage differe nee across the cap acitor termi nals is zero whe n switched on as the con diti on of the valve trigger con trol.Ill DETECTING FOR THE RESIDUAL VOLTAGE IN TSCFigure 2 On-site text recording of the current when the voltageDiffere nee across the termi nals of the

33、 thyristor is not zero.The key point to realize the above criteri on for the non - i nrush switch-on is to correctly detect the voltage across each valve. In the high voltage TSC, the voltage detecti on is always a difficult problem. In the 10KV system, the peak value of the voltage across the capac

34、itor will reach to14140V (DC), whe n superimp osed with the system voltage, the result ing voltage differe nee across the valve will be a mixed AC and DC waveform with DC voltage gradually reduced to zero. If the residual voltage could not be detected correctly, the valve is switched on at a larger

35、voltage differenee, then the variation of the current di/dt becomes extremely large, which is possible to damage the thyristor. Figure 2 shows an on-site test recordi ng of the curre nt wave whe n the voltage differe nee across the termi nals of the valve is not zero.In HV-TSC, 12 to 64 thyristors a

36、re conn ected in series for each p hase, and the thyristors are in the high voltage levels from 6 to 35 KV, while the con trol board is situated in the ground level. The sig nals detected for the voltage differe nee across the valve from the detect ing component should be sent to the central process

37、ing unit located in the ground area, while the trigger puIses front the control system in ground area should in turn be sent to the thyristors in the HV level. Reliable isolati on betwee n the ground and the I-IV levels should be carefully desig ned in order to avoid the p ossible in terfere nee and

38、 mis-trigger un der the circumsta nee of HV electrical and magn etic fields. For the relatively small cap acity of the reactive po wer compen sati on of 6 to 35 KV, the detect ing mecha nism without po wer source show n in Figure 3 is ado pted. The sig nal is tran smitted through the op tical fiber

39、to com muni cate with the cen tral p rocess ing un it. This detect ing method is simpler in structure than the one with power source, and can effectively avoid the electro- magnetic in terfere nee.Figure 4 shows a block diagram for the voltage detect ion of the valves in series. After voltage divisi

40、o n through the resistor, the voltage sig nal prop orti onal to the voltage differe nee across the valves is sent to the op tical fiber circuit. Whe n the in sta nt value of the AC bus voltage is equal to th residual voltage across the cap acitor ban ks, the voltage differe nee across the valves is

41、zero. The n Ready logic is out put from the op tical fiber circuit, which is AND with the cap acit-onswitchcomma nd issued from TSC con troller, formi ng the trigger sig nals. The valves are triggered by means of the po wer amp lifier and the electro-mag netic isolati on. As soon as the valves are s

42、witched on, they will be kept to con duct, and the cap acitor banks are put into op erati on. The voltage across the thyristors whe n con duct ing is app roximately reached to zero, and is lower tha n the detect ing level limit. The trigger pu Ises will continue to out put as soon as the switch-on c

43、omma nd is ON, en suri ng the thyristors be reliably con ducted. Whe n the switch-on comma nd is withdraw n, the trigger signals stop, and the valves are switched off when the current is passed thoughzero. The cap acitor battles will be switched off from the bus un til the TSC con troller issues the

44、 n ext switch-on comma nd.Figure 4 Block diagram of voltage detecti on for valves in seriesThe waveform of the voltage signal across the valves after processing is shown in Figure 5, with the n egative half cycle being reversed.From the waveform we can see that the p ositive half cycles are not symm

45、etrical to the n egativ on es, and there is a p eak cli pping in the po sitive half cycle. This is due to the effect of the residual voltage on the cap acitors.vL20Figure 5 The waveform of the detected voltage signalsThe zero cross ing point of the voltage across the valves is detected by means of t

46、he algorithm described as follows.Three samp li ng voltage points with regular in terval, Va, Vb and Vc, are comp ared con ti nu ously If (a) Va>Vb>Vc and (b) Vc is less than a preset limit Vi, as shown in Figure 5, then the zero voltage point is assumed to he reached.The algorithm is sim pie,

47、 hut with more reliability and counter-in terfere nee cap ability tha n justsimply comparing the sampling point with the preset value. The algorithm is not affected by harm oni cs. The effective ness and reliability of the algorithm have already bee n pro ved through the on-site test.When the switch

48、-on comma nd is issued, the three p hase valves are to be triggered and the three-phase circuit is closed. In practice, it is impossible to trigger the three phase valvesntsimulta neously because each p hase of the valves should be triggered and switched on at the in sta of zero voltage of the in di

49、vidual p hase. So the whole switch-on p rocedure is a short three-p hase un bala need tran sie nt '51. While the un bala need tran sie nt is not stro ng eno ugh to start the zero-seque nee p rotecti on, so its in terfere nee on the system could be n eglected.During the three-p hase switch-on p r

50、ocedure, it is p ossible that one p hase did not p ass through the zero detect ion and could not be switched on. To avoid long term of un bala need loadi ng, the switch-on p rocedure should immediately be stopp ed. The triggered valves should be disc onn ected, and fault sig nals should be issued.Wh

51、e n switch-off comma nd is issued from the main con troller, the trigger sig nal is disabled anc the trigger pu Ises are immediately stopp ed, so as to switch off the valves.The valves should kee p con ti nu ously con duct ing when the trigger pu Ises are en abled. If the abno rmal con diti on occur

52、s, for exa mp le, the en able comma nd disa pp ears for a short p eriod, while the trigger pu Ises do not withdraw immediately, the valves are p ossible to be ran domly switched on at any time as soon as the en able comma nd resumes. Any switch-on without zero voltage detection is possible to result

53、 in the over current or even damage for the thyristors. So if an interrupt is detected duri ng the valve con ducti on, the pu Ise en able sig nal should be immediately withdraw n. During this p eriod, if there is no switch-off comma nd, fault sig nal should be issued.The thyristor can on ly en due a

54、 limited over curre nt for a short time. So the con troller should make a fast react ion 10 the over curre nt fault. A hardware in terr up tio n is used to p rocess the over curre nt fault, which stops the en able sig nal immediately after the over curre nt fault is detected and issues a fault sig n

55、al.Over voltage will result in the damage of the thyristors. Whe n there is no residual voltage on the cap acitor, the waveform duri ng an over voltage across the valve unit is show n in Figure 6.u0Figure 6 Over voltage waveform ac- the valves with no residuale system over voltage. Before each switc

56、h-on, the voltage across each valve should be checked. If there is an over voltage, the trigger sig nal is disabled, and fault sig nal is issued. The voltage across the valve is con ti nu ously sampled with equal in terval. The samp li ng data are not only used for the switch-On/off logic, hut also

57、for the over-voltage detecti on. If the samp li ng voltage is larger tha n the p reset value V, for 5 times, as show n in Figure 6, the voltage across the valve is con sidered being too high, and the switch-on comma nd should be disabled.IV. ON-SITE PERFORMANCE TEST FOR THE TSC CONTROLLERA. P erform

58、a nee test of switch-on without inr ush curre nt TSC con troller devel oped accord ingto the above men tio ned principle has bee n put into test op erati on in a 6 KV substati on in Beiji ng Yan sha n P etrol-Chemical Co. During the test there is no in ducta nee series conn ected with the cap acitors.Whe n switch-on comma nd is issued, the con t