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1、Copyright 2000, Texas Instruments IncorporatedSBAS174BPrinted in U.S.A. February, 2002PCM173824-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTERFEATURESAPPLICATIONS24-BIT RESOLUTIONAV RECEIVERS ANALOG PERFORMANCE (VCC = +5V):DVD MOVIE PLAYERSDynamic Range: 117dB typSA

2、CD PLAYERSSNR: 117dB typHDTV RECEIVERSTHD+N: 0.0004% typCAR AUDIO SYSTEMSFull-Scale Output: 2.2Vrms (at post amp)DIFFERENTIAL CURRENT OUTPUT: 2.48mADIGITAL MULTI-TRACK RECORDERS SAMPLING FREQUENCY: 10kHz to 200kHzOTHER MULTICHANNEL AUDIO SYSTEMSSYSTEM CLOCK: 128, 192, 256, 384, 512,DESCRIPTIONor 768

3、fS with Auto DetectACCEPTS 16-, 20-, AND 24-BIT AUDIO DATA The PCM1738 is a CMOS, monolithic, Integrated Cir-DATA FORMATS: Standard, I2S, and Left- cuit (IC) that includes stereo Digital-to-Analog Convert- Justifieders (DACs) and support circuitry in a small SSOP-28 8x OVERSAMPLING DIGITAL FILTER:pa

4、ckage. The data converters utilize a newly developedadvanced segment DAC architecture to achieve excel-Stopband Attenuation: 82dBlent dynamic performance and improved tolerance toPassband Ripple: 0.002dBclock jitter. The PCM1738 provides balanced current OPTIONAL INTERFACE TO EXTERNALoutputs, allowi

5、ng the user to optimize analog perfor- DIGITAL FILTER AVAILABLEmance externally, and accepts industry standard audioOPTIONAL INTERFACE TO DSD DE-data formats with 16- to 24-bit data, providing easy CODER FOR SACD PLAYBACKinterfacing to audio DSP and decoder chips. Sampling USER-PROGRAMMABLE MODE CON

6、TROLS: rates up to 200kHz are supported. The PCM1738 alsohas two optional modes of operation: an external digital-Digital Attenuation: 0dB to 120dB, 0.5dB/Stepfilter mode (for use with the DF1704, DF1706, andDigital De-EmphasisPMD200), and a DSD decoder interface for SACD Digital Filter Roll-Off: Sh

7、arp or Slowplayback applications. A full set of user-programmable Soft Mutefunctions are accessible through a 4-wire serial controlZero Detect Muteport that supports register write and functions.Zero Flags for Each Output DUAL-SUPPLY OPERATION:+5V Analog, +3.3V Digital5V TOLERANT DIGITAL INPUTS SMAL

8、L SSOP-28 PACKAGESPECIFICATIONSAll specifications at TA = +25 C, VDD = +3.3V, VCC = +5V, SCKI = 256fS (fS = 44.1kHz), and 24-bit input data, unless otherwise noted.PCM1738SBAS174B2PARAMETERCONDITIONSPCM1738EUNITSMINTYPMAXRESOLUTION24BitsDATA FORMATAudio Data Interface Formats Audio Data Bit LengthAu

9、dio Data FormatSampling Frequency (fS) System Clock FrequencyStand 16-, 20MSB-Firs10128, 19ard, I2S, Left-Just-, 24-Bits Selecta t, Binary Twos Co2, 256, 384, 512,ified blemplement200768fSkHzDIGITAL INPUT/OUTPUTLogic Family Input Logic LevelVIH VILInput Logic Current IIHIILOutput Logic Level VOHVOLH

10、igh Impedance Output Logic Current(1) IOHZIOLZVIN = VDD VIN = 0VIOH = 2mA IOL = +2mAVOUT = VDD VOUT = VDD2.02.4TTL-Compatible0.810101.055VDC VDCA AVDC VDCA ADYNAMIC PERFORMANCE(2)THD+N at VOUT = 0dBDynamic RangeSignal-to-Noise RatioChannel SeparationLevel Linearity ErrorfS = 44.1kHz fS = 96kHz fS =

11、192kHzEIAJ, A-Weighted, fS = 44.1kHz A-Weighted, fS = 96kHzA-Weighted, fS = 192kHz EIAJ, A-Weighted, fS = 44.1kHzA-Weighted, fS = 96kHz A-Weighted, fS = 192kHz fS = 44.1kHzfS = 96kHz fS = 192kHzVOUT = 110dB1141141100.00040.00060.00121171171171171171171151131111.00.0008%dB dB dB dB dB dB dB dB dB dBD

12、C ACCURACYVCOM2 VoltageVCOM2 Output Current Gain ErrorGain Mismatch, Channel-to-Channel Bipolar Zero ErrorDelta VCOM2 2.0V, the power-on reset function will be enabled. The initialization sequence re- quires 1024 system clocks from the time VDD 2.0V. After the initialization period, the PCM1738 will be set to its reset default state, as described in the Mode Control Regis