[工学]数字逻辑课程设计报告

1、.数字逻辑课程设计报告交通灯控制器学院名称： 专业班级： 学生姓名： 学生学号： 2011年6月31日一 设计目的（1） 进一步掌握VHDL语言和图形编辑的设计方法。（2） 进一步熟悉层次化设计的方法。（3） 综合运用数字逻辑的各方面的知识。（4） 增强动手实践能力，以及分析问题能力。二 设计任务及要求交通灯信号控制器用于主干道与支干道公路的交叉路口，要求是优先保证主干道的畅通。在十字路口的两个方向上各设一组红、绿、黄灯，显示顺序为其中一方向（东西方向）是绿灯、黄灯、红灯；另一方向（南北方向）是红灯、绿灯、黄灯。设置一组数码管，以倒计时的方式显示允许通行或禁止通行的时间，其中主干道绿灯、黄灯、

2、红灯的持续时间分别是45s、5s和30s，支干道绿灯、黄灯、红灯的持续时间分别是25s、5s和50s十字路口往往会出现急救车、消防车和警车等一些执行特殊任务，需要优先通过十字路口的车辆。本设计采用一个按钮实现此功能，当按钮按下时，所有通道禁行，倒计时显示全部为0。特殊车辆可以优先通过。按钮恢复后，系统马上复位，重新开始状态转换。十字路口往往会出现某一方向通道车流人流量较多，另一方向相对较小的不平衡状况。所以交警需要有计划的干预交通灯控制系统，优先某一通道通行。本设计此功能采用两个按钮实现。按钮按下时，相应通道车人直行，而另一通道禁行，倒计时全部显示为0。按钮恢复后，系统马上复位，重新开始状态转

3、换。要求编写交通灯控制器电路逻辑图中的各个模块的VHDL语言程序，并完成交通灯控制器的顶层设计，然后利用开发工具软件对其进行编译和仿真，最后要通过实验开发系统对其进行硬件验证。表一交通灯状态转换表主干道红灯红灯绿灯黄灯30秒45秒5秒支干道绿灯黄灯红灯红灯25秒5秒50秒三 设计方案及总体框图：采用模块层次化设计，将此设计分为三个模块：计时模块，状态控制模块，显示控制模块。将三个模块分别用VHDL语言编写成，做成原理图模块，用原理图输入法做整个设计的顶层文件。图1 交通灯控制器系统框图 ·四 设计过程及模块描述计时译码模块：其中，CLK为时钟输入端，接收外部1Hz频率的时钟信号，直接

4、供系统时钟运用，控制电路的倒计时采用BCD码输出格式。BCD码减法运算需要处理好的是借位调整。1.45s计时译码模块VHDL程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY CNT45S IS PORT(SB,CLK,EN45:IN STD_LOGIC;DOUT45M,DOUT45B:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END ENTITY CNT45S;ARCHITECTURE ART OF CNT45S IS SIGNAL CNT6B:STD_L

5、OGIC_VECTOR(5 DOWNTO 0);BEGINPROCESS(SB,CLK,EN45) ISBEGINIF SB='0' THEN CNT6B<=CNT6B-CNT6B-1;ELSIF(CLK'EVENT AND CLK='1')THENIF EN45='1' THEN CNT6B<=CNT6B+1;ELSIF EN45='0' THEN CNT6B<=CNT6B-CNT6B-1;END IF;END IF;END PROCESS;PROCESS(CNT6B)ISBEGINCASE CNT6B

6、 ISWHEN "000000"=>DOUT45M<="01000101"DOUT45B<="01010000"WHEN "000001"=>DOUT45M<="01000100"DOUT45B<="01001001"WHEN "000010"=>DOUT45M<="01000011"DOUT45B<="01001000"WHEN "000011&quo

7、t;=>DOUT45M<="01000010"DOUT45B<="01000111"WHEN "000100"=>DOUT45M<="01000001"DOUT45B<="01000110"WHEN "000101"=>DOUT45M<="01000000"DOUT45B<="01000101"WHEN "000110"=>DOUT45M<="

8、;00111001"DOUT45B<="01000100"WHEN "000111"=>DOUT45M<="00111000"DOUT45B<="01000011"WHEN "001000"=>DOUT45M<="00110111"DOUT45B<="01000010"WHEN "001001"=>DOUT45M<="00110110"DOUT45B&l

9、t;="01000001"WHEN "001010"=>DOUT45M<="00110101"DOUT45B<="01000000"WHEN "001011"=>DOUT45M<="00110100"DOUT45B<="01101001"WHEN "001100"=>DOUT45M<="00110011"DOUT45B<="00111000"W

10、HEN "001101"=>DOUT45M<="00110010"DOUT45B<="00110111"WHEN "001110"=>DOUT45M<="00110001"DOUT45B<="00110110"WHEN "001111"=>DOUT45M<="00110000"DOUT45B<="00110101"WHEN "010000"=&

11、gt;DOUT45M<="00101001"DOUT45B<="00110100"WHEN "010001"=>DOUT45M<="00101000"DOUT45B<="00110011"WHEN "010010"=>DOUT45M<="00100111"DOUT45B<="00110010"WHEN "010011"=>DOUT45M<="001

12、00110"DOUT45B<="00110001"WHEN "010100"=>DOUT45M<="00100101"DOUT45B<="00110000"WHEN "010101"=>DOUT45M<="00100100"DOUT45B<="00101001"WHEN "010110"=>DOUT45M<="00100011"DOUT45B<=&

13、quot;00101000"WHEN "010111"=>DOUT45M<="00100010"DOUT45B<="00100111"WHEN "011000"=>DOUT45M<="00100001"DOUT45B<="00100110"WHEN "011001"=>DOUT45M<="00100000"DOUT45B<="00100101"WHEN

14、"011010"=>DOUT45M<="00011001"DOUT45B<="00100100"WHEN "011011"=>DOUT45M<="00011000"DOUT45B<="00100011"WHEN "011100"=>DOUT45M<="00010111"DOUT45B<="00100010"WHEN "011101"=>D

15、OUT45M<="00010110"DOUT45B<="00100001"WHEN "011110"=>DOUT45M<="00010101"DOUT45B<="00100000"WHEN "011111"=>DOUT45M<="00010100"DOUT45B<="00011001"WHEN "100000"=>DOUT45M<="0001001

16、1"DOUT45B<="00011000"WHEN "100001"=>DOUT45M<="00010010"DOUT45B<="00010111"WHEN "100010"=>DOUT45M<="00010001"DOUT45B<="00010110"WHEN "100011"=>DOUT45M<="00010000"DOUT45B<="

17、;00010101"WHEN "100100"=>DOUT45M<="00001001"DOUT45B<="00010100"WHEN "100101"=>DOUT45M<="00001000"DOUT45B<="00010011"WHEN "100110"=>DOUT45M<="00000111"DOUT45B<="00010010"WHEN &quo

18、t;100111"=>DOUT45M<="00000110"DOUT45B<="00010001"WHEN "101000"=>DOUT45M<="00000101"DOUT45B<="00010000"WHEN "101001"=>DOUT45M<="00000100"DOUT45B<="00001001"WHEN "101010"=>DOUT4

19、5M<="00000011"DOUT45B<="00001000"WHEN "101011"=>DOUT45M<="00000010"DOUT45B<="00000111"WHEN "101100"=>DOUT45M<="00000001"DOUT45B<="00000110"WHEN OTHERS=>DOUT45M<="00000000"DOUT45B&l

20、t;="00000000"END CASE;END PROCESS;END ARCHITECTURE ART;当SB=0时，信号CNT6B为-1，故输出均为0，即45s计时器不起作用。当SB=1，EN45=1时，此时DOUT45M从45s减至0s，DOUT45B从50s减至0s。即45s计时器起作用。当SB=1，EN45=0时，信号CNT6B为-1，故45s的输出均为0，即45s计时器不起作用。当SB=1，EN45=1时的输出波形：2.25s计时译码模块VHDL程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_

21、LOGIC_UNSIGNED.ALL;ENTITY CNT25S IS PORT(SB,SM,CLK,EN25:IN STD_LOGIC; DOUT25M,DOUT25B:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END ENTITY CNT25S;ARCHITECTURE ART OF CNT25S ISSIGNAL CNT5B:STD_LOGIC_VECTOR(4 DOWNTO 0);BEGINPROCESS(SB,SM,CLK,EN25) ISBEGINIF SB='0'OR SM='0' THENCNT5B<=CNT5B-C

22、NT5B-1;ELSIF(CLK'EVENT AND CLK='1')THENIF EN25='1' THENCNT5B<=CNT5B+1;ELSIF EN25='0' THENCNT5B<=CNT5B-CNT5B-1;END IF;END IF;END PROCESS;PROCESS(CNT5B) ISBEGINCASE CNT5B ISWHEN "00000"=>DOUT25B<="00100101"DOUT25M<="00110000"WHEN

23、 "00001"=>DOUT25B<="00100100"DOUT25M<="00101001"WHEN "00010"=>DOUT25B<="00100011"DOUT25M<="00101000"WHEN "00011"=>DOUT25B<="00100010"DOUT25M<="00100111"WHEN "00100"=>DOUT

24、25B<="00100001"DOUT25M<="00100110"WHEN "00101"=>DOUT25B<="00100000"DOUT25M<="00100101"WHEN "00110"=>DOUT25B<="00011001"DOUT25M<="00100100"WHEN "00111"=>DOUT25B<="00011000"

25、;DOUT25M<="00100011"WHEN "01000"=>DOUT25B<="00010111"DOUT25M<="00100010"WHEN "01001"=>DOUT25B<="00010110"DOUT25M<="00100001"WHEN "01010"=>DOUT25B<="00010101"DOUT25M<="00100000

26、"WHEN "01011"=>DOUT25B<="00010100"DOUT25M<="00011001"WHEN "01100"=>DOUT25B<="00010011"DOUT25M<="00011000"WHEN "01101"=>DOUT25B<="00010010"DOUT25M<="00010111"WHEN "01110"

27、;=>DOUT25B<="00010001"DOUT25M<="00010110"WHEN "01111"=>DOUT25B<="00010000"DOUT25M<="00010101"WHEN "10000"=>DOUT25B<="00001001"DOUT25M<="00010100"WHEN "10001"=>DOUT25B<="000

28、01000"DOUT25M<="00010011"WHEN "10010"=>DOUT25B<="00000111"DOUT25M<="00010010"WHEN "10011"=>DOUT25B<="00000110"DOUT25M<="00010001"WHEN "10100"=>DOUT25B<="00000101"DOUT25M<=&quo

29、t;00010000"WHEN "10101"=>DOUT25B<="00000100"DOUT25M<="00001001"WHEN "10110"=>DOUT25B<="00000011"DOUT25M<="00001000"WHEN "10111"=>DOUT25B<="00000010"DOUT25M<="00000111"WHEN "

30、11000"=>DOUT25B<="00000001"DOUT25M<="00000110"WHEN OTHERS=>DOUT25B<="00000000"DOUT25M<="00000000"END CASE;END PROCESS;END ARCHITECTURE ART;当SB=0或SM=0时，信号CNT5B为-1，故输出均为0，即25s计时器不起作用。当SB=1、 SM=1、EN25=1时，此时DOUT25M从25s减至0s，DOUT25B从30s减至0s。即2

31、5s计时器起作用。当SB=1、 SM=1、EN25=0时，信号CNT6B为-1，故输出均为0，即45s计时器不起作用。当SB=1、 SM=1、EN25=1时的输出波形：3.5s计时译码模块VHDL程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY CNT05S ISPORT(CLK,EN05M,EN05B:IN STD_LOGIC; DOUT5:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END ENTITY CNT05S;ARCHITECTURE ART O

32、F CNT05S ISSIGNAL CNT3B:STD_LOGIC_VECTOR(2 DOWNTO 0);BEGINPROCESS(CLK,EN05M,EN05B) ISBEGINIF(CLK'EVENT AND CLK='1')THENIF EN05M='1' OR EN05B='1' THENCNT3B<=CNT3B+1;ELSECNT3B<="000"END IF;END IF;END PROCESS;PROCESS(CNT3B) ISBEGINCASE CNT3B ISWHEN "000&

33、quot;=>DOUT5<="00000101"WHEN "001"=>DOUT5<="00000100"WHEN "010"=>DOUT5<="00000011"WHEN "011"=>DOUT5<="00000010"WHEN "100"=>DOUT5<="00000001"WHEN OTHERS=>DOUT5<="00000000

34、"END CASE;END PROCESS;END ARCHITECTURE ART;当EN05M='1'或EN05B='1'时，5s计时电路开始起作用，它将从5s减至0s。当EN05M='1'、EN05B='1'时的输出波形：主控制器模块：控制器的作用是根据计数器的计数值控制发光二极管的亮、灭，以及输出倒计时数值给七段数译管的分位译码电路。此外，当检测倒特殊情况发生时，无条件点亮红色的发光二级管。本设计中可以划分为的5个状态，通过case查表语句，根据当前状态决定下一状态以及新的计数初值。急车强通、单一通道优先通行功能

35、的实现只需要优先于正常的输出，添加额外的输出控制。控制完成后，系统复位到初始值。当十字路口出现急救车，消防车以及警车等需要优先通行时，功能按钮按下输入高电平。所有通道禁行，倒计时数码管显示全零。VHDL程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY JTDKZ ISPORT(CLK,SM,SB:IN STD_LOGIC;MR,MY,MG,BR,BY,BG:BUFFER STD_LOGIC);END ENTITY JTDKZ;ARCHITECTURE ART OF JTDKZ ISTYPE STATE_TYPE IS(A,B,C,D);SIG

36、NAL STATE:STATE_TYPE;BEGINCNT:PROCESS(CLK) ISVARIABLE S:INTEGER RANGE 0 TO 45;VARIABLE CLR,EN:BIT;BEGINIF(CLK'EVENT AND CLK='1')THEN IF CLR='0' THEN S:=0; ELSIF EN='0' THEN S:=S; ELSE S:=S+1;END IF; CASE STATE ISWHEN A=>MR<='0'MY<='0'MG<='1

37、'BR<='1'BY<='0'BG<='0'IF(SB AND SM)='1'THENIF S=45 THEN STATE<=B;CLR:='0'En:='0'ELSE STATE<=A;CLR:='1'EN:='1'END IF;ELSIF(SB AND (NOT SM)='1' THEN STATE<=B;CLR:='0'EN:='0'ELSE STATE<=A;CL

38、R:='1'EN:='1'END IF;WHEN B=>MR<='0'MY<='1'MG<='0'BR<='1'BY<='0'BG<='0'IF S=5 THENSTATE<=C;CLR:='0'EN:='0'ELSE STATE<=B;CLR:='1'EN:='1'END IF;WHEN C=>MR<='1'MY<=

39、'0'MG<='0'BR<='0'BY<='0'BG<='1'IF(SB AND SM)='1'THENIF S=25 THEN STATE<=D;CLR:='0'En:='0'ELSE STATE<=C;CLR:='1'EN:='1'END IF;ELSIF SB ='0' THEN STATE<=D;CLR:='0'EN:='0'ELSE ST

40、ATE<=C;CLR:='1'EN:='1'END IF;WHEN D=>MR<='1'MY<='0'MG<='0'BR<='0'BY<='1'BG<='0'IF S=5 THENSTATE<=A;CLR:='0'EN:='0'ELSE STATE<=D;CLR:='1'EN:='1'END IF;END CASE;END IF;END PROC

41、ESS CNT;END ARCHITECTURE ART;当SB=1、 SM=1时的输出波形：显示译码电路的设计：控制信号输出倒计时以BCD码格式输出，红绿灯亮灭输出根据当前状态决定，每一状态对应相应的亮灭情况。程序中通过一个IF语句实现，EN45,EN25,EN05M,EN05B作为敏感信号。VHDL程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY XSKZ IS PORT(EN45,EN25,EN05M,EN05B:IN STD_LOGIC; AIN45M,AIN45B:IN

42、 STD_LOGIC_VECTOR(7 DOWNTO 0); AIN25M,AIN25B,AIN05:IN STD_LOGIC_VECTOR(7 DOWNTO 0); DOUTM,DOUTB:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END ENTITY XSKZ;ARCHITECTURE ART OF XSKZ ISBEGINPROCESS(EN45,EN25,EN05M,EN05B) ISBEGINIF EN45='1' THEN DOUTM<=AIN45M(7 DOWNTO 0);DOUTB<=AIN45B(7 DOWNTO 0);EL

43、SIF EN05M='1' THENDOUTM<=AIN05(7 DOWNTO 0);DOUTB<=AIN05(7 DOWNTO 0);ELSIF EN25='1' THENDOUTM<=AIN25M(7 DOWNTO 0);DOUTB<=AIN25B(7 DOWNTO 0);ELSIF EN05B='1' THEN DOUTM<=AIN05(7 DOWNTO 0);DOUTB<=AIN05(7 DOWNTO 0);END IF;END PROCESS;END ARCHITECTURE ART;根据输出灯亮的情况，选择数码管输出显示的结果。总原理图：上图为交通灯信号控制器的总原理图，整个系统由5个单元电路组成。其中，交通灯控制器JTDKZ模