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1、adi adsp21375 32位sharc处理器开发评估方案公司的a-21375是高性能 32位浮点sharc处理器,采纳adi公司的超哈佛架构,simd计算架构,工作频率266mhz,集成了众多的音频外设如数字应用接口,s/pdif,串行端口,精密时钟发生器等.主要用在工业控制,仪器仪表,医疗以及专业音响等领域.本文介绍了adsp-21375主要特性, 功能方框图和harc核方框图,以及adsp-21375 ez-kit lite 评估板主要特性, 系统框图, 和材料清单.the adsp-21371/adsp-21375 sharc processors are members of t
2、he simd sharc family of dsps that feature analog devices super harvard architecture. the processors are source code compatible with the adsp-2126x, adsp-2136x, and adsp-2116x dsps, as well as with first generation adsp-2106x sharc processors in sisd (single-instruction, single-data) mode. the proces
3、sors are 32-bit/40-bit floating-point processors optimized for high performance automotive audio applications with their large on-chip sram and mask-programmable rom, multiple internal buses to eliminate i/o bottlenecks, and an innovative digital applications interface (dai).the processors use two c
4、omputational units to deliver a significant performance increase over the previous sharc processors on a range of dsp algorithms. fabricated in a state-of-the-art, high speed, process, the processors achieve an instruction cycle time of 3.75 ns at 266 mhz. with its simd computational hardware, the p
5、rocessors can perform 1.596 gflops running at 266 mhz.adsp-21375主要特性:high performance 32-bit/40-bit floating point processor optimized for high performance audio processingsingle-instruction, multiple-data (simd) computational architectureon-chip memory, adsp-213711m bits of on-chip sram and 4m bits
6、 of on-chip mask-programmable romon-chip memory, adsp-213750.5m bits of on-chipsram and 2m bits of on-chip mask-programmable romcode compatible with all other members of the sharc familythe adsp-21371/adsp-21375 processors are available with a 200/266 mhz core instruction rate with unique audiocentr
7、ic peripherals such as the digital applications interface, s/pdif transceiver, serial ports, precision clock generators, and more.dedicated audio componentsadsp-21371s/pdif-compatible digital audio receiver/transmitteradsp-213718 dual data line serial ports that operate at up to 50 mbps on each data
8、 line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair16 outputs configured as four groups of four outputsrom-based security features includejtag access to memory permitted with a 64-bit keyprotected memory regions that can be assigned to limit access under program control to sensitive codepll has a wide variety of software and hardware multiplier/ divider rati
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