太阳能外文翻译

1、理工学院毕业设计(论文)外文资料翻译专 业： 电气工程及其自动化 姓 名： 齐政勋 学 号： 11L0851088 外文出处： Microcontrollers in Practice -springer (用外文写) 附 件： 1.外文资料翻译译文；2.外文原文。 指导教师评语： 签名： 年 月 日附件1：外文资料翻译译文6使用单片机的定时器这是所有的代码: *MASTER SPI initialization routine . .DEF TEMP1=R16 ;definitions .DEF R_INT=R1 ;use r1 only for this ;interrupt.EQU KT

2、OVF=131 ;constant to load in TCNT0INIT_T0: LDI TEMP1,$03 ; prescaler divide by 64 OUT TCCR0,TEMP1LDI TEMP1,KTOVF ;init TCNT0MOV R_INT,TEMP1 OUT TCNT0,R_INT LDI TEMP1,$02 OUT TIFR,TEMP1 ;clear flag if any OUT TIMSK,TEMP1 ;enable interrupt RET ;end of initializations ;The interrupt service routine sta

3、rts here T0_ISR OUT TCNT0,R_INT ;reload counter . RETI ;return from interruptSX 6.5从一个8-MHz时钟,使用Timer1在输出比较模式生成OC1A 500赫兹时钟周期有50%的进口关税。解决方案 500赫兹时钟,OC1A必须切换快两倍,即在1 khz。TCNT1必须选择时钟初始化序列,通过写作部分(CS12:说:CS10与0:1:0TCCR1B,这对应于一个部门因素为CK 1。除此之外,CTC在TCCR1B必须设置为强制清算TCNT1每次比较匹配。OCR1A寄存器必须初始化8000年,行动在OC1A必须设置为“

4、切换”,通过编写TCCR1A 40美元。终于,比较匹配中断OC1A必须启用通过编写TIMSK 40美元。中断例程只需要清除OCF1A国旗,因为TCNT1是在比较匹配,自动清除和OCR1A初始化后保持不变。6.5特色的计时器系统8051微控制器81上述程序顺序执行的操作是:*MASTER SPI initialization routine.DEF TEMP1=R16 ;definitions.EQU KH=$1F ;higher byte of constant.EQU KL=$40 ;lower byte of constantINIT_T1: LDI TEMP1,$09 ;prescale

5、r divide by 1OUT TCCR1B,TEMP1 ;and CTC1=1LDI TEMP1,$40 ;toggle OC1AOUT TCCR1A,TEMP1LDI TEMP1,KH ;write higher byte first !OUT OCR1AH,TEMP1LDI TEMP1,KLOUT OCR1AL,TEMP1LDI TEMP1,$40 ;clear flagOUT TIFR,TEMP1OUT TIMSK,TEMP1 ;and enable interruptRET6.5特色的计时器系统8051微控制器计时器的8051系列微控制器没有输出和输入捕获特性进行比较。在标准配置中

6、,有两个定时器,名叫Timer0 Timer1,各有作为中央元素一个16位计数器,分别称为T0和T1。这些能够计数、internalor外部时钟,和区域ccessible内部总线的读和写,两个8-bitregisters:TH0-TL0 Timer0唯一的计时器事件报道的CPU是定时器溢出情况。6使用单片机的定时器6.5.1计时器的控制和状态寄存器Timer1可以在三个不同的经营模式和Timer0四模式。控制位的寄存器TMOD选择定时器的操作模式和时钟应用于柜台的结构TMOD详细如下:该寄存器的两个半字节是相同的。低四位是指定时器0，和上半段是指定时器。M1：M0模式选择位。这些位控制定时器的

7、操作模式，如表6.8所述。C / T - 计数器/定时器选择位。C / T =1选择外部时钟的T0为定时器0，或为T1定时器。C / T =0选择具有频率FOSC /12内部时钟。门 - 门控操作控制位。GATE=1计数由一个逻辑高电平输入引脚INTi的启用，与定时器相关GATE=0.Countingisonlyconditioned bytheTRibitinTCON（TimerControl注册）注册。 TCON - 计时器控制寄存器结构如下：TFI - 定时器我溢流FL股份公司。这些位是由硬件设置当计数器在FL OWS，并在相关的中断服务程序的执行被自动清除。 三 - 定时器运行控制。这

8、是设置并通过软件清零开始/停止计数。参照图6.2为这个控制位的效果的描述。ITI，IEI - 这些控制位不相关的定时器系统。8051微控制器83的定时器系统的6.5时代特征该溢流FL AGS TF0，TF1可以产生中断请求，如果中断通过设置位ET0，ET1在启用IE（中断使能）注册。将IE寄存器控制8051的所有可能的中断，并具有以下结构：EA - 全部启用。这是全局中断屏蔽。 EA=0禁止所有中断。 EA=1每个中断可以启用/禁用独立。 ES - 启用串口中断ET1 - 从定时器启用中断。 ET1= 1 FL AG TF1置时产生一个中断请求。 EX1 - 启用从INT1ET0外部中断 -

9、启用定时器0，从（TF0）EX0中断 - 启用从INT0外部中断该定时器的工作6.5.2说明模式0在工作模式0时，计数器Ti为13位宽，与5位TLI，和8位THI。时钟可以是内部（定时器模式）或外部（计数器模式）。的内部或外部时钟之间的选择是由在TMOD寄存器中的C / T间控制位的装置制成。该溢流情况发生在从状态$1FFF至$0000的过渡，并通过设置相应的FL AG TFI1所示。该定时器的工作6.5.3说明模式1描述8051定时器在模式0和1操作逻辑图，提出了图。 6.3。与模式1和模式0，唯一的区别是，在模式1，计数器is16-bitwide，andthe在佛罗里达州owconditi

10、on时仅有一名从状态$ FFFF到0000美元过渡。6使用MCU定时器该定时器的工作6.5.4说明模式2在模式2中，计数器的下半部分（TLI）作为一个8位计数器，而上半部分（THI）充当保存用于TLI的重载值的寄存器。在溢流，写入THI值会自动转移TLI，并继续计数从这个值。为8051定时器的操作模式2中的逻辑图示于图6.4。的时钟源的计数器被选择，如图所示6.2。该定时器的工作6.5.5说明模式3这种操作模式只适用于特定定时器0科幻角在模式3，计数器T0被分成两个8位计数器的时钟不同的计数。下半部，TL0，以类似于模式0的方式，和1，但计数器的长度被限制为8位。在溢流时，FL AG TF0被

11、置位，如果ET0=1时产生中断。 T0的上半部分，称为TH0，就像第二个8位计数器，它计算一个固定频率为fOSC/12时钟。在溢流，TF1被置位，并产生一个中断，如果能ET1=1来产生。在此操作模式定时器的逻辑图示于图 6.58051微控制器85的定时器系统的6.5时代特征6.5.6使用Timer1作为波特率发生器Timer1用于产生用于串行端口的通信时钟。当串口CON音响gured在模式1或3时，波特率由定时器1溢流率决定，根据以下公式（SMOD是第7位在PCON）：当SMOD = 0波特率=（Timer1_Over FL ow_Rate）/ 32当SMOD = 1波特率=（Timer1_O

12、ver FL ow_Rate）/ 16两者的内部或外部时钟源可被选择;这countsistheover FL owrate.Inpractice，fortheusualbaudrates，theuseoftheinternal时钟建议，并进行编程定时器模式2，自动重载的嘛。是所必需的软件的软件initializationsequenceloadsTH1withthereloadvalueandstartsthetimer.Nofurther动作。定时器0可以CON组fi gured在模式3操作，并使用控制信号TF1，TR1，而定时器1作为波特率发生器。相比于AVR和HC11定时器，8051的通

13、用定时器较弱，至少有两个原因：有关报告给CPU计时器的唯一事件是计时器溢流定时器不能直接控制任何的MCU I / O线。这些弊已经于下一代从8051衍生的微控制器的80x52系列包括一个附加的定时器，称为定时器2，解决了这些问题，微控制器被纠正。6.5.7为练习编程定时器8051SX 6.6 Startingfromanoscillatorfrequencyof11.059MHz，writeaninitializationsequence使用定时器1作为波特率发生器为9600波特。解决内部时钟的频率为：FCOUNT = FOSC / 12 = 0.92158MHz。该frequencyofth

14、eUARTclockis：fUART = 16×BAUD_RATE = 16×9600 = 153600Hz。由此产生溢流率定时器是：Timer1_Over FL ow_Rate = FCOUNT / fUART = 6。这给出了定时器的重载值（TH1）= 255-6 + 1 = 250 = 0xFA回应。所需要的其他初始化是指：SMOD（PCON位7）必须设置为1选择操作模式2定时器（M1 = 1，M0 = 0）选择定时器的内部时钟（C / T = 0）启动定时器（TR1 = 1）6使用所涉及的寄存器的MCU定时器产生的值是：PCON=80H，TMOD=20H，并TCON

15、=40H。下面是所需的初始化序列：INIT_T1:MOV PCON,#80H ;SMOD=1MOV TMOD,#20H ;C/T=0, M1=1, M0=0MOV TH1,#0FAH ;auto reload valueMOV TCON,#40H ;TR1=1 - start countingRETSX6.7从20MHz的一个振荡器时钟频率开始，编写初始化序列和中断服务程序精读网络古尔定时器0的操作模式1，产生中断10毫秒的时间间隔。Inoperating模式1，以C / T= 0，T0是16 bitcounter，使用内部时钟的频率fCLOCK= FOSC /12，这对应于一个周期TCLOC

16、K=0.6s。 10000/0.6=16666TCLOCK期间所需的10 msinterval对应stoanumber。要通过在16666期流动，定时器必须从价值计算：65535-16666+1=48870=0BEE6H。所需的其它初始化关心选择在TMOD操作模式1（M1= 0，M 0= 1），并启动定时器，通过设置TR1=1 TCON中。终于初始化序列必须启用aTimer0中断，通过设置位EAand ET0寄存器IE中。中断服务程序必须重新加载在TH0值0BEE6H：TL0。这里是所需的初始化序列：INIT_T0:MOV TMOD,#01H ;C/T=0, M1=0, M0=1, Timer

17、0MOV TH0,#0BEH ;TH0MOV TL0,#0E6H ;TL0MOV TCON,#20H ;TR0=1 - start countingMOV IE,#82H ;enable interruptsRET中断服务程序必须重新加载在TH0初始化值：TL0。由于每个MOV指令需要两个周期来执行，重载值必须由4下降，并成为0BEE2H。MOV TH0,#0BEH ;TH0 MOV TL0,#0E2H ;TL06.6 PWM定时器。操作87 6.6 PWM定时器原则。操作原则一个PWM信号，基本上与占空比信号动态控制。如果此信号通过低通滤波器的滤波器的输出是模拟信号VOUT = K×

18、;A，其中A是在PWM脉冲的幅度，以及K为占空比。这是一种简单而便宜的D / A转换，因而最近微控制器包括专用PWM定时器，或具有设计来产生的PWM信号的能力的主计时器。所述Motorola68HC11 K系列微控制器包括专用PWM定时器，由一个自由运行的递增计数器，PWCNT，其内容有两个可编程寄存器，称为PWPER和PWDTY被永久比较。参阅该定时器的框图，在图呈现 6.6。 PWPER德科幻未列名的输出信号的周期，并PWDTY控制PWM输出的占空比。当计数器PWCNT的内容相匹配PWDTY的内容时，该控制逻辑改变输出信号的极性，并且当PWCNT到达PWPER的值时，计数器被自动清除。寄存

19、器PWCTL包含控制位来选择PWCNT，输出信号的极性与输入时钟的频率，以及使整个PWM系统。 PWM定时器的操作被合成地显示在图6.7。 K系列微控制器68HCHC11包括4个8位PWM通道。这些都可以CON组fi gured为作为两个16位PWM定时器。图呈现的结构的优点。 6.6是，它允许网络连接NE-调谐的输出信号在宽的范围内的时期。在AVR系列单片机采用定时器来产生PWM信号。该PWCNT counteri使用至少significant8,9简单mented，OR 10 TCNT1位。没有PWPER寄存器，使得出放信号的周期可以仅通过选择输入时钟的频率来调节。在PWCNT计数器长度为

20、软件选择，由位PWM11：PWM10手段寄存器TCCR1A。所述PWDTY寄存器的功能由OCR1寄存器执行。不同的的话，当作为PWM操作。6使用MCU定时器计时器，TCNT1被强制为可逆的。它计数从$0000到最高值，由计数器（8,9，或10比特）的长度来确定。当它到达顶部值时，它开始计数下降到零。输出信号的极性被改变在相反的方向，当计数时TCNT1匹配OCR1的价值向上或向下。参照图6.8和6.9的操作的细节PWM定时器AVR。该PWM系统是远高于HC11的较少柔性的，但它是简单和价格便宜，因此，它已在许多AVR微控制器来实现。6.7看门狗定时器看门狗定时器的框图被示于图 6.10。该系统包

21、括一个计数器，从几个具有溢出时间可编程的范围毫秒到几秒钟当看门狗溢出，硬件复位产生6.7看门狗定时器产生如果看门狗被启用，在微控制器上运行的程序必须组织，以便周期性地，在时间间隔超过所述溢流时间短，它重置看门狗计数器，否则会产生一个硬件复位。控制寄存器用于启用看门狗，选择溢出时间，并复位计数器。6.7.1 HC11的看门狗HC11的看门狗系统被称为COP定时器（计算机正常运行定时器）。看门狗溢出时间被选中的控制位的手段CR1：CR0（COP率选择）选项寄存器中，如表6.9。 CR1：CR0只能在第一个64和E时钟周期写入，复位后这个技巧的目的为防止万一节目的看门狗设置无意修改附件2：外文原文（

22、复印件）80 6 Using the MCU TimersHere is the code to does all this:*MASTER SPI initialization routine.DEF TEMP1=R16 ;definitions.DEF R_INT=R1 ;use r1 only for this;interrupt.EQU KTOVF=131 ;constant to load in TCNT0INIT_T0: LDI TEMP1,$03 ; prescaler divide by 64OUT TCCR0,TEMP1LDI TEMP1,KTOVF ;init TCNT0M

23、OV R_INT,TEMP1OUT TCNT0,R_INTLDI TEMP1,$02OUT TIFR,TEMP1 ;clear flag if anyOUT TIMSK,TEMP1 ;enable interruptRET ;end of initializations;The interrupt service routine starts hereT0_ISR OUT TCNT0,R_INT ;reload counter.RETI ;return from interruptSX 6.5Starting from an 8-MHz clock, use Timer1 in output

24、compare mode to generate onOC1A a 500-Hz clock having 50% duty cycle.SolutionFor a 500-Hz clock, OC1A must toggle two times faster, i.e. at 1 KHz. Theinitialization sequence must select the clock for TCNT1, by writing the bitsCS12:CS11:CS10 in TCCR1B with 0:1:0, which corresponds to a division facto

25、rof 1 f or CK.Besides that, the CTC bit in TCCR1B must be set to force clearing of TCNT1after each compare match. The OCR1A register must be initialized with 8000, andthe action upon OC1A must be set to toggle, by writing $40 in TCCR1A.Finaly, the compare match interrupt for OC1A must be enabled by

26、writing $40in TIMSK. The interrupt routine is only needed to clear the OCF1A flag, becauseTCNT1 is automatically cleared at compare match, and OCR1A remains unchangedafter initializationThe program sequence that executes the operations mentioned above is:*MASTER SPI initialization routine.DEF TEMP1=

27、R16 ;definitions.EQU KH=$1F ;higher byte of constant.EQU KL=$40 ;lower byte of constantINIT_T1: LDI TEMP1,$09 ;prescaler divide by 1OUT TCCR1B,TEMP1 ;and CTC1=1LDI TEMP1,$40 ;toggle OC1AOUT TCCR1A,TEMP1LDI TEMP1,KH ;write higher byte first !OUT OCR1AH,TEMP1LDI TEMP1,KLOUT OCR1AL,TEMP1LDI TEMP1,$40 ;

28、clear flagOUT TIFR,TEMP1OUT TIMSK,TEMP1 ;and enable interruptRET6.5 Distinctive Features of the Timer Systemof the 8051 MicrocontrollersThe timer of the 8051 family of microcontrollers does not have the output compareand the input capture features. In the standard configuration, there are two timers

29、,named Timer0 and Timer1, each having as central element a 16-bit counter, calledT0 and T1, respectively.These are capable of counting, on an internal or external clock, and are accessiblefrom the internal bus f or read and write, as two 8-bit registers: TH0TL0 for Timer0,TH1TL1 for Timer1.The only

30、event reported by timers to the CPU is the timer overflow condition.The logic diagram of the circuit for the clock selection and control is presentedin the Fig. 6.2 82 6 Using the MCU Timers6.5.1 The Control and Status Registers of the TimerTimer1 can operate in three distinct modes and Timer0 in fo

31、ur modes. The controlbits in register TMOD select the timer operating mode and the clock applied to thecounter. The structure of TMOD is detailed below:The two nibbles of this register are identical. The lower nibble refers to Timer0,and the upper nibble refers to Timer1.M1:M0 Mode select bits. Thes

32、e bits control the operating mode of the timer asdescribed in Table 6.8ped C/T Counter/Timer select bit.C/T = 1 selects the external clock applied on T0 for Timer0, or T1 for Timer1.C/T = 0 selects an internal clock having the frequency fOSC/12. GATE Gated operation control bit.GATE = 1 Counting is

33、enabled by a logic level HIGH on the input pin INTi,associated with the timerGATE = 0. Counting is only conditioned by the TRi bit in TCON (Timer ControlRegister) register.TCON The timer control register has the following structure: TFi Timer i overflow flag. These bits are set by hardware when the

34、counteroverflows, and are automatically cleared at the execution of the associated interrupt service routine. TRi Timer Run control. This is set and cleared by software to start/stop counting. Refer to Fig. 6.2 for a description of the effect of this control bit. ITI, IEi These control bits are not

35、related to the timer system6.5 Distinctive Features of the Timer System of the 8051 Microcontrollers The overflow flags TF0, TF1 can generate interrupt requests, if the interrupts areenabled by setting the bits ET0, ET1 in the IE (Interrupt Enable) register. The IEregister controls all the possible

36、interrupts of 8051 and has the following structure: EA Enable All. This is the global interrupt mask.EA = 0 all interrupts are disabled.EA = 1 each interrupt can be enabled/disabled individually. ES Enable Serial Port InterruptET1 Enable interrupts from Timer1.ET1 = 1 The flag TF1 generates an inter

37、rupt request when set. EX1 Enable external interrupts from INT1 ET0 Enable interrupts from Timer0 (TF0) EX0 Enable external interrupts from INT06.5.2 Description of the Timer Operating Mode 0In operating mode 0, the counter Ti is 13-bits wide, with 5 bits in TLi, and 8 bitsin THi. The clock can be e

38、ither internal (timer mode) or external (counter mode).Selection between the internal or external clock is made by means of the C/T controlbit in the TMOD register.The overflow condition occurs at the transition from status $1FFF to $0000, andis indicated by setting the corresponding flag TFi to 1.6

39、.5.3 Description of the Timer Operating Mode 1The logical diagram describing the 8051 timers operating in modes 0 and 1 is presented in Fig. 6.3. The only difference between mode 1 and mode 0 is that, in mode1, the counter is 16-bit wide, and the overflow condition occurs at the transition fromstatu

40、s $FFFF to $0084 6 Using the MCU Timers6.5.4 Description of the Timer Operating Mode 2In mode 2, the lower half of the counter (TLi) operates as an 8-bit counter, while theupper half (THi) acts as a register that holds the reload value for TLi.At overflow, the value written to THi is automatically t

41、ransferred in TLi, andcounting continues from this value. The logic diagram for the operating mode 2 ofthe 8051 timer is presented in Fig. 6.4. The clock source for the counter is selectedas shown in Fig. Description of the Timer Operating Mode 3This operating mode is specific only for Time

42、r0. In mode 3, the counter T0 is splitinto two 8-bit counters that count on different clocks. The lower half, TL0, operatesin a way similar to modes 0, and 1, but the length of the counter is limited to 8 bits.At overflow, the flag TF0 is set, and an interrupt is generated if ET0 = 1.The upper half

43、of T0, called TH0, acts like a second 8-bit counter, which countsa fixed frequency fOSC/12 clock. At overflow, TF1 is set, and an interrupt can begenerated if ET1 = 1. The logic diagram of the timer in this operating mode ispresented in Fig. Description of the Timer Operating Mode 3This ope

44、rating mode is specific only for Timer0. In mode 3, the counter T0 is splitinto two 8-bit counters that count on different clocks. The lower half, TL0, operatesin a way similar to modes 0, and 1, but the length of the counter is limited to 8 bits.At overflow, the flag TF0 is set, and an interrupt is

45、 generated if ET0 = 1.The upper half of T0, called TH0, acts like a second 8-bit counter, which countsa fixed frequency fOSC/12 clock. At overflow, TF1 is set, and an interrupt can begenerated if ET1 = 1. The logic diagram of the timer in this operating mode ispresented in Fig. Using Timer1

46、 as a Baud Rate GeneratorTimer1 is used to generate the communication clock for the serial port. When theserial port is configured in mode 1 or 3, the baud rate is determined by the Timer1overflow rate, according to the following formulas (SMOD is bit 7 in PCON):When SMOD = 0 Baud = (Timer1_Overflow

47、_Rate)/32When SMOD = 1 Baud = (Timer1_Overflow_Rate)/16Both internal or external clock sources may be selected; the only thing thatcounts is the overflow rate. In practice, for the usual baud rates, the use of the internalclock is recommended, and to program Timer1 in mode 2, autoreload. The softwar

48、einitialization sequence loads TH1 with the reload value and starts the timer. No furtheraction is required for the software.Timer0 can be configured to operate in mode 3, and use the control signals TF1,TR1, while Timer1 is used as baud rate generator.Compared to the AVR and HC11 timers, the genera

49、l-purpose timer of the 8051is weaker, for at least two reasons: The only event related to the timer reported to the CPU is timer overflow The timer cannot directly control any of the MCU I/O lines.These minuses have been corrected in the next generation of microcontrollersderived from 8051. The 80x5

50、2 family of microcontrollers includes an additionaltimer, called Timer2, which solves these problems.6.5.7 Exercises for Programming the 8051 TimerSX 6.6Starting from an oscillator frequency of 11.059 MHz, write an initialization sequenceto use Timer1 as a baud rate generator for 9600 baud.SolutionT

51、he frequency of the internal clock is: fCOUNT = fOSC/12 = 0.92158 MHz. Thefrequency of the UART clock is: fUART = 16×Baud_rate = 16×9600 = 153 600 Hz.The resulting overflow rate for Timer1 is:Timer1_Overflow_Rate = fCOUNT/ fUART = 6 .This gives the reload value for Timer1:(TH1) = 255 6 + 1

52、 = 250 = 0xFA .The other initializations required refer to: SMOD (bit 7 of PCON) must be set to 1 Select operating mode 2 for Timer1 (M1 = 1, M0 = 0) Select the internal clock for Timer1 (C/T = 0) Start the timer (TR1 = 1)The resulting values for the registers involved are: PCON = 80h, TMOD = 20h,an

53、d TCON = 40h.Here is the initialization sequence required:INIT_T1:MOV PCON,#80H ;SMOD=1MOV TMOD,#20H ;C/T=0, M1=1, M0=0MOV TH1,#0FAH ;auto reload valueMOV TCON,#40H ;TR1=1 - start countingRETSX6.7Starting from an oscillator clock frequency of 20 MHz, write the initialization sequence and the interru

54、pt service routine to configure Timer0 in operating mode 1, togenerate interrupts at 10-ms intervals.SolutionIn operating mode 1, with C/T = 0, T0 is a 16-bit counter, using the internal clock witha frequency of fCLOCK = fOSC/12, which corresponds to a period TCLOCK = 0.6 µs.The required 10-ms

55、interval corresponds to a number of 10 000/0.6 = 16 666 TCLOCKperiods. To overflow in 16 666 periods, the timer must start counting at the value:65 535 16 666 + 1 = 48 870 = 0BEE6H.The other initializations required concern selecting the operating mode 1 (M1 =0, M0 = 1) in TMOD, and starting the timer, by setting TR1 = 1 in TCON. Finallythe initialization sequence must enable a Timer0 interrupt, by setting the bits EA andET0 in register IE. The interrupt service routine must reload the value 0BEE6H inTH0:TL0.Here is the required initialization sequen