芯片手册手环硬件资料芯片手册lis3dh_W

1、LIS3DHMEMS digital output motion sensor ultra low-power high performance 3-axes “nano” accelerometerMay 2010Doc ID 17530 Rev 11/42Features Wide supply voltage, 1.71 V to 3.6 V Independent IOs supply (1.8 V) and supply voltage compatible Ultra low-power mode consumption down to 2 A 2g/4g/8g

2、/16g dynamically selectable full- scale I2C/SPI digital output interface 16 bit data output 2 independent programmable interrupt generators for free-fall and motion detection 6D/4D orientation detection Free-fall detection Motion detection Embedded temperature sensor Embedded self-test Embedded 96 l

3、evels of 16 bit data output FIFO 10000 g high shock survivability ECOPACK RoHS and “Green” compliantApplications Motion activated functions Free-fall detection Click/double click recognition Intelligent power saving for handheld devices Pedometer Display orientation Gaming and virtual reality input

4、devices Impact recognition and logging Vibration monitoring and compensationDescriptionThe LIS3DH is an ultra low-power high performance three axes linear accelerometerbelonging to the “nano” family, with digital I2C/SPI serial interface standard output. The device features ultra low-power operation

5、al modes that allow advanced power saving and smart embedded functions.LGA-16 (3x3x1 mm)The LIS3DH has dynamically user selectable full scales of 2g/4g/8g/16g and it is capable of measuring accelerations with output data rates from 1 Hz to 5 kHz. The self-test capability allows the user to check the

6、 functioning of the sensor in the final application. The device may be configured to generate interrupt signals by two independent inertial wake-up/free-fall events as well as by the position of the device itself.Thresholds and timing of interrupt generators are programmable by the end user on the f

7、ly. The LIS3DH has an integrated 32-level first in, first out (FIFO) buffer allowing the user to store data for host processor intervention reduction. The LIS3DH is available in small thin plastic land grid array package (LGA) and it is guaranteed to operate over an extended temperature range from-4

8、0 C to +85 C.Table 1.Device summaryOrder codesTemp. range CPackagePackagingLIS3DH-40 to +85LGA-16TrayLIS3DHTR-40 to +85LGA-16Tape and reelContentsLIS3DHContents2/42Doc ID 17530 Rev 11 Block diagram and pin description81.1 Block diagram81.2 Pin description82 Mechanical and electrical specifications10

9、2.1 Mechanical characteristics102.2 Temperature sensor characteristics112.3 Electrical characteristics112.4 Communication interface characteristics122.4.1 SPI - serial peripheral interface122.4.2 I2C - Inter IC control interface132.5 Absolute maximum ratings143 Terminology and functionality153.1 Ter

10、minology153.1.1 Sensitivity153.1.2 Zero-g level153.2 Functionality153.2.1 Normal mode, low power mode153.2.2 Self-test163.2.3 6D / 4D orientation detection163.3 Sensing element163.4 IC interface163.5 Factory calibration173.6 FIFO173.7 Auxiliary ADC174 Application hints184.1 Soldering information185

11、Digital main blocks195.1 FIFO195.1.1 Bypass mode195.1.2 FIFO mode195.1.3 Stream mode195.1.4 Stream-to-FIFO mode195.1.5 Retrieve data from FIFO196 Digital interfaces206.1 I2C serial interface206.1.1 I2C operation216.2 SPI bus interface226.2.1 SPI read236.2.2 SPI write246.2.3 SPI read in 3-wires mode2

12、57 Register mapping268 Registers description288.1 STATUS_AUX (07h)288.2OUT_1_L (08h), OUT_1_H (09h)288.3OUT_2_L (0Ah), OUT_2_H (0Bh)288.4OUT_3_L (0Ch), OUT_3_H (0Dh)288.5 INT_COUNTER (0Eh)298.6 WHO_AM_I (0Fh)298.7 TEMP_CFG_REG (1Fh)298.8CTRL_REG1 (20h)298.9CTRL_REG2 (21h)308.10CTRL_REG3 (22h)318.11C

13、TRL_REG4 (23h)318.12CTRL_REG5 (24h)328.13CTRL_REG6 (25h)328.14 REFERENCE/DATACAPTURE (26h)328.15 STATUS_REG (27h)338.16OUT_X_L (28h), OUT_X_H (29h)338.17 OUT_Y_L (2Ah), OUT_Y_H (2Bh)338.18 OUT_Z_L (2Ch), OUT_Z_H (2Dh)338.19 FIFO_CTRL_REG (2Eh)34Doc ID 17530 Rev 13/428.20 FIFO_SRC_REG (2Fh)348.21INT1

14、_CFG (30h)348.22INT1_SRC (31h)358.23INT1_THS (32h)368.24 INT1_DURATION (33h)368.25 CLICK_CFG (38h)368.26 CLICK_SRC (39h)378.27 CLICK_THS (3Ah)388.28 TIME_LIMIT (3Bh)388.29 TIME_LATENCY (3Ch)388.30 TIME WINDOW(3Dh)389 Package information3910 Revision history414/42Doc ID 17530 Rev 1LIS3DHList of figur

15、esList of figuresFigure 1.Block diagram8Figure 2.Pin connection8Figure 3.SPI slave timing diagram12Figure 4.I2C Slave timing diagram13Figure 5.LIS3DH electrical connection18Figure 6.Read and write protocol22Figure 7.SPI read protocol23Figure 8.Multiple bytes SPI read protocol (2 bytes example)24Figu

16、re 9.SPI write protocol24Figure 10.Multiple bytes SPI write protocol (2 bytes example)24Figure 11.SPI read protocol in 3-wires mode25Figure 12.LGA-16: Mechanical data and package dimensions40Doc ID 17530 Rev 15/42List of tablesLIS3DHList of tablesTable 1.Device summary1Table 2.Pin description9Table

17、3.Mechanical characteristics10Table 4.Temperature sensor characteristics11Table 5.Electrical characteristics11Table 6.SPI slave timing values12Table 7.I2C slave timing values13Table 8.Absolute maximum ratings14Table 9.Operating mode selection15Table 10.Serial interface pin description20Table 11.Seri

18、al interface pin description20Table 12.SAD+Read/Write patterns21Table 13.Transfer when master is writing one byte to slave21Table 14.Transfer when master is writing multiple bytes to slave21Table 15.Transfer when master is receiving (reading) one byte of data from slave22Table 16.Transfer when maste

19、r is receiving (reading) multiple bytes of data from slave22Table 17.Register address map26Table 18.STATUS_REG_AUX register28Table 19.STATUS_REG_AUX description28Table 20.INT_COUNTER register29Table 21.WHO_AM_I register29Table 22.TEMP_CFG_REG register29Table 23.TEMP_CFG_REG description29Table 24.CTR

20、L_REG1 register29Table 25.CTRL_REG1 description29Table 26.Data rate configuration30Table 27.CTRL_REG2 register30Table 28.CTRL_REG2 description30Table 29.High pass filter mode configuration31Table 30.CTRL_REG3 register31Table 31.CTRL_REG3 description31Table 32.CTRL_REG4 register31Table 33.CTRL_REG4 d

21、escription31Table 34.Self test mode configuration32Table 35.CTRL_REG5 register32Table 36.CTRL_REG5 description32Table 37.CTRL_REG6 register32Table 38.REFERENCE register32Table 39.REFERENCE register description33Table 40.STATUS register33Table 41.STATUS register description33Table 42.REFERENCE regist

22、er34Table 43.REFERENCE register description34Table 44.FIFO mode configuration34Table 45.FIFO_SRC register34Table 46.INT1_CFG register34Table 47.INT1_CFG description34Table 48.Interrupt mode356/42Doc ID 17530 Rev 1LIS3DHList of tablesTable 49.INT1_SRC register35Table 50.INT1_SRC description35Table 51

23、.INT1_THS register36Table 52.INT1_THS description36Table 53.INT1_DURATION register36Table 54.INT1_DURATION description36Table 55.CLICK_CFG register36Table 56.CLICK_CFG description37Table 57.CLICK_SRC register37Table 58.CLICK_SRC description37Table 59.CLICK_THS register38Table 60.CLICK_SRC descriptio

24、n38Table 61.TIME_LIMIT register38Table 62.TIME_LIMIT description38Table 63.TIME_LATENCY register38Table 64.TIME_LATENCY description38Table 65.TIME_WINDOW register38Table 66.TIME_WINDOW description38Table 67.LGA-16: Mechanical data40Table 68.Document revision history41Doc ID 17530 Rev 17/42Block diag

25、ram and pin descriptionLIS3DH1 Block diagram and pin description1.1 Block diagramY+Z+CHARGE AMPLIFIER MUXZ-Y-X-X+aCS SCL/SPCSDA/SDO/SDIADC1- ADCInput1 ADC2- ADCInput2ADC3- ADCInput3SDO/SA0INT1INT2CONTROLLOGIC& INTERRUPTGEN.A/D CONVERTER2I2C SPICONTROL LOGICA/D CONVERTER1TEMPERATURE SENSORFigure 1.Bl

26、ock diagramSELF TESTREFERENCETRIMMING CIRCUITSCLOCK96 Level FIFO1.2 Pin description1 Vdd_IO NC NCSCL/SPC5 GND9131Z(BOTTOM VIEW)(TOP VIEW)DIRECTION OF THE DETECTABLE ACCELERATIONSYADC3 GND INT1 RESINT2XPin 1 indicatorVddADC2 ADC1Figure 2.Pin connectionCS SDO/SA0SDA/SDI/SDO8/42Doc ID 17530 Rev 1LIS3DH

27、Block diagram and pin descriptionTable 2.Pin descriptionPin#NameFunction1Vdd_IOPower supply for I/O pins2NCNot connected3NCNot connected4SCL SPCI2C serial clock (SCL)SPI serial port clock (SPC)5GND0V supply6SDA SDI SDOI2C serial data (SDA)SPI serial data input (SDI)3-wire interface serial data outpu

28、t (SDO)7SDO SA0SPI serial data output (SDO)I2C less significant bit of the device address (SA0)8CSSPI enableI2C/SPI mode selection (1: I2C mode; 0: SPI enabled)9INT2Inertial interrupt 210RESConnect to GND11INT1Inertial interrupt 112GND0 V supply13ADC3Analog to digital converter input 314VddPower sup

29、ply15ADC2Analog to digital converter input 216ADC1Analog to digital converter input 1Doc ID 17530 Rev 19/42Mechanical and electrical specificationsLIS3DH2 Mechanical and electrical specifications2.1 Mechanical characteristicsVdd = 2.5 V, T = 25 C unless otherwise noted (a)Table 3.Mechanical characte

30、risticsSymbolParameterTest conditionsMin.Typ.(1)Max.UnitFSMeasurement range(2)FS bit set to 002.0FS bit set to 014.0FS bit set to 108.0FS bit set to 1116.0gSoSensitivityFS bit set to 001mg/digitFS bit set to 012mg/digitFS bit set to 104mg/digitFS bit set to 1112mg/digitTCSoSensitivity change vs temp

31、eratureFS bit set to 000.01%/CTyOffTypical zero-g level offset accuracy(3),(4)FS bit set to 0040mgTCOffZero-g level change vs temperatureMax delta from 25 C0.5mg/CAnAcceleration noise densityFS bit set to 00, Normal Mode (Table 9), ODR = 100Hz220ug/sqrt(H z)VstSelf-testoutput change(5),(6),(7)FS bit

32、 set to 00X axis276LSbFS bit set to 00Y axis276LSbFS bit set to 00Z axis984LSbTopOperating temperature range-40+85C1. Typical specifications are not guaranteed.2. Verified by wafer level test and measurement of initial offset and sensitivity.3. Typical zero-g level offset value after MSL3 preconditi

33、oning.4. Offset can be eliminated by enabling the built-in high pass filter.5. The sign of “Self-test output change” is defined by CTRL_REG4 STsign bit, for all axes.6. Self-test output changes with the power supply. “Self-test output change” is defined as OUTPUTLSb(CTRL_REG4 ST bit=1) - OUTPUTLSb(C

34、TRL_REG4 ST bit=0). 1LSb=1mg, 2 g Full-scale.7. Output data reach 99% of final value after 1 ms when enabling self-test mode, due to device filtering.a. The product is factory calibrated at 2.5 V. The operational power supply range is from 1.71V to 3.6 V.10/42Doc ID 17530 Rev 1LIS3DHMechanical and e

35、lectrical specifications2.2 Temperature sensor characteristicsVdd =2.5 V, T=25 C unless otherwise noted (b)Table 4.Temperature sensor characteristicsSymbolParameterTest conditionMin.Typ.(1)Max.UnitTSDrTemperature sensor output change vs temperature1digit/C(2)TODRTemperature refresh rateODRHzTopOpera

36、ting temperature range-40+85C1. Typical specifications are not guaranteed.2. 8-bit resolution.2.3 Electrical characteristicsVdd = 2.5 V, T = 25 C unless otherwise noted (c)Table 5.Electrical characteristicsSymbolParameterTest conditionsMin.Typ.(1)Max.UnitVddSupply voltage1.712.53.6VVdd_IOI/O pins su

37、pply voltage(2)1.71Vdd+0.1VIddCurrent consumption in normal mode50 Hz ODR11AIddCurrent consumption in normal mode1 Hz ODR2AIddLPCurrent consumption in low-power mode50 Hz ODR6AIddPdnCurrent consumption in power-down mode0.5AVIHDigital high level input voltage0.8*Vdd_IOVVILDigital low level input vol

38、tage0.2*Vdd_IOVVOHHigh level output voltage0.9*Vdd_IOVVOLLow level output voltage0.1*Vdd_IOVBWSystem bandwidth(3)ODR/2HzTonTurn-on time(4)ODR = 100 Hz1msTopOperating temperature range-40+85C1. Typical specification are not guaranteed.2. It is possible to remove Vdd maintaining Vdd_IO without blockin

39、g the communication busses, in this condition the measurement chain is powered off.3. Referred to Table 25 for the ODR value and configuration.4. Time to obtain valid data after exiting power-down mode.b. The product is factory calibrated at 2.5 V.c. The product is factory calibrated at 2.5 V. The o

40、perational power supply range is from 1.71 V to 3.6 V.Doc ID 17530 Rev 111/42Mechanical and electrical specificationsLIS3DH2.4 Communication interface characteristics2.4.1 SPI - serial peripheral interfaceSubject to general operating conditions for Vdd and Top.Table 6.SPI slave timing valuesSymbolPa

41、rameterValue (1)UnitMinMaxtc(SPC)SPI clock cycle100nsfc(SPC)SPI clock frequency10MHztsu(CS)CS setup time6nsth(CS)CS hold time8tsu(SI)SDI input setup time5th(SI)SDI input hold time15tv(SO)SDO valid output time50th(SO)SDO output hold time9tdis(SO)SDO output disable time50(3)LSB OUTMSB OUTSDO (3)tdis(S

42、O)th(SO)tv(SO)(3)LSB INMSB INSDI(3)th(SI)tsu(SI)(3)SPC (3)th(CS)tc(SPC)tsu(CS)(3)(3)CSFigure 3.SPI slave timing diagramNote:1Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production.2 Measurement points are done at 0

43、.2Vdd_IO and 0.8Vdd_IO, for both Input and output port.3 When no communication is on-going, data on CS, SPC, SDI and SDO are driven by internal pull-up resistors.12/42Doc ID 17530 Rev 1LIS3DHMechanical and electrical specifications2.4.2 I2C - Inter IC control interfaceSubject to general operating co

44、nditions for Vdd and top.Table 7.I2C slave timing valuesSymbolParameterI2C standard mode (1)I2C fast mode (1)UnitMinMaxMinMaxf(SCL)SCL clock frequency01000400kHztw(SCLL)SCL clock low time4.71.3stw(SCLH)SCL clock high time4.00.6tsu(SDA)SDA setup time250100nsth(SDA)SDA data hold time0.013.450.010.9str

45、(SDA) tr(SCL)SDA and SCL rise time100020 + 0.1Cb (2)300nstf(SDA) tf(SCL)SDA and SCL fall time30020 + 0.1Cb (2)300th(ST)START condition hold time40.6stsu(SR)Repeated START condition setup time4.70.6tsu(SP)STOP condition setup time40.6tw(SP:SR)Bus free time between STOP and START condition4.71.31. Dat

46、a based on standard I2C protocol requirement, not tested in production.2. Cb = total capacitance of one bus line, in pF.f(SCL)r(SCL)w(SCLH)h(ST) w(SCLL)SCLSTOPsu(SP)h(SDA)su(SDA)r(SDA)f(SDA)STARTw(SP:SR)SDAsu(SR)STARTREPEATED STARTFigure 4.I2C Slave timing diagramNote:Measurement points are done at

47、0.2Vdd_IO and 0.8Vdd_IO, for both port.Doc ID 17530 Rev 113/42Mechanical and electrical specificationsLIS3DH2.5 Absolute maximum ratingsStresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the dev

48、ice under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.Table 8. Absolute maximum ratingsSymbolRatingsMaximum valueUnitVddSupply voltage-0.3 to 4.8VVdd_IOI/O pins Supply voltage-0.3 to 4.8VVinInput voltage on any control pin

49、(CS, SCL/SPC, SDA/SDI/SDO, SDO/SA0)-0.3 to Vdd_IO +0.3VAPOWAcceleration (any axis, powered, Vdd = 2.5 V)3000 for 0.5 msg10000 for 0.1 msgAUNPAcceleration (any axis, unpowered)3000 for 0.5 msg10000 for 0.1 msgTOPOperating temperature range-40 to +85CTSTGStorage temperature range-40 to +125CESDElectro

50、static discharge protection2 (HBM)kVNote:Supply voltage on any pin should never exceed 4.8 VThis is a mechanical shock sensitive device, improper handling can cause permanent damages to the part.This is an ESD sensitive device, improper handling can cause permanent damages to the part.14/42Doc ID 17

51、530 Rev 1LIS3DHTerminology and functionality3 Terminology and functionality3.1 Terminology3.1.1 SensitivitySensitivity describes the gain of the sensor and can be determined e.g. by applying 1 g acceleration to it. As the sensor can measure DC accelerations this can be done easily by pointing the axis of interest towards the center of the earth, noting the output value, rotating the sensor by 180 degrees (pointing to the sky) and noting the output value again.