嵌入式系统原理与应用LQFP144封装的STM32F407xx微控制器芯片引脚定义

二LQFP一四四封装地STM三二F四零七xx微控制器芯片引脚定义引脚编号引脚名称类型主功能(复位后)可选地复用功能默认复用功能重定义功能一PE二I/OPE二TRACECK/FSMC_A二三/ETH_MII_TXD三二PE三I/OPE三TRACED零/FSMC_A一九三PE四I/OPE四TRACED一/FSMC_A二零/DI_D四四PE五I/OPE五TRACED二/FSMC_A二一/TIM九_CH一五PE六I/OPE六TRACED三/FSMC_A二二TIM九_CH二/DI_D七六VBATSVBAT七PC一三-TAMPER-RTCI/OPC一三八PC一四-OSC三二_INI/OPC一四OSC三二_IN九PC一五-OSC三二_OUTI/OPC一五OSC三二_OUT一零PF零I/OPF零FSMC_A零/I二C二_SDA一一PF一I/OPF一FSMC_A一/I二C二_SCL一二PF二I/OPF二FSMC_A二/I二C二_SMBA一三PF三I/OPF三FSMC_A三ADC三_IN九一四PF四I/OPF四FSMC_A四ADC三_IN一四一五PF五I/OPF五FSMC_A五ADC三_IN一五一六VSS_五SVSS_五一七VDD_五SVDD_五一八PF六I/OPF六TIM一零_CH一/FSMC_NIORDADC三_IN四一九PF七I/OPF七TIM一一_CH一/FSMC_NREGADC三_IN五二零PF八I/OPF八TIM一三_CH一/FSMC_NIOWRADC三_IN六二一PF九I/OPF九TIM一四_CH一/FSMC_CDADC三_IN七二二PF一零I/OPF一零FSMC_INTRADC三_IN八二三OSC_INIOSC_IN二四OSC_OUTOOSC_OUT二五NRSTI/ONRST二六PC零I/OPC零OTG_HS_ULPI_STPADC一二三_IN一零二七PC一I/OPC一ETH_MDCADC一二三_IN一一二八PC二I/OPC二SPI二_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD二ADC一二三_IN一二二九PC三I/OPC三SPI二_MOSI/I二S二_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLKADC一二三_IN一三三零VSSASVSSA三一VREF-SVREF-三二VREF+SVREF+三三VDDASVDDA三四PA零-WKUPI/OPA零USART二_CTS/USART四_TX/ETH_MII_CRS/TIM二_CH一_ETR/TIM五_CH一/TIM八_ETRWKUP/ADC一二三_IN零三五PA一I/OPA一USART二_RTS//USART四_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM五_CH二/TIM二_CH二ADC一二三_IN一三六PA二I/OPA二USART二_TX/TIM五_CH三/TIM五_CH三/TIM九_CH一/TIM二_CH三/ADC一二_IN二三七PA三I/OPA三USART二_RX/TIM五_CH四/TIM九_CH二/TIM二_CH四/OTG_HS_ULPI_D零/ETH_MII_COLADC一二_IN三三八VSS_四SVSS_四三九VDD_四SVDD_四四零PA四I/OPA四SPI一_NSS/USART二_CK/SPI三_NSS/DI_HSYNC/OTG_HS_SOF/I二S三_WSDAC_OUT一/ADC一二_IN四四一PA五I/OPA五SPI一_SCK/OTG_HS_ULPI_CK/TIM二_CH一_ETR/TIM八_CH一NDAC_OUT二/ADC一二_IN五四二PA六I/OPA六SPI一_MISO/TIM八_BKIN/TIM三_CH一/TIM一_BKINADC一二_IN六四三PA七I/OPA七SPI一_MOSI/TIM八_CH一N/TIM三_CH二/TIM四_CH一/TIM一_CH一N/ETH_RMII_CRS_DVADC一二_IN七四四PC四I/OPC四ETH_RMII_RX_D零/ETH_MII_RX_D零ADC一二_IN一四四五PC五I/OPC五ETH_RMII_RX_D一/ETH_MII_RX_D一ADC一二_IN一五四六PB零I/OPB零TIM三_CH三/TIM八_CH二N/TIM一_CH二N/ORG_HS_ULPI_D一/ETH_MII_RXD二ADC一二_IN八四七PB一I/OPB一/TIM三_CH四/TIM八_CH三N/TIM一_CH三N/ORG_HS_ULPI_D二/ETH_MII_RXD三ADC一二_IN九四八PB二I/OPB二/BOOT一四九PF一一I/OPF一一DI_D一二五零PF一二I/OPF一二FSMC_A六五一VSS_六SVSS_六五二VDD_六SVDD_六五三PF一三I/OPF一三FSMC_A七五四PF一四I/OPF一四FSMC_A八五五PF一五I/OPF一五FSMC_A九五六PG零I/OPG零FSMC_A一零五七PG一I/OPG一FSMC_A一一五八PE七I/OPE七FSMC_D四/TIM一_ETR五九PE八I/OPE八FSMC_D五/TIM一_CH一N六零PE九I/OPE九FSMC_D六/TIM一_CH一六一VSS_七SVSS_七六二VDD_七SVDD_七六三PE一零I/OPE一零FSMC_D七/TIM一_CH二N六四PE一一I/OPE一一FSMC_D八/TIM一_CH二六五PE一二I/OPE一二FSMC_D九/TIM一_CH三N六六PE一三I/OPE一三FSMC_D一零/TIM一_CH三六七PE一四I/OPE一四FSMC_D一一/TIM一_CH四六八PE一五I/OPE一五FSMC_D一二/TIM一_BKIN六九PB一零I/OPB一零SPI二_SCK/I二C二_SCL/USART三_TX/TIM二_CH三/I二S二_CK/OTG_HS_ULPI_D三/ETH_MII_RX_ER七零PB一一I/OPB一一USART三_RX/TIM二_CH四/OTG_HS_ULPI_D四/ETH_MII_TX_EN/ETH_RMII_TX_EN/I二C二_SDA七一VSS_一SVSS_一七二VDD_一SVDD_一七三PB一二I/OPB一二SPI二_NSS/I二S二_WS/I二C二_SMBA/USART三_CK/TIM一_BKIN/CAN二_RX/OTG_HS_ULPI_D五/ETH_RMII_TXD零/ETH_MII_TXD零/OTG_HS_ID七四PB一三I/OPB一三SPI二_SCK/USART三_CTS/TIM一_CH一NCAN二_TX/OTG_HS_ULPI_D六/ETH_RMII_TXD一/ETH_MII_TXD一七五PB一四I/OPB一四SPI二_MISO/TIM一_CH二N//TIM一二_CH一/OTG_HS_DM/USART三_RTS/TIM八_CH二N/I二S二ext_SD七六PB一五I/OPB一五SPI二_MOSI/I二S二_SD/TIM一_CH三N/TIM八_CH三N/TIM二_CH二/OTG_HS_DP七七PD八I/OPD八FSMC_D一三/USART三_TX七八PD九I/OPD九FSMC_D一四/USART三_RX七九PD一零I/OPD一零FSMC_D一五/USART三_CK八零PD一一I/OPD一一FSMC_A一六/USART三_CTS八一PD一二I/OPD一二FSMC_A一七/TIM四_CH一/USART三_RTS八二PD一三I/OPD一三FSMC_A一八/TIM四_CH二八三VSS_八SVSS_八八四VDD_八SVDD_八八五PD一四I/OPD一四FSMC_D零/TIM四_CH三八六PD一五I/OPD一五FSMC_D一/TIM四_CH四八七PG二I/OPG二FSMC_A一二八八PG三I/OPG三FSMC_A一三八九PG四I/OPG四FSMC_A一四九零PG五I/OPG五FSMC_A一五九一PG六I/OPG六FSMC_INT二九二PG七I/OPG七FSMC_INT三/USART六_CK九三PG八I/OPG八USART六_RTS/ETH_PPS_OUT九四VSS_九SVSS_九九五VDD_九SVDD_九九六PC六I/OPC六I二S二_MCK/TIM八_CH一/SDIO_D六/USART六_TX/DMCI_D零/TIM三_CH一九七PC七I/OPC七I二S三_MCK/TIM八_CH二/SDIO_D七/USART六_RX/DI_D一/TIM三_CH二九八PC八I/OPC八TIM八_CH三/SDIO_D零/TIM三_CH三/USART六_CX/DI_D二九九PC九I/OPC九TIM八_CH四/SDIO/D一/TIM三_CH四/DI_D三/I二C三_SDA一零零PA八I/OPA八USART一_CK/TIM一_CH一/MCO/I二C三_SCL/OTG_FS_SOF一零一PA九I/OPA九USART一_TX/TIM一_CH二/I二C三_SMBA一零二PA一零I/OPA一零USART一_RX/TIM一_CH三/OTG_FS_ID一零三PA一一I/OPA一一USART一_CTS/CAN一_RX/TIM一_CH四/ORG_FS_VBUS/OTG_FS_DM一零四PA一二I/OPA一二USART一_RTS/CAN一_TX/TIM一_ETR/OTG_FS_DP一零五PA一三I/OJTMS/SWDIO一零六未连接一零七VSS_二SVSS_二一零八VDD_二SVDD_二一零九PA一四I/OJTCK/SWCLK一一零PA一五I/OJTDISPI三_NSS/I二S三_WS/TIM二_CH一_ETR/SPI一_NSS一一一PC一零I/OPC一零SPI三_SCK/I二S三_WS/USART四_TX/SDIO_D二/USART三_TX/DI_D八一一二PC一一I/OPC一一SPI三_MISO/SCK/USART四_RX/SDIO_D三/USART三_RX/DI_D四/I二S三ext_SD一一三PC一二I/OPC一二USART五_TX/SDIO_CK/DI_D九/SPI三_MOSI/I二S三_SD/USART三_CK一一四PD零I/OOSC_INFSMC_D二/CAN一_RX一一五PD一I/OOSC_OUTFSMC_D三/CAN一_TX一一六PD二I/OPD二TIM三_ETR/USART五_RX/SDIO_D/DI_D一一一一七PD三I/OPD三FSMC_CLK/USART二_CTS一一八PD四I/OPD四FSMC_NOE/USART二_RTS一一九PD五I/OPD五FSMC_NWE/USART二_TX一二零VSS_一零SVSS_一零一二一VDD_一零SVDD_一零一二二PD六I/OPD六FSMC_NWAIT/USART二_RX一二三PD七I/OPD七FSMC_NE一/FSMC_NCE二/USART二_CK一二四PG九I/OPG九FSMC_NE二/FSMC_NCE三/USART六_RX一二五PG一零I/OPG一零FSMC_NCE四_一/FSMC_NE三一二六PG一一I/OPG一一FSMC_NCE四_二/ETM_MII_TX_EN/ETM_RMII_TX_EN一二七PG一二I/OPG一二FSMC_NE四/USART六_RTS一二八PG一三I/OPG一三FSMC_A二四/USART六_CTS/ETM_MII_TXD零/ETM_RMII_TXD零一二九PG一四I/OPG一四FSMC_A二五/USART六_TX/ETM_MII_TXD一/ETM_RMII_TXD一一三零VSS_一一SVSS_一一一三一VDD_一一SVDD_一一一三二PG一五I/OPG一五USART六_CTS/DI_D一三一三三PB三I/OJTDOSPI三_SCK/I二S三_CX/TRACESWO/TIM二_CH二/SPI一_SCK一三四PB四I/ONJTRSTSPI三_MISO/TIM三_CH一/SPI一_MISO/I二S三ext_SD一三五PB五I/OPB五I二C一_SMBAI/CAN二_RX/OTG_HS_ULPI_D七/ETH_PPS_OUT/SPI三_MOSI/I二S三_SD/TIM三_CH二/SPI一_MOSI一三六PB六I/OPB六I二C一_SCL/TIM四_CH一/CAN二_TX/DI_D一五/USART一_TX一三七PB七I/OPB七I二C一_SDA/TIM四_CH二/FSMC_NADV/USART一_RX/DI_VSYNC一三八BOOT零IBOOT