轨至轨运放设计课件

RAIL-to-RAILOPAMPS

轨至轨运放的设计RAIL-to-RAILOPAMPS

轨至轨运放的设计主要内容设计原理采用电平移位法轨至轨运放的设计采用恒定电压法实现跨导恒定的设计主要内容设计原理OpAmpConfigurationsOpAmpConfigurationsWhyRail-to-RailDifferentialInputStage?WhyRail-to-RailDifferential问题为什么要提高运放的输入信号共模范围？为什么要实现跨导的恒定？问题为什么要提高运放的输入信号共模范围？HowtoObtainaRail-to-RailInputCommonModeRange?(a)P-typedifferentialinputstage(b)N-typedifferentialinputstageHowtoObtainaRail-to-RailIHowtoObtainaRail-to-RailInputCommonModeRange?HowtoObtainaRail-to-RailIHowtoObtainaRail-to-RailInputCommonModeRange?HowtoObtainaRail-to-RailIcombiningaPMOSandaNMOSDifferentialpairscombiningaPMOSandaNMOSDicombiningaPMOSandaNMOSDifferentialpairscombiningaPMOSandaNMOSDiWhyisaConstantGmneeded?WhyisaConstantGmneeded?TechniquesforN-PComplementary

Rail-to-RailInputStage1.Forinputstageswithinputtransistorsworkinginweak-inversionregion,usingcurrentcomplementarycircuittokeepthesumofINandIPconstant[1][2][6];2.Usingsquarerootcircuittokeepconstant[3][13][16];3.and4.Usingcurrentswitchestochangethetailcurrentofinputdifferentialpairs[3][4][5][6];4.Usinghex-pairstructuretocontrolthetailcurrentsofbackuppairs[7];TechniquesforN-PComplementaTechniquesforN-PComplementary

Rail-to-RailInputStage(cont’d)5.Usingmaximum/minimumselectioncircuittoconducttheoutputcurrentofthedifferentialpairwithlargercurrent,aswellaslargergm,tothenextstage[8][9];6.Usingelectroniczenerdiodetokeepconstant[10];7.UsingDClevelshiftcircuittochangetheinputDClevel[11].Wewillanalyzethemonebyoneinthefollowingsections.Therearestillothertechniques[12][14][15][17][18],interestedreadersmaycheckthesereferences.TechniquesforN-PComplementaRail-to-RailInputStage,Structure2Basicidea–Foraninputdifferentialpair,usinga1storderapproximation,Rail-to-RailInputStage,StruRail-to-RailInputStage,Structure3[3][4][6]UsingcurrentswitchestochangethetailcurrentofinputdifferentialpairsRail-to-RailInputStage,Stru具体电路具体电路Rail-to-RailInputStage,Structure6[8][9]UsingMaximum/MinimumselectioncircuitRail-to-RailInputStage,StruTheblockdiagramTheblockdiagram最大电流选择电路最大电流选择电路Rail-to-RailInputStage,Structure7UsingDCshiftingcircuittochangetheinputDClevelRail-to-RailInputStage,Stru具体电路具体电路Rail-to-railamplifierwithZenerdiodeRail-to-railamplifierwithZeSummaryandComparisonSummaryandComparison进一步研究的问题MismatchbetweenN-channelandP-channeltransconductorsTransitionRegionCMRRdegradation(40-60dB)Nonlinearity进一步研究的问题MismatchbetweenN-chaReferencesI

[1]J.F.Duque-Carrillo,J.M.Carillo,J.L.Ausin,andE.Sanchez-Sinencio,“Robustanduniversalconstant-gmcircuittechnique,”ElectronicsLetters,vol.38,no.9,pp.396-397,Apr.2002.[2]M.Wang,T.L.Mayhugh,S.H.K.Embabi,andE.Sanchez-Sinencio,“Constant-gmRail-to-RailCMOSOp-AmpInputStagewithOverlappedTransitionRegions,”IEEEJ.ofSolidStateCircuits,vol.34,no.2,pp.148-156,Feb.1999.[3]G.FerriandW.Sansen,“ARail-to-RailConstant-gmLow-VoltageCMOSOperationalTransconductanceAmplifier,”IEEEJ.ofSolidStateCircuits,vol.32,no.10,pp.1563-1567,Oct.1997.[4]J.Ramirez-Angulo,R.G.Carvajal,J.Tombs,andA.Torralba,“Low-VoltageCMOSOp-AmpwithRail-toRailInputandOutputSignalSwingforContinuous-TimeSignalProcessingUsingMultiple-InputFloating-GateTransistors,”IEEETrans.OnCircuitsandSystems–II,vol.48,no.1,pp.111-116,Jan2001.[5]J.M.Carrillo,J.F.Duque-Carrillo,G.Torelli,andJ.L.Ausin,“GeneralPurposerail-to-railinputcircuitwithconstantbehaviorforVLSIcelllibraries,”IEEEInternationalSymposiumonCircuitsandSystems,vol.3,pp.607-610,May2002ReferencesI

[1]J.F.Duque-CReferencesII

[1]J.H.Huijsing,andD.Linebarger,“Lowvoltageoperationalamplifierwithrail-to-railinputandoutputstages,”IEEEJournalofSolid-StateCircuits,vol.SC-20,no.6,pp.1144-1150,December1985[2]W.-C.S.Wu,W.J.Helms,J.A.Kuhn,andB.E.Byrkett,“Digital-compatiblehigh-performanceoperationalamplifierwithrail-to-railinputandoutputranges,”IEEEJournalofSolid-StateCircuits,vol.29,no.1,pp.63-66,January1994[3]R.Hogervorst,R.J.Wiegerink,P.A.L.deJong,J.Fonderie,R.F.Wassenaar,andJ.H.Huijsing,“CMOSlow-voltageoperationalamplifierswithconstant-gmrail-to-railinputstage,”IEEEProc.ISCAS1992,pp.2876-2879[4]R.Hogervost,J.P.Tero,R.G.H.EschauzierandJ.H.Huijsing,“Acompactpower-efficient3-VCMOSrail-to-railinput/outputoperationalamplifierforVLSIcelllibraries,”IEEEJournalofSolid-StateCircuits,vol.29,no.12,pp.1505-1513,December1994[5]R.Hogervorst,S.M.Safai,andJ.H.Huijsing,“Aprogrammable3-VCMOSrailto-railopampwithgainboostingfordrivingheavyloads,”IEEEProc.ISCAS1995,pp.1544-1547[6]J.H.Huijsing,R.Hogervorst,andK.-J.deLangen,“Low-powerlow-voltageVLSIoperationalamplifiercells,”IEEETrans.CircuitsandSystems-I,vol.42.no.11,pp.841-852,November1995ReferencesII

[1]J.H.HuijsiReferences(cont’d)

[7]W.Redman-White,“Ahighbandwidthconstantgm,andslew-raterail-to-railCMOSinputcircuitanditsapplicationtoanalogcellforlowvoltageVLSIsystems,”IEEEJournalofSolid-StateCircuits,vol.32,no.5,pp.701-712,May1997[8]C.Hwang,A.Motamed,andM.Ismail,“LVopampwithprogrammablerail-to-railconstant-gm,”IEEEProc.ISCAS1997,pp.1988-1959[9]C.Hwang,A.Motamed,andM.Ismail,“Universalconstant-gminput-stagearchitectureforlow-voltageopamps,”IEEETrans.CircuitsandSystems-I,vol.42.no.11,pp.886-895,November1995[10]R.Hogervost,J.P.Tero,andJ.H.Huijsing,“CompactCMOSconstant-gmrail-to-railinputstagewithgm-controlbyanelectroniczenerdiode,”IEEEJournalofSolid-StateCircuits,vol.31,no.7,pp.1035-1040,July1996[11]M.Wang,T.L.Mayhugh,Jr.,S.H.K.Embabi,andE.Sánchez-Sinencio,“Constant-gmrail-to-railCMOSop-ampinputstagewithoverlappedtransitionregion,”IEEEJournalofSolid-StateCircuits,vol.34,no.2,pp.148-156,February1999[12]G.FerriandW.Sansen,“Arail-to-railconstant-gmlow-voltageCMOSoperationaltransconductanceamplifier,”IEEEJournalofSolid-StateCircuits,vol.32,no.10,pp.1563-1567,October1999References(cont’d)

[7]W.RReferences(cont’d)

[13]S.SakuraiandM.Ismail,“Robustdesignofrail-to-railCMOSoperationalamplifiersforalowpowersupplyvoltage,”IEEEJournalofSolid-StateCircuits,vol.31,no.2,pp.146-156,February1996[14]J.H.Botma,R.F.Wassenaar,andR.J.Wiegerink,“Simplerail-to-raillowvoltageconstanttransconductanceCMOSinputstageinweakinversion,”ElectronicsLetters,vol.29,no.12,pp.1145-1147,June1993[15]V.I.ProdanovandM.M.Green,“Simplerail-to-railconstanttransconductanceinputstageoperatinginstronginversion,”IEEE39thMidwestSymposiumonCircuitsandSystems,vol2,pp.957-960,August1996[16]J.H.Botma,R.F.Wassenaar,andR.J.Wiegerink,“AlowvoltageCMOSopampwitharail-to-railconstant-gminputstageandaclassABrail-to-railoutputstage,”IEEEProc.ISCAS1993,vol.2,pp.1314-1317,May1993[17]J.F.Duque-Carrillo,J.M.Valverde,andR.Perez-Aloe,“Constant-gmrail-to-railcommon-moderangeinputstagewithminimumCMRRdegradation,”IEEEJournalofSolid-StateCircuits,vol.28,no.6,pp.661-666,June1993[18]A.L.CobanandP.E.Allen,“Alow-voltageCMOSopampwithrail-to-railconstant-gminputstageandhigh-gainoutputstage,”IEEEProc.ISCAS1995,vol.2,pp.1548-1551,April-May1995References(cont’d)

[13]S.References(cont’d)[19]T.W.Fischer,A.I.Karsilayan,andE.Sánchez-Sinencio,“ARail-to-RailAmplifierInputStagewith+/-0.35%gmFluctuation,”IEEETransactionsOnCircuitsandSystemsI.vol.52,No.2,pp271-282,February2005.[20]J.Hu,S.Yan,andE.Sánchez-Sinencio,“AConstant-GMRail-to-RailOpAmpInputStageUsingDynamicCurrentScalingTechniques,”IEEEInternationalSymposiumonCircuitsandSystems,Kobe,Japan,May23-26,2005.[21]S.Yan,J.Hu,T.Song,andE.Sánchez-Sinencio,“Constant-gmTechniquesforRail-to-RailCMOSInputStages:AComparativeStudy,”IEEEInternationalSymposiumonCircuitsandSystems2005,Kobe,Japan,May23-26,2005.[22]T.Song,J.Hu,X.Li,S.YanandE.Sánchez-Sinencio,"ARobustandScalableConstantgmRail-to-RailCMOSInputStagewithDynamicFeedbackforVLSICellLibraries",IEEETransactionsonCircuitsandSystemsI,pp804-816,Vol.55,Issue3,April2008.References(cont’d)一种采用电平移位法的恒跨导轨至轨运放的设计一种采用电平移位法的恒跨导轨至轨运放的设计设计指标参数名

设计值

电源电压（VDD）3.3v开环增益（RL=10k，CL=10pf）>80dB相位裕量（RL=10k，CL=10pf）60度单位增益带宽（RL=10k，CL=10pf）>5MHz转换速度（CL=10pf）>10v/us共模抑制比>80dB电源抑制比>80dB输入共模范围0-3.3v输出摆幅0-3.3v跨导变化率<5%设计指标参数名设计值电源电压（VDD）3.3v开环增轨至轨特点一、输入输出信号范围尽可能大，从Vss到Vdd。二、输入级的跨导在共模输入电压范围内基本保持恒定。轨至轨特点一、输入输出信号范围尽可能大，从Vss到Vdd。互补差分输入级1、低共模输入：PMOS饱和，NMOS截止2、高共模输入：NMOS饱和，PMOS截止3、输入级最小电源电压：Vsup=Vsgp+Vgsn+2Vdsat4、共模输入范围为VSS≤Vcm≤VDD互补差分输入级1、低共模输入：PMOS饱和，NMOS截止PMOS/NMOS互补差分对的致命缺陷：在整个共模输入范围内，输入电路的总跨导不恒定。在两对MOS管同时导通时，其总跨导是其它部分的2倍。PMOS/NMOS互补差分对的致命缺陷：在整个共模输入范围内电平移位法恒定跨导平移PMOS对或者NMOS对的跨导曲线，使中间重合的部分正好为恒定的常数，且同非重合部分相等。PMOS对左平移法的原理图一、原理电平移位法恒定跨导平移PMOS对或者NMOS对的跨导曲线，使

1、首先要求非重叠部分即需满足：和2、确定平移的量也就是讨论NMOS（或PMOS）对的跨导的2个转折点。1、首先要求非重叠部分即需满足：和2、确定平移的量也就是讨二、平移电路采用输入端接入共源电路的方法。利用MOS管的栅源电压来抬高或降低输入共模电压的范围从而达到平移跨导曲线的目的。这里采用的是PMOS对的左平移法。利用Mb2，Mb3，M5，M6构成共源电路来对PMOS差分对的跨导进行平移，平移的大小为二、平移电路采用输入端接入共源电路的方法。利用MOS管的栅源三、半定量分析1、NMOS管M3开始工作，，得出

2、Vcm增大，直到M3，M4，Mbn都进入饱和区，得出以上两个式子就是NMOS对的跨导的转折点。同理，可以求出PMOS对的2个转折点，如下：3、Vcm从Vdd减小到M1开始导通得出4、Vcm再减小时，M1，M2，Mbp进入饱和状态，得出三、半定量分析1、NMOS管M3开始工作，，根据电平位移法的原理，得出以下方程式：简化后，两式相减可得出：

分解为即根据电平位移法的原理，得出以下方程式：简化后，两式相减可得所以满足：这两个条件。和可知M1和M3的宽长比之比。由可算出由得由可得出Mb2的宽长比。所以满足：这两个条件。和可知M1和M3的宽长比之比。由可ClassAB输出级结构mos管工作在饱和区时令则满足输出跨导恒定ClassAB输出级结构mos管工作在饱和区时令则满足输出跨RailtoRail电路的实际宽长比的手工计算从CSMC0.5umMIX工艺库文件中得到工艺参数一、输入级参数计算设RailtoRail电路的实际宽长比的手工计算从CSMCRailtoRail输入级实际电路图RailtoRail输入级实际电路图按照平移法原理的分析取则设平移电路的电流再计算按照平移法原理的分析取则设平移电路的电流再计算实际的rail-to-rail输出级电路图则G30由前级决定为常数，确定这里设2.25v。再综合考虑为保证M30-M31能工作在饱和区，设得出二、输出级参数计算实际的rail-to-rail输出级电路图则G30由前级决定中间级共源共栅电路图三、中间级共源共栅参数计算总增益中间级共源共栅电路图三、中间级共源共栅参数计算总增益根据设计指标和电路原理手工计算得出的MOS宽长比根据设计指标和电路原理手工计算得出的MOS宽长比Rail_To_Rail放大器

——采用恒定电压法实现跨导恒定的设计

Rail_To_Rail放大器

——采用恒定电压法实现跨导恒结构与原理当共模信号Vicm很大时，此时只有NMOS差