CycloneII器件数据手册(英文)

CycloneIIDeviceHandbook,Volume1101InnovationDriveSanJose,CA95134CII5V1-3.3Copyright©2008AlteraCorporation.Allrightsreserved.Altera,TheProgrammableSolutionsCompany,thestylizedAlteralogo,specificdevicedes-ignations,andallotherwordsandlogosthatareidentifiedastrademarksand/orservicemarksare,unlessnotedotherwise,thetrademarksandservicemarksofAlteraCorporationintheU.S.andothercountries.Allotherproductorservicenamesarethepropertyoftheirrespectiveholders.Al-teraproductsareprotectedundernumerousU.S.andforeignpatentsandpendingapplications,maskworkrights,andcopyrights.AlterawarrantsperformanceofitssemiconductorproductstocurrentspecificationsinaccordancewithAltera'sstandardwarranty,butreservestherighttomakechangestoanyproductsandservicesatanytimewithoutnotice.Alteraassumesnoresponsibilityorliabilityarisingoutoftheap-plicationoruseofanyinformation,product,orservicedescribedhereinexceptasexpresslyagreedtoinwritingbyAlteraCorporation.Alteracustomersareadvisedtoobtainthelatestversionofdevicespecificationsbeforerelyingonanypublishedin-formationandbeforeplacingordersforproductsorservices.ii

AlteraCorporationContentsChapterRevisionDates...........................................................................xiAboutThisHandbook............................................................................xiiiHowtoContactAltera..........................................................................................................................xiiiTypographicConventions....................................................................................................................xiiiSectionI.CycloneIIDeviceFamilyDataSheetRevisionHistory....................................................................................................................................1–1Chapter1.IntroductionIntroduction............................................................................................................................................Low-CostEmbeddedProcessingSolutions..................................................................................Low-CostDSPSolutions.................................................................................................................Features...................................................................................................................................................ReferencedDocuments.........................................................................................................................DocumentRevisionHistory.................................................................................................................

1–11–11–11–21–91–9Chapter2.CycloneIIArchitectureFunctionalDescription..........................................................................................................................2–1LogicElements.......................................................................................................................................2–2LEOperatingModes........................................................................................................................2–4LogicArrayBlocks................................................................................................................................2–7LABInterconnects............................................................................................................................2–8LABControlSignals.........................................................................................................................2–8MultiTrackInterconnect.....................................................................................................................2–10RowInterconnects..........................................................................................................................2–10ColumnInterconnects....................................................................................................................2–12DeviceRouting...............................................................................................................................2–15GlobalClockNetwork&Phase-LockedLoops...............................................................................2–16DedicatedClockPins.....................................................................................................................2–20Dual-PurposeClockPins..............................................................................................................2–20GlobalClockNetwork...................................................................................................................2–21GlobalClockNetworkDistribution............................................................................................2–23PLLs..................................................................................................................................................2–25EmbeddedMemory.............................................................................................................................2–27MemoryModes...............................................................................................................................2–30ClockModes....................................................................................................................................2–31M4KRoutingInterface..................................................................................................................2–31AlteraCorporation

iiiContentsEmbeddedMultipliers........................................................................................................................MultiplierModes............................................................................................................................EmbeddedMultiplierRoutingInterface.....................................................................................I/OStructure&Features....................................................................................................................ExternalMemoryInterfacing.......................................................................................................ProgrammableDriveStrength.....................................................................................................Open-DrainOutput........................................................................................................................SlewRateControl...........................................................................................................................BusHold..........................................................................................................................................ProgrammablePull-UpResistor..................................................................................................AdvancedI/OStandardSupport................................................................................................High-SpeedDifferentialInterfaces..............................................................................................SeriesOn-ChipTermination.........................................................................................................I/OBanks........................................................................................................................................MultiVoltI/OInterface.................................................................................................................

2–322–352–362–372–442–492–502–512–512–512–522–532–552–572–60Chapter3.Configuration&TestingIEEEStd.1149.1(JTAG)BoundaryScanSupport.............................................................................Configuration.........................................................................................................................................OperatingModes...................................................................................................................................ConfigurationSchemes.........................................................................................................................CycloneIIAutomatedSingleEventUpsetDetection......................................................................Custom-BuiltCircuitry....................................................................................................................SoftwareInterface.............................................................................................................................DocumentRevisionHistory.................................................................................................................

3–13–53–53–63–73–73–73–8Chapter4.HotSocketing&Power-OnResetIntroduction............................................................................................................................................CycloneIIHot-SocketingSpecifications............................................................................................DevicesCanBeDrivenbeforePower-Up.....................................................................................I/OPinsRemainTri-StatedduringPower-Up............................................................................Hot-SocketingFeatureImplementationinCycloneIIDevices.......................................................Power-OnResetCircuitry...................................................................................................................."Wake-up"TimeforCycloneIIDevices.......................................................................................Conclusion..............................................................................................................................................DocumentRevisionHistory.................................................................................................................

4–14–14–24–24–34–54–54–74–7Chapter5.DCCharacteristicsandTimingSpecificationsOperatingConditions...........................................................................................................................5–1Single-EndedI/OStandards..........................................................................................................5–5DifferentialI/OStandards..............................................................................................................5–7DCCharacteristicsforDifferentPinTypes.....................................................................................5–11On-ChipTerminationSpecifications...........................................................................................5–12PowerConsumption...........................................................................................................................5–13TimingSpecifications..........................................................................................................................5–14PreliminaryandFinalTimingSpecifications.............................................................................5–14Performance....................................................................................................................................5–15iv

AlteraCorporationCycloneIIDeviceHandbook,Volume1ContentsInternalTiming...............................................................................................................................CycloneIIClockTimingParameters...........................................................................................ClockNetworkSkewAdders.......................................................................................................IOEProgrammableDelay.............................................................................................................DefaultCapacitiveLoadingofDifferentI/OStandards..........................................................I/ODelays.......................................................................................................................................MaximumInputandOutputClockRate....................................................................................HighSpeedI/OTimingSpecifications.......................................................................................ExternalMemoryInterfaceSpecifications..................................................................................JTAGTimingSpecifications..........................................................................................................PLLTimingSpecifications............................................................................................................DutyCycleDistortion.........................................................................................................................DCDMeasurementTechniques...................................................................................................ReferencedDocuments.......................................................................................................................DocumentRevisionHistory...............................................................................................................

5–185–235–295–305–315–335–465–555–635–645–665–675–685–745–74Chapter6.Reference&OrderingInformationSoftware..................................................................................................................................................DevicePin-Outs.....................................................................................................................................OrderingInformation...........................................................................................................................DocumentRevisionHistory.................................................................................................................

6–16–16–16–2SectionII.ClockManagementRevisionHistory....................................................................................................................................6–1Chapter7.PLLsinCycloneIIDevicesIntroduction............................................................................................................................................7–1CycloneIIPLLHardwareOverview..................................................................................................7–2PLLReferenceClockGeneration...................................................................................................7–6ClockFeedbackModes.......................................................................................................................7–10NormalMode..................................................................................................................................7–10ZeroDelayBufferMode................................................................................................................7–11NoCompensationMode...............................................................................................................7–12Source-SynchronousMode....................