MAX II的UFM模块使用实例

MAXII的UFM查看MAXII器件的ChipPlanner：其左下角这块黑色区域是用户不可用资源区，而在这片不可用区域里有一块绿色的方块是可用的。这块不可用的黑色区域叫做CFMblock（配置Flash存储区），而那个绿色方块叫做UFM（用户可用的Flash存储区）。对于后者是我们今天讨论的重点，先看以下官方对此存储区作用的描述：MAXIIdevicesfeatureasingleUFMblock,whichcanbeusedlikeaserialEEPROMforstoringnon-volatileinformationupto8,192bits.TheUFMblockconnectstothelogicarraythroughtheMultiTrac

kinterconnect,allowinganyLEtointerfacetotheUFMblock.Figure2-15showstheUFMblockandinterfacesignals.ThelogicarrayisusedtocreatecustomerinterfaceorprotocollogictointerfacetheUFMblockdataoutsideofthedevice.TheUFMblockoffersthefollowingfeatures:Non-volatilestorageupto16-bitwideand8,192totalbitsTwosectorsforpartitionedsectoreraseBuilt-ininternaloscillatorthatoptionallydriveslogicarrayProgram,erase,andbusysignalsAuto-incrementaddressingSerialinterfacetologicarraywithprogrammableinterface也就是说，MAXII其实是内嵌了一块8Kbit的Flash。这个Flash原则上是不占用MAXII的其它可用逻辑资源的，不过这有个大前提：用户读写这块存储区使用altera本身的串行接口（遵循特定的通信协议）。但是这个协议也太繁

琐了(个人感觉)，因此，对于这块存储区读写接口altera提供了三种通用的接口供用户选择。I2CSPIParallelNone(AlteraSerialInterface)最后一种就是不需要占用器件额外逻辑资源的接口，上面三种是需要消耗器件逻辑资源的接口。笔者添加了一个并行接口做测试，占用了EMP240内部86个LEs，对于资源比较紧张的应用还是很划不来的。更多详细的关于UFM的信息请大家参考altera提供的MAXIIdatasheeto下面介绍一个使用并行接口读写UFM的实例，以及功能仿真。新建一个工程，名为ufmtest，顶层模块ufmtest.v，代码如下：moduleufmtest(databus,addr,nerase,nread,nwrite,data_valid,nbusy);inout[15:0]databus;//Flash数据总线input[8:0]addr;inputinput[8:0]addr;inputnerase;inputnread;inputnwrite;outputdata_valid;outputnbusy;〃擦除Flash某一扇区信号〃读Flash信号〃写Flash信号//Flash数据输出有效信号//Flash忙信号assigndatabus=nwrite?dataout:16,hzzzz;〃写信号有效时，Flash数据总线作为输入assigndatain=databus;//写入Flash数据总线连接//Flash写入数据//Flash读出数据wire[15:0]datain;wire[15:0]dataout;//例化UFM(Flash)模块

//Flash写入数据//Flash读出数据.addr(addr),.datain(datain),.nerase(nerase),.nread(nread),.nwrite(nwrite),.data_valid(data_valid),.dataout(dataout),.nbusy(nbusy))；endmodule但是在例化UFM模块之前，大家需要先在MegaWizardPlug-InManager里添加一个Flash模块。步骤如下：1,点击菜单栏里的ToolsMegaWizardPlug-InManagero弹出如下，点击next。2,接着选择MemoryCompiler下的FlashMemory，然后在Whatnamedoyouwantfor2,接着选择MemoryCompiler下的FlashMemory，然后在WhatnamedoyBe^aVizardPlug—Inlanager[page2a]Whichrnsgafunctionwouldpouliketocustcmize?Seectamega:unctionfrontheistbebw-函InstaledPlug-InsJAJteraSOPCBuilderG3|ArithmeticSalCommunicationsaDGPfealGatesSaiI/Ofca|IrterfacesSalJ~AG-cccessibleE■:tensionsE3|而m叫rnmpil^r|-nCAM/JFIFO[■■■fjFIFJparttionei/|Fla;hMeTioryp-TjRA'vliniHabftr刁RAM:1-PORTzjmu.2-ronT刁RAM:3-PORT|HUM:1-HUHIkOR0\1:2-PORTLTjShitregister(RAM-based)iK]S:orogc+IPMegaStareWhichdevicefarrilp(Ajill^outeusing?...田..国...[±1...国..由...田：[±1..曰Whichtypeofoutputfiledoyouwanttocreate?LAHDLLVIIDL#VeriloqHDLBrowse...I'.'■/hdtnamedoyouwantfortheoutputfile?i资料崩I刷遇计卖例，MAXI和M»设计实例LUF-1晓比3旧_ufmReturntothispageforanothercreateoperationINote:ToccmpileaprojectsuccessfullyintheQuartusIIsoftware,pourdesignfilesmustbeintheprojectdirectoryintheglobaluserSbrariesspecifiedntheOptionsdiabgbow(Toalsmenu),orauserSbraryspeciliedintheUsbox(Assignmentsmenu).Yourcurrertu^erlibrarydirectoriesare.Cancel<EackNext>Finishj3,接下来一路Next,需要更改设置的地方如下（我也不多废话，大家一看都明白）：■egaVizardPlug-Inlaxiager—IlLXITE"![page1of3}二—.二工旧画'我FlashMemoryAboutDocunia-tatli=i-i|T]Paranneter5el±rcF园EDA园Sumary|General|〉Fl|T]Paranneter5el±rcF园EDA园Sumary|General|〉FlMAK】ieddr[0-O|c^ah[15.B]rresdnwrtereraseufmahufm_pa-alkld3taou1[15.JZi]|nkius?翎avRiidCurrerd^setectazldevtefami?：IrrterfEcet四己PARALLELi«>I.0Matchproject/dsfaiJtRrsoLTDeUmoe35lut4-1maxii_ulm|Caned||Nest>||Finish

完成上面步骤以后编译工程，编写testbench如下:timescale1ns/1nsmoduletb_ufmtest();//inoutwire[15:0]databus;//Flash数据总线//inputwiredata_valid;//Flash数据输出有效信号wirenbusy;//Flash忙信号//outputreg[8:0]addr;//Flash地址总线regnerase;〃擦除Flash某一扇区信号regnread;//读Flash信号regnwrite;//写Flash信号reg[15:0]databus_r;//测试模块数据总线寄存器reg[15:0]rdback_data;//测试模块数据总线数据回读寄存器assigndatabus=nwrite?16'hzzzz:databus_r;ufmtestufmtest(.databus(databus),.addr(addr),.nerase(nerase),.nread(nread),.nwrite(nwrite),.data_valid(data_valid),.nbusy(nbusy));parameterDELAY_600US=600_000,//600us延时DELAY_2US=2_000,//2us延时DELAY_5US=5_000;//5us延时initialbeginnerase=1;nread=1;nwrite=1;addr=0;databus_r=0;#DELAY_600US;//0地址写入数据99databus_r=99;addr=9'd0;nwrite=0;#DELAY_5US;nwrite=1;@(posedgenbusy);#DELAY_5US;//0地址读出数据，保存到寄存器rdback_data中databus_r=16,hff;

addr=9'd0;nread=0;#DELAY_5US;nread=1;@(posedgedata_valid);rdback_data=databus;#DELAY_600U