计算机组织与结构：Chapter 13 Reduced Instruction Set Computers

1/49WilliamStallings

ComputerOrganization

andArchitecture

8thEditionChapter13ReducedInstructionSetComputers2/40Chapter13

ReducedInstructionSetComputersKeytermsKeypointsChaptertitles3/40Chapter13

ReducedInstructionSetComputersKeytermsCISCcomplexinstructionsetcomputerRISCreducedinstructionsetcomputerDelayedbranchDelayedloadHLLhigh-levellanguageRegisterfileRegisterwindowSPARC4/40MajorAdvancesinComputers(1)ThefamilyconceptIBMSystem/3601964DECPDP-8SeparatesarchitecturefromimplementationMicroporgrammedcontrolunitIdeabyWilkes1951ProducedbyIBMS/3601964CachememoryIBMS/360model8519695/40MajorAdvancesinComputers(2)SolidStateRAM(Seememorynotes)MicroprocessorsIntel40041971PipeliningIntroducesparallelismintofetchexecutecycleMultipleprocessors6/40TheNextStep-RISCReducedInstructionSetComputerKeyfeaturesLargenumberofgeneralpurposeregistersoruseofcompilertechnologytooptimizeregisteruseLimitedandsimpleinstructionsetEmphasisonoptimisingtheinstructionpipeline7/40Comparisonofprocessors8/40DrivingforceforCISCSoftwarecostsfarexceedhardwarecostsIncreasinglycomplexhighlevellanguagesSemantic

gapLeadsto:LargeinstructionsetsMoreaddressingmodesHardwareimplementationsofHLLstatementse.g.CASE(switch)onVAXSemantic:语义的;语义学的

Gap英音：[gæp]豁口,裂口

9/40IntentionofCISCEasecompilerwritingImproveexecutionefficiencyComplexoperationsinmicrocodeSupportmorecomplexHLLs

ease减轻

HLL

缩写词abbr.

high-levellanguage【电脑】高级语言10/40ExecutionCharacteristicsOperationsperformedOperandsusedExecutionsequencingStudieshavebeendonebasedonprogramswritteninHLLsDynamicstudiesaremeasuredduringtheexecutionoftheprogram11/40OperationsAssignmentsMovementofdataConditionalstatements(IF,LOOP)SequencecontrolProcedurecall-returnisverytimeconsumingSomeHLLinstructionleadtomanymachinecodeoperations

Assignment

分配;指派,选派

12/40WeightedRelativeDynamicFrequencyofHLLOperations[PATT82a]

DynamicOccurrenceMachine-InstructionWeightedMemory-ReferenceWeighted

PascalCPascalCPascalCASSIGN45%38%13%13%14%15%LOOP5%3%42%32%33%26%CALL15%12%31%33%44%45%IF29%43%11%21%7%13%GOTO—3%————OTHER6%1%3%1%2%1%13/40OperandsMainlylocalscalarvariablesOptimisationshouldconcentrateonaccessinglocalvariables

PascalCAverageIntegerConstant16%23%20%ScalarVariable58%53%55%Array/Structure26%24%25%14/40ProcedureCallsVerytimeconsumingDependsonnumberofparameterspassedDependsonlevelofnestingMostprogramsdonotdoalotofcallsfollowedbylotsofreturnsMostvariablesarelocal(c.f.localityofreference)15/40ImplicationsBestsupportisgivenbyoptimisingmostusedandmosttimeconsumingfeaturesLargenumberofregistersOperandreferencingCarefuldesignofpipelinesBranchpredictionetc.Simplified(reduced)instructionset16/40LargeRegisterFileSoftwaresolutionRequirecompilertoallocateregistersAllocatebasedonmostusedvariablesinagiventimeRequiressophisticatedprogramanalysisHardwaresolutionHavemoreregistersThusmorevariableswillbeinregisters17/40RegistersforLocalVariablesStorelocalscalarvariablesinregistersReducesmemoryaccessEveryprocedure(function)callchangeslocalityParametersmustbepassedResultsmustbereturnedVariablesfromcallingprogramsmustberestored18/40RegisterWindowsOnlyfewparametersLimitedrangeofdepthofcallUsemultiplesmallsetsofregistersCallsswitchtoadifferentsetofregistersReturnsswitchbacktoapreviouslyusedsetofregisters19/40RegisterWindowscont.ThreeareaswithinaregistersetParameterregistersLocalregistersTemporaryregistersTemporaryregistersfromonesetoverlapparameterregistersfromthenextThisallowsparameterpassingwithoutmovingdata

cont.

1.内容，所含之物(contents)2.继续的；不断的；连续的20/40OverlappingRegisterWindows……21/40CircularBufferdiagram主程序1子程序A2子程序B3子程序C4子程序D5子程序E6子程序F7子程序G22/40OperationofCircularBufferWhenacallismade,acurrentwindowpointerismovedtoshowthecurrentlyactiveregisterwindowIfallwindowsareinuse,aninterruptisgeneratedandtheoldestwindow(theonefurthestbackinthecallnesting)issavedtomemoryAsavedwindowpointerindicateswherethenextsavedwindowsshouldrestoreto23/40GlobalVariablesAllocatedbythecompilertomemoryInefficientforfrequentlyaccessedvariablesHaveasetofregistersforglobalvariables24/40RegistersvCacheLargeRegisterFileCacheAlllocalscalarsRecently-usedlocalscalarsIndividualvariablesBlocksofmemoryCompiler-assignedglobalvariablesRecently-usedglobalvariablesSave/RestorebasedonprocedurenestingdepthSave/RestorebasedoncachereplacementalgorithmRegisteraddressingMemoryaddressing25/40ReferencingaScalar-

WindowBasedRegisterFile26/40ReferencingaScalar-Cache27/40ReferencingaScalar-

WindowBasedRegisterFile28/40CompilerBasedRegisterOptimizationAssumesmallnumberofregisters(16-32)OptimizinguseisuptocompilerHLLprogramshavenoexplicitreferencestoregistersusually-thinkaboutC-registerintAssignsymbolicorvirtualregistertoeachcandidatevariableMap(unlimited)symbolicregisterstorealregistersSymbolicregistersthatdonotoverlapcansharerealregistersIfyourunoutofrealregisterssomevariablesusememory29/40GraphColoringGivenagraphofnodesandedgesAssignacolortoeachnodeAdjacentnodeshavedifferentcolorsUseminimumnumberofcolorsNodesaresymbolicregistersTworegistersthatareliveinthesameprogramfragmentarejoinedbyanedgeTrytocolorthegraphwithncolors,wherenisthenumberofrealregistersNodesthatcannotbecoloredareplacedinmemory30/40GraphColoringApproach31/40WhyCISC(1)?Compilersimplification?

Disputed…ComplexmachineinstructionshardertoexploitOptimizationmoredifficult

(开发)Smallerprograms?Programtakesuplessmemorybut…MemoryisnowcheapMaynotoccupylessbits,justlookshorterinsymbolicformMoreinstructionsrequirelongerop-codesRegisterreferencesrequirefewerbits

dispute

英音：[di‘spju:t]争论;争执

simplification

1.单纯化2.简单化32/40WhyCISC(2)?Fasterprograms?BiastowardsuseofsimplerinstructionsMorecomplexcontrolunitMicroprogramcontrolstorelargerthussimpleinstructionstakelongertoexecuteItisfarfromclearthatCISCistheappropriatesolution

Bias倾向,趋势33/40RISCCharacteristicsOneinstructionpercycleRegistertoregisteroperationsFew,simpleaddressingmodesFew,simpleinstructionformatsHardwireddesign(nomicrocode)FixedinstructionformatMorecompiletime/effort34/40RISCvCISCNotclearcutManydesignsborrowfrombothphilosophiese.g.PowerPCandPentiumII

philosophies

哲学；观点35/40RISCPipeliningMostinstructionsareregistertoregisterTwophasesofexecutionI:InstructionfetchE:ExecuteALUoperationwithregisterinputandoutputForloadandstoreI:InstructionfetchE:ExecuteCalculatememoryaddressD:MemoryRegistertomemoryormemorytoregisteroperation36/40Sequentialexecutionfigure13.6adepictsthetimingofasequenceofinstructionsnopipelining.Clearly,thisisawastefulprocess.I37/40Figure13.6bshowsatwo-stagepipeliningscheme,inwhichtheIandEstagesoftwodifferentinstructionsareperformedsimultaneously.I38/40Figure13.6c,threeinstructionscanbeoverlapped,andtheimprovementisasmuchasafactorof3.I39/40Figure13.6dE1:RegisterfilereadE2:ALUoperationandregisterwriteI40/40EffectsofPipelining41/40OptimizationofPipeliningDelayedbranchDelayedLoadLoopUnrolling42/40OptimizationofPipelining

（1）LoopUnrollingReplicatebodyofloopanumberoftimesIterateloopfewertimesReducesloopoverheadIncreasesinstructionparallelismImprovedregister,datacacheorTLBlocality

unroll

展开，打开（卷着的东西）

replicate

英音：[‘replikeit]折叠;复制

iterate

英音：['itəreit]反复,重复

overhead英音：[‘əuvə’hed]日常开支，额外开销43/40OptimizationofPipelining

（2）DelayedbranchDoesnottakeeffectuntilafterexecutionoffollowinginstructionThisfollowinginstructionisthedelayslot44/40NormalandDelayedBranchAddressNormalBranchDelayedBranchOptimizedDelayedBranch100LOAD X,rALOAD X,rALOADX,rA101ADD 1,rAADD 1,rAJUMP 105102JUMP 105JUMP 106ADD 1,rA103ADD rA,rBNOOP

ADD rA,rB104SUB rC,rBADD rA,rBSUB rC,rB105STORErA,Z

SUB rC,rBSTORErA,Z

106

STORErA,Z

45/40UseofDelayed

BranchAddressNormalBranchDelayedBranchOptimizedDelayedBranch100LOAD X,rALOADX,rALOADX,rA101ADD1,rAADD1,rAJUMP105102JUMP105JUMP106ADD1,rA103ADDrA,rBNOOP ADDrA,rB104SUBrC,rBADDrA,rBSUBrC,rB105STORErA,Z SUBrC,rBSTORErA,Z 106

STORErA,Z

46/40OptimizationofPipelining

（3）DelayedLoadRegistertobetargetislockedbyprocessorContinueexecutionofinstructionstreamuntilregisterrequiredIdleuntilloadcompleteRe-arranginginstructionscanallowusefulworkwhilstloading47/4080486InstructionPipelineExamples48/40Controversy(1)QuantitativecompareprogramsizesandexecutionspeedsQualitativeexamineissuesofhighlevellanguagesupportanduseofVLSIrealestate

controversy

英音：[‘kɔntrəvə:si]争论,辩论;争议

quantitative

定量的

qualitative

定性的

estate

英音：[is'teit]财产,资产49/40Controversy(2)ProblemsNopairofRISCandCISCthataredirectlycomparableNodefinitivesetoftestprogramsDifficulttoseparatehardwareeffectsfromcompliereffectsMostcomparisonsdoneon“toy”ratherthanproductionmachinesMostcommercialdevicesareamixture50/40RequiredReadingStallingschapter13Manufacturerwebsites51/40请问现在的MIPS处理器设计中，延迟槽和分支预测是怎样的关系呢？

延迟槽和分支预测是提高流水线利用率的完全不相干的两种技术?延迟槽是早期用来提高性能的技术，现在已经很少用了呢？52/401.概述

分支延迟槽(Branchdelayslot)，简单地说就是位