数字设计基础双语课件(第2章)_第1页
数字设计基础双语课件(第2章)_第2页
数字设计基础双语课件(第2章)_第3页
数字设计基础双语课件(第2章)_第4页
数字设计基础双语课件(第2章)_第5页
已阅读5页,还剩34页未读 继续免费阅读

下载本文档

版权说明:本文档由用户提供并上传,收益归属内容提供方,若内容存在侵权,请进行举报或认领

文档简介

1、 2. Logic gates 2.1 Logic signals 2.2Basic logic functions2.3 Boolean relationships2.4 Universal gates2.5 Other gates2.6 Gate design1 2.1 Logic signalsTwo-valued signals are used in digital systems to represent ON/OFF control actions and to represent the digits of binary numbers.We often use the hig

2、her voltage to represent a logic 1 and lower voltage to represent a logic 0.A voltage level will represent each of the two logic values.1. Two-valued logic signals2 2.1 Logic signals2. Algebra manipulation of two-valued variablesJust as complex arithmetic expressions are created by using a few basic

3、 arithmetic operations, logic functions can be specified by using simple logic operations.Logic functions can be thought of as algebraic expressions where variables can take on only one of the two values.3 2.2 Basic logic functionsThere are three fundamental operations in Boolean algebra from which

4、all logic functions can be developed, namely:NOT; AND; ORThey are implemented by circuits called gates.A gate accepts logic signals and produces a logic output according to a basic logic function of the inputs. 4 2.2 Basic logic functions1. NOT gateDefinition: The NOT operation is applied to a singl

5、e variable, say A, and produces the opposite logic value to A.The NOT operation on a variable A is written as A.AASymbol Truth table 5 2.2 Basic logic functionsTruth tableA truth table lists the output for each possible combinations of the input variables.InverterThe NOT gate is sometimes called an

6、inverter.Complement Some terms Inverting a variable can form its complement.6 2.2 Basic logic functions2. AND gateDefinition: The AND operation, operating on two variables A and B, producing a 1 if A is a 1 and B is a 1, otherwise the result is a 0.The AND operation between two variables A and B is

7、written as AB, or simply AB.7 2.2 Basic logic functionsABABSymbolTwo-input AND gateThe AND operation can be applied to any number of variables. The result is a 1 only if all the variables are 1.Truth table8 2.2 Basic logic functions3. OR gateDefinition: The OR operation applied to two variables A an

8、d B, produces a 1 if A is a 1 or B is a 1, or both A and B are 1, otherwise the result is a 0.The OR operation between two variables A and B is written as A+B.9 2.2 Basic logic functionsABA+BSymbolTwo-input OR gateThe OR operation can be applied to any number of variables. The result is a 1 if any o

9、f the variable is a 1. Only when all variables are 0, the result is a 0.Truth table10 2.3 Boolean relationships1. Basic Boolean identitiesA 1 = A ;A 0 = 0 ;A A = A ;A + 1 = 1 ;A + 0 = A ;A + A = A ;A A = 0 ;A + A = 1 ;A = A ;These identities can be easily proved by listing all possible values of the

10、 variables in a truth table and checking that each combination of variables results in the same value in each side of the equation.The basic identities can be extended to more variables.11 2.3 Boolean relationships2. Applications of the identities(1) To determine what to do with unused inputs of gat

11、esSuppose we have a three-input gate available, but only require the two-input function, so A and B will be applied to two of the inputs, the third input C is unused.12 2.3 Boolean relationships) Unused inputs of an AND gateTo maintain the logic AND function between the two variables A and B, we hav

12、e two choices:C is connected to a permanent logic 1 (+5V);C is connected to A or B;13 2.3 Boolean relationships) Unused inputs of an OR gateTo maintain the logic OR function between the two variables A and B, we have two choices:C is connected to a permanent logic 0 (0V);C is connected to A or B;14

13、2.3 Boolean relationships(2) To determine the effect of faults on gatesFaults can often be modeled by assuming that a permanent logic 0 or a permanent logic 1 appears on a single line (the so-called stuck-at fault model).Stuck-at fault modelThe effect of a fault on the output can be easily found fro

14、m the basic relationships.15 2.3 Boolean relationships3. Basic algebraic rules(1)The commutative lawA + B = B + A; A B = B A(2)The associative lawA + B + C = ( A + B ) + C = A + ( B + C )A B C = ( A B ) C = A ( B C )The order that we compute an expression composed of variables connected by the same

15、operator is not important in Boolean algebra. The rule is called the associative law.16 2.3 Boolean relationships(3)The distributive lawA ( B + C ) = AB + AC; A +( BC) = (A+B) (A+C)Order can be enforced with parentheses in Boolean algebra. Parentheses are also used in ordinary algebra to show that m

16、ultiplication applies to a group. It is also true in Boolean to both AND and OR operators and is called the distributive law.The laws and relationships provide tools for designing a logic expression and creating alternative. 17 2.3 Boolean relationships4. DualitySuppose we have a function f, if we c

17、hange:) all 0s to 1s ) all 1s to 0s ) all +s to s ) all s to +sThe new function we get is the dual of the function f, which is written as fd.(1)The dual function18 2.3 Boolean relationships(2)Dual equalities Principle of DualitySuppose we have proved an equality:F(A, B, C, ., , +, 0, 1) = G(A, B, C,

18、 ., , +, 0, 1) Then it follows that a dual equality:Fd (A, B, C, ., , +, 1, 0) = Gd (A, B, C, ., , +, 1, 0) To obtain the dual equality, we simply change all +s to s, all s to +s, all 0s to 1s and all 1s to 0s. The basic identities can be grouped into dual.19 2.3 Boolean relationships5. DeMorgans th

19、eoremA + B = AB; AB = A + BThese relationships are known as DeMorgans theorem.DeMorgans theorem can be proved by listing each function in a truth table and confirming that both are the same for each combination of A and B. Proving DeMorgans theorem for two variables20 2.3 Boolean relationshipsDeMorg

20、ans theorem can be extended to more variables.A + B + C = ABC; ABC = A + B + CFor three variables, we have:21 2.4 Universal gates1. NAND gateDeMorgans theorem provides a relationship between AND and OR. Hence, of the three basic operations, only two are strictly necessary because the third can be re

21、placed by a function of the other two.We can combine AND and NOT to form a “universal” operation NAND, which can be used to implement AND, OR, NOT and any Boolean expressions. 22 2.4 Universal gatesTruth tableNOT, AND, OR from NAND gatesABABTwo-input NAND gateSymbol 23 2.4 Universal gates2. NOR gate

22、Apart from the NAND gate, we could use the NOR gate as the universal gate.ABA+BTwo-input NOR gateSymbol Truth table24 2.4 Universal gatesNOT, AND, OR from NOR gates25 2.5 Other gates1. Exclusive-OR gateThe exclusive-OR operation is:A B = AB + ABABABSymbolTruth table26 2.5 Other gatesThe exclusive-OR

23、 operation is not regarded as a fundamental operation because the operation can be broken down into AND, OR and NOT operation.The basic identities for the exclusive-OR operation are:A 0 = A;A 1 = A;A A = 0;A A = 1;A B = A B = A B;The exclusive-OR operation also obeys the commutative, associative and

24、 distributive laws:Commutative law: A B = B AAssociative law: (A B) C = A (B C)Distributive law: A (B C) = AB AC27 2.5 Other gates2. Exclusive-NOR gateThe exclusive-NOR operation is:A B = AB + ABABABSymbol Truth table28 2.5 Other gates3. Commutative functionsSo far, the functions we have discussed a

25、re commutative functions, whose variables can be interchanged without affecting the results.One advantage of limiting gates to commutative functions is that the inputs can be used in any order, and interchanged at will.29 2.6 Gates design1. TTL combinational logic circuitsTTL Transistor - Transistor

26、 LogicTTL family was introduced in the 1960s and still used for small digital systems and for interfaces. According to the number of gates in one package, TTL devices can be classified into four types: small-scale integration (SSI), medium-scale integration (MSI), large-scale integration (LSI) and v

27、ery large-scale integration (VLSI) .30 2.6 Gates designSupply voltage The supply voltage for TTL is +5V. A logic 0 is represented by a voltage of +0.2V nominally, it can be generated between 0V and +0.4V. We often associate 0V with a logic 0.A logic 1 is represented by a voltage of +3.4V nominally,

28、it can be generated between +2.4V and +5V. We often associate +5V with a logic 1. 31 2.6 Gates designVoltages as low as +2V will be recognized as logic 1. TTL voltagesVoltages as high as +0.8V will be recognized as logic 0.32 2.6 Gates designNoise Noise is the unwanted electrical signals occurring o

29、n wires in a system.Logic devices must be designed to accept a certain amount of electrical noise in the system and continue to operate correctly.Noise margin Noise margin is the level of voltage present as electrical noise that can be tolerated in the system.33 2.6 Gates designNoise margin is given

30、 in terms of the allowable noise voltage that can be added to or subtracted from a generated logic signal with the logic signal still recognized at the input of gate as the logic level.In TTL, the noise margins at both a logic 0 and a logic 1 is +0.4V.34 2.6 Gates design2. Metal oxide silicon gatesMOS transistor switches The MOS transistor has three terminals: the source terminal, the drain terminal, and the gate terminal. In a MOS transistor, to change the state of the transistor, a different voltage is applied to the gate terminal of the transistor.35 2.6 Gates designWhen the t

温馨提示

  • 1. 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
  • 2. 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
  • 3. 本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
  • 4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
  • 5. 人人文库网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
  • 6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
  • 7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

评论

0/150

提交评论