VHDL流水线加法器解析

1、可编程实验报告实验报告要求：1、任务的简单描述2、画出电路图3、写出源代码4、仿真结果5、分析和讨论1、3-8译码器 源代码：LIBRARY ieee;USE ieee.std_logic_1164.all;USE ieee.std_logic_arith.all;USE ieee.std_logic_signed.all;ENTITY dc38 ISPORT(sel : in std_logic_vector(2 downto 0); y : outstd_logic_vector(7 downto 0); END dc38;ARCHITECTURE behavior OF dc38 ISB

2、EGINy I一位全加器9 MAK - plui D - ciriidr*jadiar - |fu ldddl - CriHc Edilcr|rw Riw圧MW?+rpks II( V/nilorrTi EdbaiQK辭-QW5 IK-朴今忙化且 獅 rwr四级流水加法器kAn.o厶I *6 Mc+plw II Fie (dt祈TWNode Assign師阳Ciphss *nd*ow HippCisANanwQ.Qns -lI呦Clns2 M 4ns-Idfl Ont&D0 OnsM Dns.l.tlibrary ieee;use ieee.stdo gic_1164.all;use

3、ieee.std_logic_ un sig ned.all;use ieee.std_logic_arith.all;en tity adder isport(clk,rst : in std_logic;a,b : in stdo gic_vector(3 dow nto 0); sum : out std_logic_vector(3 dow nto 0); c:out std_logic);end en tity adder;architecture depict of adder issignal reg1: std_logic_vector(7 dow nto 0); signal

4、 reg2: std_logic_vector(6 dow nto 0); signal reg3:std_logic_vector(5 dow nto 0); beginbitO:process(clk,rst)beginif(rst=1) the n reg1=00000000;elsif(ris in g_edge(clk) the n reg1(0)= a(0) xor b(0); reg1(1)= a(0) and b(0); reg1(2)=a(1);reg1(3)= b(1);reg1(4)= a(2);第一级锁存器一一厶一位全加器一位全加器第二级锁存器第三级锁存器=一一一位全加

5、器一位全加器第四级锁存器reg1(5)= b(2);reg1(6)= a(3);reg1(7)= b(3);end if;end process bit0;bit1:process(clk,rst)beginif(rst=1) thenreg2=0000000;elsif(rising_edge(clk) thenreg2(0)= reg1(0);reg2(1)= reg1(1) xor reg1(2) xor reg1(3);reg2(2)= (reg1(1) and reg1(2)or(reg1(1)and reg1(3)or(reg1(2)and reg1(3);reg2(6 downt

6、o 3)=reg1(7 downto 4);end if;end process bit1;bit2:process(clk,rst)beginif(rst=1) thenreg3=000000;elsif(rising_edge(clk) thenreg3(1 downto 0)=reg2(1 downto 0);reg3(2)=reg2(2)xor reg2(3)xor reg2(4);reg3(3)=(reg2(2)and reg2(3)or(reg2(2)and reg2(4)or(reg2(3)and reg2(4); reg3(5downto 4)=reg2( 6 downto 5

7、);end if;end process bit2;bit3:process(clk,rst)beginif(rst=1) thensum=0000;c=0;elsif(rising_edge(clk) thensum(2 downto 0)=reg3(2 downto 0);sum(3)=reg3(3)xor reg3(4)xor reg3(5);c=(reg3(3)and reg3(4)or(reg3(3)and reg3(5)or(reg3(4)and reg3(5);end if;end process bit3;end depict;library ieee;use ieee.std

8、_logic_1164.all; use ieee.std_logic_ un signed.all;ieee.std_logic_arith.all;R&gist&red PerformanoeOwfc |dL( (inphi3DnliidKTi. :1EuQK*pe4i：7h* =晦 175 43HHCuseen tity n oadd isport(clk,rst : in std_logic;a,b : in std_logic_vector(3 downto 0); sum : outstd_logic_vector(3 downto 0); c : outstd_l

9、ogic);end entity noadd;architecture depict of noadd is signal reg : std_logic_vector(4downto 0); signal rega: std_logic_vector(4 downto 0); signalregb: std_logic_vector(4 downto 0); beginprocess(clk) beginif(rising_edge(clk)then rega=0& a; regb=0& b;end if;end process; process(clk) beginif(r

10、st=1)then reg=00000;elsif(rising_edge(clk)thenreg=rega+regb;end if;end process; sum=reg(3 downto 0); c=reg(4);end depict;4位十进制数计数器en tity dec_disp isport( clk_c nt : instd_logic;Registered PerformancepWlnstiMT rm4 QKt pnod 3 6mFi碎冲1i41EMHT创訥 | Lls4 Paths IM2,T.CVOTlibrary ieee;ieee.stdo gic_1164.all

11、;ieee.std_logic_ un signed.all;ieee.std_logic_arith.all;useuseusesel1 : out std_logic_vector(3 dow nto 0); sel2 : outstd_logic_vector(3 downto 0); sel3 : outstd_logic_vector(3 downto 0); sel4 : outstd_logic_vector(3 downto 0);end dec_disp;architecture behav of dec_disp issignaldata1: std_logic_vecto

12、r(3 downto 0);signaldata2: std_logic_vector(3 downto 0);signaldata3: std_logic_vector(3 downto 0);signaldata4: std_logic_vector(3 downto 0);begincount:process(clk_cnt)beginif(rising_edge(clk_cnt)thenif(data1=1001)thendata1=0000;elseif(data2=1001)thendata2=0000;data1=data1+1;elseif(data3=1001)thendat

13、a3=0000;data2=data2+1; elseif(data4=1001)thendata4=0000;data3=data3+1;else data4=data4+1;end if; end if;end if;end if;end if;endprocesscount;sel1=data1;sel2=data2;sel3=data3; sel4|*W 5lq|T Q|wgqQZ 11 fi|JiGr qHQgQZ uhfdHiufT CHGOittrdJi日aT DJHoa抄jTTJdai屮agHaaQ/-pm_r1 Hq|f Q|HQDOL-少啄卩GHiaaCi/ pn_t1 E

14、Fq|7 U|naad?斶|7 0H M三| jj Tifne |i昇 而O.flnsiI萄dnsIMOlra400 OntGOOOnsTODChsM Dns.l.COD03DO面sin.mif 文件depth=256;width=8;address_radix=dec;GOGO吞丁 V 勺九 MJ,T.O/1Bdata_radix=dec;content二：LL4KB 87:234;88:233; 89:231; 90:229; 91:227;92:225; 93:223; 94:221; 95:219;96:216; 97:214; 98:212; 99:209;100:207;101:2

15、04;102:202;103:199;104:196;105:194;106:191;107:188;108:186;109:183;110:180;111:177;112:174;113:171;114:168;115:165;116:162;117:159;118:156;31!219;75:250;119:153;32:221;76:250;120:150;33:223;77:249;121:147;34:225;78:247;122:144;35:227;79:246;123:141;36:229;80:245;124:137;37:231;81:244;125:134;38:233;

16、82:242;126:131;39:234;83:241;127:128;40:236;84:239;128:125;41:238;85:238;129:122;42:239;86:236;130:119;begin0: 131;43:241;44:242;45:244;46:245;47:246;48:247;49:249;50:250;51:250;52:251;53:252;54:253;55:254;56:254;57:255;58:255;59:255;60:255;61:255;62:255;63:255;64:255;65:255;66:255;67:255;68:255;69:

17、255;70:254;71:254;72:253;73:252;74:251;131:115;175:10;219:29;132:112;176:9;220:31;133:109;177:7;221:33;134:106;178:6;222:35;135:103;179:6;223:37;136:10;180:5;224:40;137:97;181:4;225:42;138:94;182:3;226:44;139:91;183:2;227:47;140:88;184:2;228:49;141:85;185:1;229:52;142:82;186:1;230:54;143:79;187:1;23

18、1:57;144:76;188:0;232:60;145:73;189:0;233:62;146:70;190:0;234:65;147:68;191:0;235:68;148:65;192:0;236:70 ;149:62;193:0;237:73;150:60;194:0;238:76;151:57;195:1;239:79;152:54;196:1;240:82;153:52;197:1;241:85;154:49;198:2;242:88;155:47;199:2;243:91;156:44;200:3;244:94;157:42;201:4;245:97;158:40;202:5;246:100;159:37;203: