运算放大器稳定性和输入电容

1、Amplifiers: Op AmpsTexas Instruments IncorporatedOp amp stability and input capacitanceBy Ron Mancini (Email: rmancini)Staff Scientist, Advanced Analog ProductsIntroductionOp amp instability is compensated out with the addition ofan external RC network to the circuit. There are thousandsof different

2、 op amps, but all of them fall into two categories:uncompensated and internally compensated. Uncompen-sated op amps always require external compensation components to achieve stability; while internally compen-sated op amps are stable, under limited conditions, withno additional external components.

3、Internally compensated op amps can be made unstablein several ways: by driving capacitive loads, by addingcapacitance to the inverting input lead, and by adding inphase feedback with external components. Adding in phasefeedback is a popular method of making an oscillator thatis beyond the scope of t

4、his article. Input capacitance ishard to avoid because the op amp leads have stray capaci-tance and the printed circuit board contributes some straycapacitance, so many internally compensated op amp circuits require external compensation to restore stability.Output capacitance comes in the form of s

5、ome kind ofloada cable, converter-input capacitance, or filtercapacitanceand reduces stability in buffer configurations.Stability theory reviewThe theory for the op amp circuit shown in Figure 1 istaken from Reference 1, Chapter 6. The loop gain, A, iscritical because it solely determines stability;

6、 input circuitsand sources have no effect on stability because inputs aregrounded for the stability analysis. Equation 1 is the loop-gain equation for the resistive case where Z = R.aRGA=(1)FGBeware of Equation 1; its simplicity fools peoplebecause they make the assumption that A = a, which isnot tr

7、ue for all cases. Stability can be determined easilyfrom a plot of the loop gain versus frequency. The criticalpoint is when the loop gain equals 0 dB (gain equals 1)because a circuit must have a gain 1 to become unstable.The phase margin, which is the difference between themeasured phase angle and

8、180º, is calculated at the 0-dBpoint. A typical open-loop-gain curve for the TLV278xfamily of op amps is used as a teaching example and isshown in Figure 2.The op amps open-loop gain and phase (a in Equation 1)are represented in Figure 2 by the left and right verticalaxes, respectively. Never a

9、ssume that the op amp open-loop-gain curve is identical to the loop gain because externalcurve. When RF= 0 and RG= , the op amp reduces to anoninverting buffer amp (unity gain) and the loop gainbecomes equal to the op amp open-loop gain. We canobtain the buffer phase margin directly from Figure 2 by

10、tracing the gain line down from its vertical intercept (atapproximately 78 dB) to where it crosses the 0-dB line atapproximately 8 MHz. Then we can trace the 8-MHz lineup until it intersects the phase curve, and read the phasemargin as approximately 56º. This plot was made withphase margin, but

11、 many plots are made instead with phaseshift. For plots made with phase shift, the phase shift mustbe subtracted from 180º to obtain the phase margin.Now that we have the phase margin, what can we doTexas Instruments IncorporatedAmplifiers: Op AmpsFigure 3 is a plot of phase margin and percent

12、maximumovershoot versus a dummy variable, the damping ratio.Enter this plot at a phase margin of 56º and go up to thephase curve intersection. At this point, go horizontally(constant damping ratio) to the intersection of the over-shoot curve, and then drop down to read an overshoot ofapproximat

13、ely 11%. This plot enables the designer to pre-dict the transient step response from the phase margin,and transient response is a measure of relative stability.Added input capacitance and its effectWhen input capacitors are added to the circuit (see Figure 4), they cause a pole to occur in the loop

14、gain, asshown in Equation 2.aZGaRG1(2)A=×ZGRFRGRFRRC+1GFINThe input capacitor, CIN, is the summation of all theinverting input capacitances, and it adds a pole to the loopThe external resistors come into play when the op ampis conFigured as an inverting, noninverting, or differentialamplifier.

15、When RF= RG, Equation 1 reduces to A= a/2;and the vertical intercept for the amplifier reduces fromthat of the buffer by 6 dB. Although the vertical intercepthas changed, the pole location remains constant becausegain is not tied to phase. The 0-dB crossover frequencychanges to approximately 3 MHz b

16、ecause of the gain drop;the phase margin increases to approximately 87º and thepercent overshoot is negligible. Notice that the buffer isless stable than any of the amplifier circuits and that, atthe same phase margin, the inverting gain is 1 while thenoninverting gain is 2.gain. Adding a pole

17、to the loop gain does not always changethe stability because the pole location and its added phaseshift may not affect the phase margin. Consider the casewhere the pole is located at a very high frequencysay,100 MHzfor the TLV278x. Notice from Figure 2 that theop amp open-loop gain is so low above 1

18、0 MHz that theoverall gain can never equal 1, so the added pole is of novalue. The case where the pole is located at a very low frequencysay, 0.001 Hzis harder to calculate becausethe low-frequency response is not shown in Figure 2.However, we can be sure that the phase shift is close to zeroat this

19、 frequency. A pole with a frequency intercept thatlow would cause the gain to be down 120 dB at 1 kHz, andagain the loop gain would be less than 1 before the phasemargin went to zero. An op amp open-loop gain/phase plotthat shows low-frequency response is shown in Figure 5.Notice that the phase shif

20、t (not phase margin in this plot)approaches zero at low frequencies. In addition, notice thatthe phase shift approaches 180º at very high frequenciesand that the gain is given in ratios rather than in decibels.Amplifiers: Op AmpsTexas Instruments IncorporatedThe DC gain in Equation 2 remains th

21、e same as it waswithout an input capacitor, but the pole is added at f = 1/(2RF|RGCIN). If this pole occurs at approximately 3 MHz, it reduces the gain by 3 dB and adds a 45º phase shiftat that frequency. Using CIN= 20 pF and RG|RF= 2.7 kyields a 3-dB frequency of 2.94 MHz, so it is reasonable

22、toassume a pole frequency of 3 MHz. The gain in Figure 4must be moved down 9 dB to account for the resistors andthe pole. The new 0-dB crossover frequency is 2 MHz, andthe phase margin at 2 MHz (as shown in Figure 4) is 89º.The pole phase shift of 45º must be subtracted from thecurve phase

23、 margin to obtain the final circuit phase margin;thus = 89º 45º = 44º. The percent overshoot correspond-ingto the 44º phase margin is 24.45%. Adding CINreducesthe phase margin from 87º in the purely resistive case to44º with input capacitance. If the op amp initially ha

24、d lessthan a 44º phase margin, the circuit would be unstablerather than just bouncy.If the resistor values were larger than 5.4 k, the polewould move down in frequency. The exact pole locationthat does the most damage to stability is hard to calculatebecause the phase is a nonlinear tangent fun

25、ction. In thiscase, it is best to move the resistors down in value toabout 1 k, thus moving the pole to 8 MHz and reducingthe added phase shift to about 14º. A second problemcrops up in the noninverting configuration because CIDcouples a portion of the input signal to the inverting input.This a

26、ction reduces the common-mode rejection capabilityand introduces high-frequency distortion.The buffer circuit with an input capacitance is shown inFigure 6. Notice that the input capacitance includes theoutput capacitance and load capacitance in the absence ofa feedback resistor, and that the output

27、 impedance, ZOUT,comes into play.The buffer loop gain is given asA=RF+ZOUTCIN+1a.(3)First, consider the case when RF= 0; ZOUTis obtainedfrom Figure 7 as 70 at 8 MHz. Assuming that the input,output, and load capacitance is 100 pF, the pole frequencyis located at 22.7 MHz; and this pole adds a 19.4

28、86; phaseshift at the 0-dB crossover frequency. This added phaseshift subtracts directly from the previously calculatedphase margin of 56º because the pole attenuation doesntTexas Instruments IncorporatedAmplifiers: Op Ampsoccur until after the 0-dB crossover frequency. This circuithas a phase

29、margin of 56º 19.4º = 36.6º, leading to anovershoot of 33%.When RF= 1 k, the RFCINpole is located at 8 MHz; so it becomes dominant. Under these conditions, the gaincurve moves down 3 dB and the phase shift is increased45º. Moving the gain curve down 3 dB yields an 80º phasem

30、argin at f = 4 MHz. Subtracting 45º plus 19.4º from 80ºyields a phase margin of 15.6º, and the overshoot increasesto approximately 50%. It is obvious that increasing thevalue of RFmakes it dominant over ZOUTand will quicklymake the circuit oscillate.circuit becomes; but the pole

31、always ends up cancelingthe zero. The idea is to place the zero so that we achievethe required overshoot and then to accept the pole loca-tion. The open-loop zero translates to a closed-loop pole;thus CFalways decreases high-frequency performance.Optimal performance is gained when the acceptable ove

32、r-shoot is obtained at an acceptable frequency response.ConclusionThe addition of input, output, or load capacitance to an opamp circuit decreases stability, which leads to overshoot inthe time domain. The stability decrease is worse for abuffer than for other amplifier configurations. Reducingthe r

33、esistance value that makes up the RC circuit reducesthe effect of the capacitance; this effect leads to the ruleof thumb that high frequencies and low resistance gotogether. Input capacitance is easily compensated byadding a feedback capacitor into the circuit. The value ofthe feedback capacitor sho

34、uld be just large enough toachieve the desired overshoot response, because largervalues cause a loss of high-frequency performance.CFincreases stabilityInput and output capacitors always decrease stability. Inputcapacitors are a pole in the open-loop transfer function,but they are a zero in the clos

35、ed-loop transfer function.The closed-loop zero increases the circuit (not the opamp) bandwidth, so sometimes input capacitors are addedto the circuit to improve high-frequency response.A capacitor placed in parallel with the feedback resistor,CF, introduces a zero into the loop gain:aRGRFCF+1A=×

36、;FGRRC+C+1FGFGReference1.Ron Mancini, Op Amps For Everyone(NewnesPublishers, 2003). An earlier 2002 edition is available at(4)When the closed-loop gain is greater than 1 and CFisgreater than CG, the zero precedes the pole. In this case,which is not unusual, the zero contributes a positive phaseshift

37、 to the loop-gain plot, causing an increase in stability.The more the zero leads the pole, the more stable theRelated Web sitesIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reservethe right to make corrections, modifications, enhancements,improvements, and other changes to

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