FPGA实验三液晶屏的显示设计Word版

1、传播优秀word版文档 ，希望对您有帮助，可双击去除！专业：_电子信息工程_姓名：_陈华杰_学号：_日期：_4月4日_地点：应电楼303桌号2组 实验报告课程名称：_fpga实验_指导老师：_竺红卫/陈宏_成绩：_实验名称：_液晶屏的显示设计_实验类型：_fpga实验_同组学生姓名：_一、 实验目的1. 熟悉实验板上液晶屏的工作原理；2. 熟悉驱动电路的源代码。二、实验装置1. 电脑一台；2. 实验板一块；3. 实验板电源一只；4. 实验板连接电脑的下载线一根。三、实验原理实验板显著的特征是2 线16 字符液晶显示器lcd。尽管lcd 支持8 位的数据接口，为了与其它的xilinx 的开发板保

2、持兼容并且尽可能减少针脚数， fpga 仅通过4 位的数据接口线控制lcd， lcd 通过使用ascii 标准和自定义字符可以有效地显示多种信息。但是，这些显示速度并不是很快。每半秒扫描一次以测试实际清晰度的界限。与50mhz 时钟频率相比，这样的显示速度是慢的。 picoblaze 处理器可以有效地控制显示时间和显示内容。传播优秀word版文档 ，希望对您有帮助，可双击去除！字符 lcd 的供电电压是5v。 fpga 的i/o 口信号的电压是3.3v。但是， fpga 的输出电平是通过lcd 来识别是有效的低电平还是高电平。 lcd 控制器接收5v ttl 信号电平， fpga输出3.3v

3、的lcmos 以满足5v ttl 电压要求。数据线上的390 欧串联电阻，当lcd 驱动一个逻辑高电平时，其用来防止了fpga 和srtataflsah i/o 管脚的超负载。当lcd_rw 为高时， lcd驱动数据线。在绝大多数应用中， lcd作为只读外围设备，几乎没有从显示器读数据。四、操作方法和实验步骤对于程序的各个步骤，如新建项目、新建verilog hdl、新建.ucf文件、synthesize、implement design、generate programming file、configure target device等等，在实验一中已经展示过，每一次实验的基本操作步骤都是差

4、不多的，故这里不再重复阐述。本次实验总共需要做三份程序并观察现象：1）例程2）设计按键拨动时显示小时、分钟和秒，中间分别空一格。3）按键拨动开始显示，10秒钟显示结束，结束时lcd上显示abcdef，同时八只led灯亮。五、实验源代码和现象1）例程ucf文件如下：net "clk_50mhz" loc="c9"net "lcd_d<0>" loc="r15"net "lcd_d<1>" loc="r16"net "lcd_d<2>

5、" loc="p17"net "lcd_d<3>" loc="m15"net "lcd_e" loc="m18"net "lcd_rs" loc="l18"net "lcd_rw" loc="l17"源代码如下：module lcd_write_number_test(input clk_50mhz,output lcd_e,output lcd_rs,output lcd_rw,output

6、3:0 lcd_d);wire if_ready;reg if_write;reg 31:0 if_data;reg 1:0 state;reg 31:0 cntr;parameter idle = 2'b00,if_write_1 = 2'b01,set_if_write_0 = 2'b10,wait = 2'b11;传播优秀word版文档 ，希望对您有帮助，可双击去除！/ instantiate the unit under test (uut)lcd_write_number uut(.clk_50mhz(clk_50mhz),.lcd_e(lcd_e),

7、.lcd_rs(lcd_rs),.lcd_rw(lcd_rw),.lcd_d(lcd_d),.if_data(if_data),.if_write(if_write),.if_ready(if_ready);initial beginif_data <= 32'habba0123;state <= idle;if_write <= 1'b0;cntr <= 32'b0;endalways (posedge clk_50mhz) begincase (state)idle:if (if_ready) beginif_data <= if_da

8、ta + 1'b1;if_write <= 1'b1;state <= if_write_1;cntr <= 32'b0;endif_write_1: / this state to keep if_write up for 2 cyclesstate <= set_if_write_0;set_if_write_0: / set if_write 0 and start the counterbeginif_write <= 1'b0;state <= wait;cntr <= 32'b0;endwait:if

9、 (cntr < 25000000) / wait for 0.5 secondscntr <= cntr + 32'b1;elsestate <= idle;endcaseendendmodule传播优秀word版文档 ，希望对您有帮助，可双击去除！timescale 1ns / 1psmodule lcd_write_number(input clk_50mhz,output lcd_e,output lcd_rs,output lcd_rw,output 3:0 lcd_d,input 31:0 if_data,input if_write,output if_

10、ready);reg 7:0 disp_data;reg disp_rs;reg 31:0 disp_delay;reg disp_write;wire disp_ready;reg disp_b8;reg 7:0 char;reg 1:0 state;reg 31:0 number;reg init_done;reg running;reg 4:0 shift_cntr;reg if_ready_r;assign if_ready = if_ready_r;lcd_display display(.clk(clk_50mhz),.rst(1'b0),.lcd_e(lcd_e),.lc

11、d_rw(lcd_rw),.lcd_rs(lcd_rs),.lcd_d(lcd_d),.if_data(disp_data),.if_rs(disp_rs),.if_delay(disp_delay),.if_write(disp_write),.if_ready(disp_ready),.if_8bit(disp_b8);parameter nb_chars = 8'd12;parameter start = 2'b00,wait_write_0 = 2'b01,write_1 = 2'b10,传播优秀word版文档 ，希望对您有帮助，可双击去除！wait_w

12、rite_1 = 2'b11;initial beginstate <= 2'b00;char <= 8'b0;init_done <= 1'b0;if_ready_r <= 1'b0;shift_cntr <= 5'b0;endalways (posedge clk_50mhz) beginif (init_done && char > 8'd16) beginif (disp_ready)if_ready_r <= 1'b1;if (if_write) begincha

13、r <= 4'd8; / reset the displayendend else if (char <= 8'd16) beginif_ready_r <= 1'b0;case (state)start:if (disp_ready) begindisp_write <= 1'b1;state <= wait_write_0;endwait_write_0:state <= write_1;write_1:begindisp_write <= 1'b0;state <= 2'b11;endwait

14、_write_1:beginstate <=start;char <= char + 8'b1;endendcase / case (state)end / else: !if(!running)end / always (posedge clk_50mhz)always (negedge clk_50mhz) begin/ these next steps initialize the lcd display:case (char)0:begindisp_b8 <= 1'b0;传播优秀word版文档 ，希望对您有帮助，可双击去除！disp_data <

15、= 8'h30;disp_delay <= 32'd10000000;disp_rs <= 1'b0;end1: disp_data <= 8'h30;2:begindisp_data <= 8'h30;disp_delay <= 32'd1000000;end3:begindisp_data <= 8'h20;disp_delay <= 32'd20000;end4:begindisp_b8 <= 1'b1;disp_data <= 8'h28;end5: d

16、isp_data <= 8'h06;6: disp_data <= 8'h0c;7:begindisp_data <= 8'h01;disp_delay <= 32'd1000000;init_done <= 1'b1;shift_cntr <= 5'd9;end8: / this state provides an entry point to reset the display and then/ go on to the default state that writes the numberbegind

17、isp_rs <= 1'b0;disp_data <= 8'h01;disp_delay <= 32'd1000000;shift_cntr <= 5'b0;number <= if_data;enddefault:/ state machine to print a 32-bit number outif (disp_ready && state = start) beginif (shift_cntr < 5'd8) begindisp_rs <= 1'b1;disp_delay &l

18、t;= 32'd20000;传播优秀word版文档 ，希望对您有帮助，可双击去除！if (number31:28 < 4'b1010)disp_data <= number31:28 + 8'h30;elsedisp_data <= number31:28 + 8'h37;number <= number << 4;shift_cntr <= shift_cntr + 5'b1;endendendcase / case (char)end / always (negedge clk_50mhz)endmodule

19、timescale 1ns / 1psmodule lcd_display(input clk,input rst,output lcd_e,output lcd_rw,output lcd_rs,output 3:0 lcd_d,input 7:0 if_data,input if_rs,input 31:0 if_delay,input if_write,output if_ready,input if_8bit);reg 2:0 state;reg lcdr_e;reg 3:0 lcdr_d;reg 31:0 wait_cntr;reg ready;reg init_done;param

20、eter idle = 3'b000,wait_pulse_e_0 = 3'b001,load_lower_nibble = 3'b010,wait_pulse_e_1 = 3'b011,wait_command = 3'b100;parameter pulse_e_dly = 32'd12;parameter init_time = 32'd20000000;assign lcd_d = lcdr_d;assign lcd_rs = if_rs;assign lcd_rw = 1'b0;assign lcd_e = lcdr_e

21、;assign if_ready = ready;传播优秀word版文档 ，希望对您有帮助，可双击去除！initial beginstate <= idle;ready <= 1'b0;lcdr_e <= 1'b0;init_done <= 1'b0;endalways (posedge clk) beginif (rst) beginstate <= idle;end else if (!init_done) beginif (wait_cntr < init_time)wait_cntr <= wait_cntr + 1;e

22、lse begininit_done <= 1'b1;ready <= 1'b1;endend else begincase (state)idle:beginif (if_write) beginlcdr_e <= 1'b1;lcdr_d <= if_data7:4; / upper nibble firstready <= 1'b0;wait_cntr <= 32'b0;state <= wait_pulse_e_0;endendwait_pulse_e_0:if (wait_cntr < pulse_

23、e_dly) beginwait_cntr <= wait_cntr + 1;end else beginlcdr_e <= 1'b0;wait_cntr <= 0;if (if_8bit)state <= load_lower_nibble;elsestate <= wait_command;endload_lower_nibble:if (wait_cntr < pulse_e_dly) beginwait_cntr <= wait_cntr + 1;end else beginwait_cntr <= 0;传播优秀word版文档 ，

24、希望对您有帮助，可双击去除！lcdr_e <= 1'b1;lcdr_d <= if_data3:0; / lower nibblestate <= wait_pulse_e_1;endwait_pulse_e_1:if (wait_cntr < pulse_e_dly) beginwait_cntr <= wait_cntr + 1;end else beginlcdr_e <= 1'b0;wait_cntr <= 0;state <= wait_command;endwait_command:if (wait_cntr <

25、 if_delay) beginwait_cntr <= wait_cntr + 32'b1;end else beginwait_cntr <= 0;if (!if_write) beginstate <= idle;ready <= 1'b1;endendendcase / case (state)endendendmodule共有三个module，它们的包含关系为lcd_write_number_test包含lcd_write_number，lcd_write_number包含lcd_display，下同。实验现象：如下图，刚烧录程序完时，lcd前

26、8位依次显示十六进制数“abba0123”，然后每过0.5秒，该数值增一，满十六进位。传播优秀word版文档 ，希望对您有帮助，可双击去除！2）设计按键拨动时显示小时、分钟和秒，中间分别空一格。ucf文件如下：net "clk_50mhz" loc="c9"net "lcd_d<0>" loc="r15"net "lcd_d<1>" loc="r16"net "lcd_d<2>" loc="p17"n

27、et "lcd_d<3>" loc="m15"net "lcd_e" loc="m18"net "lcd_rs" loc="l18"net "lcd_rw" loc="l17"net "sw1" loc="l14"源代码如下：module lcd_write_number_test(input sw1,input clk_50mhz,output lcd_e,output lcd_rs

28、,output lcd_rw,output 3:0 lcd_d);wire if_ready;reg if_write;reg 31:0 if_data;reg 1:0 state;reg 31:0 cntr;parameter idle = 2'b00,if_write_1 = 2'b01,set_if_write_0 = 2'b10,wait = 2'b11;/ instantiate the unit under test (uut)lcd_write_number uut(.sw1(sw1),.clk_50mhz(clk_50mhz),.lcd_e(lc

29、d_e),.lcd_rs(lcd_rs),.lcd_rw(lcd_rw),.lcd_d(lcd_d),.if_data(if_data),.if_write(if_write),.if_ready(if_ready);传播优秀word版文档 ，希望对您有帮助，可双击去除！initial beginif_data <= 32'h19044012;state <= idle;if_write <= 1'b0;cntr <= 32'b0;endalways (posedge clk_50mhz) begincase (state)idle:if (if

30、_ready) beginif(if_data31:0=32'h23059059)if_data <= 32'h0;else if(if_data27:0=28'h9059059)if_data <= if_data + 32'h6fa6fa7;else if(if_data19:0=20'h59059)if_data <= if_data + 32'hfa6fa7;else if(if_data15:0=16'h9059)if_data <= if_data + 32'h6fa7;else if(if_d

31、ata7:0=8'h59)if_data <= if_data + 32'hfa7;else if(if_data3:0=4'h9)if_data <= if_data + 32'h7;else if_data <= if_data + 1'b1;if_write <= 1'b1;state <= if_write_1;cntr <= 32'b0;endif_write_1: / this state to keep if_write up for 2 cyclesstate <= set_if_

32、write_0;set_if_write_0: / set if_write 0 and start the counterbeginif_write <= 1'b0;state <= wait;cntr <= 32'b0;endwait:if (cntr < 50000000) / wait for 1 secondscntr <= cntr + 32'b1;elsestate <= idle;endcase传播优秀word版文档 ，希望对您有帮助，可双击去除！endendmoduletimescale 1ns / 1psmodul

33、e lcd_display(input clk,input rst,output lcd_e,output lcd_rw,output lcd_rs,output 3:0 lcd_d,input 7:0 if_data,input if_rs,input 31:0 if_delay,input if_write,output if_ready,input if_8bit);reg 2:0 state;reg lcdr_e;reg 3:0 lcdr_d;reg 31:0 wait_cntr;reg ready;reg init_done;parameter idle = 3'b000,w

34、ait_pulse_e_0 = 3'b001,load_lower_nibble = 3'b010,wait_pulse_e_1 = 3'b011,wait_command = 3'b100;parameter pulse_e_dly = 32'd12;parameter init_time = 32'd20000000;assign lcd_d = lcdr_d;assign lcd_rs = if_rs;assign lcd_rw = 1'b0;assign lcd_e = lcdr_e;assign if_ready = ready

35、;initial beginstate <= idle;ready <= 1'b0;lcdr_e <= 1'b0;init_done <= 1'b0;end传播优秀word版文档 ，希望对您有帮助，可双击去除！always (posedge clk) beginif (rst) beginstate <= idle;end else if (!init_done) beginif (wait_cntr < init_time)wait_cntr <= wait_cntr + 1;else begininit_done <=

36、 1'b1;ready <= 1'b1;endend else begincase (state)idle:beginif (if_write) beginlcdr_e <= 1'b1;lcdr_d <= if_data7:4; / upper nibble firstready <= 1'b0;wait_cntr <= 32'b0;state <= wait_pulse_e_0;endendwait_pulse_e_0:if (wait_cntr < pulse_e_dly) beginwait_cntr &l

37、t;= wait_cntr + 1;end else beginlcdr_e <= 1'b0;wait_cntr <= 0;if (if_8bit)state <= load_lower_nibble;elsestate <= wait_command;endload_lower_nibble:if (wait_cntr < pulse_e_dly) beginwait_cntr <= wait_cntr + 1;end else beginwait_cntr <= 0;lcdr_e <= 1'b1;lcdr_d <= if

38、_data3:0; / lower nibblestate <= wait_pulse_e_1;endwait_pulse_e_1:if (wait_cntr < pulse_e_dly) begin传播优秀word版文档 ，希望对您有帮助，可双击去除！wait_cntr <= wait_cntr + 1;end else beginlcdr_e <= 1'b0;wait_cntr <= 0;state <= wait_command;endwait_command:if (wait_cntr < if_delay) beginwait_cnt

39、r <= wait_cntr + 32'b1;end else beginwait_cntr <= 0;if (!if_write) beginstate <= idle;ready <= 1'b1;endendendcase / case (state)endendendmoduletimescale 1ns / 1psmodule lcd_write_number(input clk_50mhz,input sw1,output lcd_e,output lcd_rs,output lcd_rw,output 3:0 lcd_d,input 31:0

40、 if_data,input if_write,output if_ready);reg 7:0 disp_data;reg disp_rs;reg 31:0 disp_delay;reg disp_write;wire disp_ready;reg disp_b8;reg 7:0 char;reg 1:0 state;reg 31:0 number;reg init_done;传播优秀word版文档 ，希望对您有帮助，可双击去除！reg running;reg 4:0 shift_cntr;reg if_ready_r;assign if_ready = if_ready_r;lcd_dis

41、play display(.clk(clk_50mhz),.rst(1'b0),.lcd_e(lcd_e),.lcd_rw(lcd_rw),.lcd_rs(lcd_rs),.lcd_d(lcd_d),.if_data(disp_data),.if_rs(disp_rs),.if_delay(disp_delay),.if_write(disp_write),.if_ready(disp_ready),.if_8bit(disp_b8);parameter nb_chars = 8'd12;parameter start = 2'b00, wait_write_0 = 2

42、'b01, write_1 = 2'b10, wait_write_1 = 2'b11; initial beginstate <= 2'b00;char <= 8'b0;init_done <= 1'b0;if_ready_r <= 1'b0;shift_cntr <= 5'b0;endalways (posedge clk_50mhz) beginif (init_done && char > 8'd16) begin if (disp_ready) if_ready

43、_r <= 1'b1; if (if_write) begin char <= 4'd8; / reset the display传播优秀word版文档 ，希望对您有帮助，可双击去除！ endend else if (char <= 8'd16) begin if_ready_r <= 1'b0; case (state) start:if (disp_ready) begindisp_write <= 1'b1;state <= wait_write_0;endwait_write_0:state <= wri

44、te_1;write_1:begindisp_write <= 1'b0;state <= 2'b11;endwait_write_1:beginstate <= start;char <= char + 8'b1;endendcase / case (state)end / else: !if(!running)end / always (posedge clk_50mhz)always (negedge clk_50mhz) begin/ these next steps initialize the lcd display:case (ch

45、ar)0:begindisp_b8 <= 1'b0;disp_data <= 8'h30;disp_delay <= 32'd10000000;disp_rs <= 1'b0;end1: disp_data <= 8'h30;传播优秀word版文档 ，希望对您有帮助，可双击去除！2:begindisp_data <= 8'h30;disp_delay <= 32'd1000000;end3:begindisp_data <= 8'h20;disp_delay <= 32'

46、;d20000;end4:begindisp_b8 <= 1'b1;disp_data <= 8'h28;end5: disp_data <= 8'h06;6: disp_data <= 8'h0c;7:begindisp_data <= 8'h01;disp_delay <= 32'd1000000;init_done <= 1'b1;shift_cntr <= 5'd9;end8: / this state provides an entry point to reset the

47、 display and then/ go on to the default state that writes the numberbegindisp_rs <= 1'b0;disp_data <= 8'h01;disp_delay <= 32'd1000000;shift_cntr <= 5'b0;number <= if_data;enddefault:/ state machine to print a 32-bit number outif (sw1)begin传播优秀word版文档 ，希望对您有帮助，可双击去除！if

48、(disp_ready && state = start) begin if (shift_cntr < 5'd8) begin disp_rs <= 1'b1; disp_delay <= 32'd20000; if(shift_cntr = 5'd2) | (shift_cntr = 5'd5) begin disp_data <= 8'h20; endelse begin if (number31:28 < 4'b1010) disp_data <= number31:28 + 8

49、'h30; else disp_data <= number31:28 + 8'h37; endnumber <= number << 4; shift_cntr <= shift_cntr + 5'b1;endendendendcase / case (char)end / always (negedge clk_50mhz)endmodule实验现象：当sw1为低电平时，lcd无显示。sw1向上拨后，如下图，lcd显示小时、分钟和秒，中间分别空一格，且该输出显示会按照时钟的样式计时、刷新，每过一秒钟秒位进一，秒的个位满10进位，秒数满6

50、0则分数增一当sw1再次向下拨，lcd显示关闭，但始终仍然在计时。程序刚烧进板子时，时钟的初始时间是人为设定的19时44分12秒。传播优秀word版文档 ，希望对您有帮助，可双击去除！3）按键拨动开始显示，10秒钟显示结束，结束时lcd上显示abcdef，同时八只led灯亮。ucf文件如下：net "clk_50mhz" loc="c9"net "lcd_d<0>" loc=r15;net "lcd_d<1>" loc=r16;net "lcd_d<2>" l

51、oc=p17;net "lcd_d<3>" loc=m15;net "lcd_e" loc=m18;net "lcd_rs" loc=l18;net "lcd_rw" loc=l17;net "sw1" loc=l14;net "led0" loc=f12;net "led1" loc=e12;net "led2" loc=e11;net "led3" loc=f11;net "led4&quo

52、t; loc=c11;net "led5" loc=d11;net "led6" loc=e9;net "led7" loc=f9;源代码如下：module lcd_write_number_test(input clk_50mhz,input sw1,output lcd_e,output lcd_rs,output lcd_rw,output 3:0 lcd_d,output led0,output led1,output led2,output led3,output led4,output led5,output led6,o

53、utput led7);wire if_ready;reg if_write;reg 31:0 if_data;reg 1:0 state;reg 31:0 cntr;parameter idle = 2'b00,if_write_1 = 2'b01,传播优秀word版文档 ，希望对您有帮助，可双击去除！set_if_write_0 = 2'b10,wait = 2'b11;/ instantiate the unit under test (uut)lcd_write_number uut(.sw1(sw1),.clk_50mhz(clk_50mhz),.lc

54、d_e(lcd_e),.lcd_rs(lcd_rs),.lcd_rw(lcd_rw),.lcd_d(lcd_d),.if_data(if_data),.if_write(if_write),.if_ready(if_ready),.led0(led0),.led1(led1),.led2(led2),.led3(led3),.led4(led4),.led5(led5),.led6(led6),.led7(led7);initial beginif_data <= 32'h19044012;state <= idle;if_write <= 1'b0;cntr

55、 <= 32'b0;endalways (posedge clk_50mhz) begincase (state)idle:if (if_ready) beginif(if_data31:0=32'h23059059)if_data <= 32'h0;else if(if_data27:0=28'h9059059)if_data <= if_data + 32'h6fa6fa7;else if(if_data19:0=20'h59059)if_data <= if_data + 32'hfa6fa7;else if

56、(if_data15:0=16'h9059)if_data <= if_data + 32'h6fa7;else if(if_data7:0=8'h59)if_data <= if_data + 32'hfa7;传播优秀word版文档 ，希望对您有帮助，可双击去除！else if(if_data3:0=4'h9)if_data <= if_data + 32'h7;else if_data <= if_data + 1'b1;if_write <= 1'b1;state <= if_write_

57、1;cntr <= 32'b0;endif_write_1: / this state to keep if_write up for 2 cyclesstate <= set_if_write_0;set_if_write_0: / set if_write 0 and start the counterbeginif_write <= 1'b0;state <= wait;cntr <= 32'b0;endwait:if (cntr < 50000000) / wait for 1 secondscntr <= cntr +

58、 32'b1;elsestate <= idle;endcaseendendmoduletimescale 1ns / 1psmodule lcd_write_number(input clk_50mhz,input sw1,output lcd_e,output lcd_rs,output lcd_rw,output 3:0 lcd_d,output led0,output led1,output led2,output led3,output led4,output led5,output led6,output led7,传播优秀word版文档 ，希望对您有帮助，可双击去除

59、！input 31:0 if_data,input if_write,output if_ready);reg 7:0 disp_data;reg disp_rs;reg 31:0 disp_delay;reg disp_write;wire disp_ready;reg disp_b8;reg 7:0 char;reg 1:0 state;reg 31:0 number;reg init_done;reg running;reg 4:0 shift_cntr;reg if_ready_r;reg 28:0 cnt;reg cnt_state;reg light;assign if_ready = if_ready_r;lcd_display display(.clk(clk_50mhz),.rst(1'b0),.lcd_e(lcd_e),.lcd_rw(lcd_rw),.lcd_rs(lcd_rs),.lcd_d(lcd_d),.if_data(disp_data),