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1、PCM1716TM 24-Bit, 96kHz Sampling CMOS Delta-Sigma Stereo AudioDIGITAL-TO-ANALOG CONVERTERFEATURES ENHANCED MULTI-LEVEL DELTA-SIGMA DAC SAMPLING FREQUENCY (fs): 16kHz - 96kHz INPUT AUDIO DATA WORD: 16-, 20-, 24-Bit HIGH PERFORMANCE: THD+N: 96dBDynamic Range: 106dB SNR: 106dBAnalog Output Range: 0.62

2、x VCC (Vp-p) 8x OVERSAMPLING DIGITAL FILTER: Stop Band Attenuation: 82dB Passband Ripple: 0.002dBSlow Roll Off MULTI FUNCTIONS: Digital De-emphasisL/R Independent Digital Attenuation Soft MuteZero Detect Mute Zero FlagChip SelectReversible Output Phase +5V SINGLE SUPPLY OPERATION SMALL 28-LEAD SSOP

3、PACKAGEDESCRIPTIONThe PCM1716 is designed for Mid to High grade Digital Audio applications which achieve 96kHz sam- pling rates with 24-bit audio data. PCM1716 uses a newly developed, enhanced multi-level delta-sigma modulator architecture that improves audio dynamic performance and reduces jitter s

4、ensitivity in actual applications.The internal digital filter operates at 8x over sampling at a 96kHz sampling rate, with two kinds of roll-off performances that can be selected: sharp roll-off, or slow roll-off, as required for specific applications.PCM1716 is suitable for Mid to High grade audio a

5、pplications such as CD, DVD-Audio, and Music truments, since the device has superior audio dynamic performance, 24-bit resolution and 96kHzsampling.BCK LRC Derial put I/F8X Oversampling Digital Filter with FunctionEnhanced Multi-level Delta-SigmaDACLow-pass FilterVCC2LAGND2LVCC2R AGND2LVOUTL EXTLCon

6、trollerModulatorDACLow-passVOUTRML/IISMC/DM1 MD/DM0CS/IWO MODE MUTE RSTMode Control I/FSCKCrystal/OSCBPZ-Cont. Open DrainPower SupplyFilterEXTRZEROXTIXTOCLKOVCC1 AGND1 VDD DGNDInternational Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd.,

7、Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: / FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132 1997 Burr-Brown CorporationPDS-1415CPrinted in U S A August, 1998SPECIFICATION

8、SAll specifica ions at +25C, +VCC = +VDD = +5V, fS = 44.1kHz, and 24-bit input data, SYSCLK = 384fS, unless otherwise noted.PARAMETERCONDITIONSPCM1716UNITSMINTYPMAXRESOLUTION24BitsDATA FORMATAudio Data Interface Format Data Bit LengthAudio Data Format Sampling Frequency (fS) System Clock Frequency(1

9、)1M16Standard/I2S/20/24 Selectabl B First, 2s Com6/384/512/768fS96kHzDIGITAL INPUT/OUTPUT LOGIC LEVELInput Logic LevelVIH VILOutput Logic Level (CLKO) VOHVOLIOH = 2mA IOL = 4mA2.0V V V VCLKO PERFORMANCE(2)Output Rise Time20 80% VDD, 10pF5.5nsOutput Fall Time80 20% VDD, 10pF4nsOutput Duty Cy

10、cle10pF Load37%DYNAMIC PERFORMANCE(3) (24-Bit Data)THD+NVO = 0dBfS = 44.1kHz9790dBfS = 96kHz94dBVO = 60dBfS = 44.1kHz42dBDynamic RangefS =44.1kHz EIAJ A-weighted98106dBSignal-to-Noise Ratio(4) Channel SeparationfS = 96kHz A-weightedfS =44.1kHz EIAJ A-weighted fS = 96kHz A-weightedfS = 44.1kHz fS = 9

11、6kHz9896103106103102101dB dB dB dB dBDYNAMIC PERFORMANCE(3) (16-Bit Data)THD+NVO = 0dBDynamic RangefS = 44.1kHz fS = 96kHzfS = 44.1kHz EIAJ A-weighted fS = 96kHz A-weighted94929897dB dB dB dBDC ACCURACYGain Error1.03.0% of FSRGain Mismatch: Channel-to-Channel1.03.0% of FSRBipolar Zero ErrorVO = 0.5V

12、CC at Bipolar Zero3060mVANALOG OUTPUTOutput Voltage Center Voltage Load ImpedanceFull Scale (0dB) AC Load50.62 VCC0.5 VCCVp-p VkWDIGITAL FILTER PERFORMANCEFilter Characteristics 1 (Sharp Roll-Off) Passband0.002dB3dB0.454fS0.490fSStopbandPassband Ripple Stopband AttenuationStop Band = 0.546fS Stop Ba

13、nd = 0.567fS0.546fS75820.002dB dB dBFilter Characteristics 2 (Slow Roll-Off) PassbandStopband Passband RippleStopband Attenuation Delay TimeDe-emphasis Error0.002dB3dBStopband = 0.732fS0.732fS8230/fS0.274fS0.454fS0.0020.1dB dB sec dBINTERNAL ANALOG FILTER3dB Bandwidth100kHzPassband Responsef = 20kHz

14、0.16dBPOWER SUPPLY REQUIREMENTSVoltage RangeSupply Current: ICC +IDD Power DissipationVDD, VCC fS = 44.1kHz fS = 96kHz fS = 44.1kHz fS = 96kHz4.5532451602255.545225VDCmA mA mW mWTEMPERATURE RANGEOperation25+85CStorage55+100CNOTES: (1) Refer section of system clock. (2) External buffer is recommended

15、. (3) Dynamic performance specs are tested with 20kHz low pass filter and THD+N specs are tested with 30kHz LPF, 400Hz HPF, Average Mode. (4) SNR is tested at internally infinity zero detection off.PCM171613LRCINML/IISDINMC/DM1BCKINMD/DM0CLKOMUTEXTIMODEXTOCS/IWODGNDRSTVDD VCC2RAGND2RZEROVCC2L AGND2L

16、EXTREXTLNCNCVOUTRVOUTLAGND1VCC1PIN CONFIGURATIONPCM1716E12822732642552462372282192010191118121713161415PACKAGE INFORMATIONPRODUCTPACKAGEPACKAGE DRAWING NUMBER(1)PCM1716E28-P SOP324NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Bo

17、ok.ABSOLUTE MAXIMUM RATINGSPIN ASSIGNMENTSPINNAMEI/ODESCRIPTION1LRCININLeft and Right Clock Input. This clock is equal tohe sampling rate - fS.(1)2DINerial Audio Data Input(1)3BCKININBit Clock Input for Serial Audio Data.(1)4CLKOOUTBuffered Output of Oscillator. Equivalent toSystem Clock.5XTIINOscil

18、lator Input (External Clock Input)6XTOOUTOscillator Output7DGNDDigital Ground8VDDDigital Power +5V9VCC2RAnalog Power +5V10AGND2RAnalog Ground11EXTROUTRch, Common Pin of Analog Output Amp12NCNo Connection13VOUTROUTRch, Analog Voltage Output of Audio Signal14AGND1Analog Ground15VCC1Analog Power +5V16V

19、OUTLOUTLch, Analog Voltage Output of Audio Signal17NCNo Connection18EXTLOUTLch, Common Pin of Analog Output Amp19AGND2LAnalog Ground20VCC2LAnalog Power +5V21ZEROOUTZero Data Flag22RSTINReset. When this pin is low, the DF andmodulators are held in reset.(2)23CS/IWOINChip Select/Input Format Selection

20、. When thispin is low, the Mode Control is effective.(3)24MODEINMode Control Select. (H: Software, L: Hardware)(2)25MUTEINMute Control26MD/DM0INMode Control, DATA/De-emphasis Selection 1(2)27MC/DM1INMode Control, BCK/De-emphasis Selection 2(2)28ML/I2SINMode Control, WDCK/Input Format Selection(2)NOT

21、ES: (1) P 1, 2, 3; Schmitt Trigger input. (2) P 22, 24, 25, 26, 27, 28; Schmitt Trigger input with pull-up resister. (3) Pin 23; Schmitt Trigger input with pull-down resister.ELECTROSTATIC DISCHARGE SENSITIVITYThis integrated circuit can be damaged by ESD. Burr-BrownPower Supply Voltage+6 5V+VCC to

22、+VDD Difference0.1VInput Logic Voltage0.3V to (VDD + 0.3V)Input Current (except power supply)10mAPower Dissipation400mWOperating Temperature Range25C to +85CStorage Temperature55C to +125CLead Temperature (soldering, 5s)+260Crecommends that all integrated circuits be handled with appropriate precaut

23、ions. Failure to observe proper handling and tallation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to

24、meet its published specifications.The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the us

25、ers own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems

26、.TYPICAL PERFORMANCE CURVESAll specifica ions at +25C, +VCC = +VDD = +5V, fS = 44.1kHz, and 24-bit input data, SYSCLK = 384fS, unless otherwise noted.88THD+N at F/S (dB)919497100103THD+N vs SAMPLING FREQUENCY (VCC = VDD = 5V, 24-Bit)256fs384fs3244.14896Sampling Frequency fS (kHz)10THD+N (%)10.10 010

27、0 0016050THD+N vs LEVEL (fS = 44.1kHz)24-Bit16-Bit403020100Amplitude (dB)203040THD+N (dB)5060708090100Dynamic Range (A-weighted) (dB)110108106104102100DYNAMIC RANGE vs SAMPLING FREQUENCY (VCC = VDD = 5V, 24-Bit)256/384fS3244.14896Sampling Frequency fS (kHz)110SNR (A-weighted) (dB)108106104102100SNR

28、vs SAMPLING FREQUENCY (VCC = VDD = 5V, 24-Bit)256/384fS3244.14896Sampling Frequency fS (kHz)607080Amplitude (dB)9010011012013014015060dB OUTPUT SPECTRUM(f = 1kHz, fS = 44.1kHz, 16-Bit Data)202468101214161820Frequency (Hz)607080Amplitude (dB)9010011012013014015060dB OUTPUT SPECTRUM(f = 1kHz, fS = 44.

29、1kHz, 24-Bit Data)202468101214161820Frequency (Hz)TYPICAL PERFORMANCE CURVES(CONT)020Amplitude (dB)406080100120140160OVERALL FREQUENCY CHARACTERISTIC(Sharp Roll-Off)00.511.522.533.54Frequency (x fS)0.0030.002Amplitude (dB)0.00100.0010.0020.003PASSBAND RIPPLE CHARACTERISTIC(Sharp Roll-Off)00

30、.40.5Frequency (x fS)020Amplitude (dB)406080100120OVERALL FREQUENCY CHARACTERISTIC(Slow Roll-Off)024Amplitude (dB)681012141618FREQUENCY CHARACTERISTIC(Slow Roll-Off)1402000.511 522.533 540Frequency (x fS)Frequency (x fS)0Level (dB)2468100Level (dB)2468100Level (dB)246810DE-EMPHASIS

31、 FREQUENCY RESPONSE (fS = 32kHz)02468101214Frequency (kHz)DE-EMPHASIS FREQUENCY RESPONSE (fS = 44.1kHz)02468101214161820Frequency (kHz)DE-EMPHASIS FREQUENCY RESPONSE (fS = 48kHz)0246810 12 14 16 18 20 22Frequency (kHz)0.5Level (dB)Level (dB)Level (dB)0.30

32、.5DE-EMPHASIS ERROR (fS = 32kHz)02468101214Frequency (kHz)DE-EMPHASIS ERROR (fS = 44.1kHz)02468101214161820Frequency (kHz)DE-EMPHASIS ERR0R (fS = 48kHz)0246810 12 14 16 18 20 22Frequency (kHz)PCM1716 are ming require- 2.0V 0.8V(pin 1) clock. LRCIN (left-right clock) operates at the sam- pling freque

33、ncy fS. In the event these clocks are not synchro- nized, PCM1716 can compensate for the phase difference internally. If the phase difference between left-right and system clocks is greater than 6-bit clocks (BCKIN), the synchronization is performed internally. While the synchro- nization is process

34、ing, the analog output is forced to a DC level at bipolar zero. The synchronization typically occurs in less than 1 cycle of LRCIN.Externl Clock Input4CLKOSystem Clock (256/384/5XTI 512/768fS)6XTOPCM1716Crystal Resonator Oscilla ionSystem Clock Buffer Out4CLKOBufferC15XTIC62XTALXTOPCM1716C1 C2 : 10p

35、F 30pFFIGURE 1. System Clock Connection.FIGURE 2. XTI Clock Timing.DATA INTERFACE FORMATSDigital audio data is interfaced to PCM1716 on p 1, 2, and 3, LRCIN (left-right clock), DIN (data input) and BCKIN (bit clock). PCM1716 can accept both standard, I2S, and left justified data formats.Figure 3 ill

36、ustrates acceptable input data formats. Figure 4 shows required timing specification for digital audio data.ResetPCM1716 has both internal power-on reset circuit and the RST pin (pin 22) which accepts an external forced reset by RST = LOW. For internal power on reset, initialize (reset) is done auto

37、matically at power on VDD 2.2V (typ). During internal reset = LOW, the output of the DAC is invalid and the analog outputs are forced to VCC /2. Figure 5 illustrates the timing of the internal power on reset.PCM1716 accepts an external forced reset when RST = L. When RST = L, the output of the DAC i

38、s invalid and the analog outputs are forced to VCC/2 after internal initialization (1024 system clocks count after RST = H.) Figure 6 illustrates the timing of the RST pin.Zero Out (pin 21)If the input data is continuously zero for 65536 cycles of BCK, an internal FET is switched to “ON”. The drain

39、of the internal FET is the zero-pin, it will enable “wired-or” with external circuit. This zero detect function is available in both software mode and hardware mode.SAMPLING RATE FREQUENCY (fS) - LRC384fS512fS768fS32kHz8.192012.288016.384024.576044.1kHz11.289616.934022.579233.8688(1)48kHz12.288018.4

40、32024.576036.8640(1)96kHz24.576036.8640(1)49.1520(1)YSTEM CLOCK FREQUENCY - MHzNOTE: (1) The Internal Crystal oscillator frequency cannot be larger han 24.576MHz.TABLE I. Typical System Clock Frequency.1/fSL_chLRCIN (pin 1)R_chBCKIN (pin 3)(1) 16-Bit Right JustifiedDIN (pin 2)14 15 1612314 15 161231

41、4 15 16(2) 20-Bit Right JustifiedMSBLSBMSBLSBDIN (pin 2)18 19 2012318 19 2012318 19 20(3) 24-Bit Right JustifiedMSBLSBMSBLSBDIN (pin 2)23 2412322 23 2412322 23 24(4) 24-Bit Left JustifiedMSBLSBMSBLSBDIN (pin 2)12322 23 2412322 23 24MSBLSBMSBLSB1/fSLRCIN (pin 1)L_chR_chBCKIN (pin 3)(5) 16-Bit I2SDIN

42、(pin 2)12314 15 1612314 15 1612(6) 24-Bit I2SMSBLSBMSBLSBDIN (pin 2)12322 23 2412322 23 2412MSBLSBMSBLSBFIGURE 3. Audio Data Input Formats.BCKIN Pulse Cycle Time: tBCY: tBCH: tBCL: tBL: tLB: tDS: tDH: 100ns (min)BCKIN Pulse Width High: 50ns (min)BCKIN Pulse Width Low: 50ns (min)BCKIN Rising Edge to

43、LRCIN Edge: 30ns (min)LRCIN Edge to BCKIN Rising Edge: 30ns (min)D et-up Time: 30ns (min)DIN Hold Time: 30ns (min)LRCKIN1.4VtBCHtBCLtLBBCKIN1.4VtBCYtBLDIN1.4VtDS tDHFIGURE 4. Audio Data Input Timing Specification.VCC = VDDResetReset RemovalInternal Reset1024 system (= XTI) clocksXTI ClockFIGURE 5. I

44、nternal Power-On Reset Timing.RSTtRST(1)ResetReset RemovalInternal Reset1024 system (XTI) clocksXTI ClockNOTE: (1) tRST = 20ns min.FIGURE 6. External Forced Reset Timing.FUNCTIONAL DESCRIPTIONPCM1716 has several built-in functions including digital attenuation, digital de-emphasis, input data format

45、 selection, and others. These functions are software controlled. PCM1716 can be operated in two different modes, software mode or hardware mode. Software mode is a three-wire interface using pin 28 (ML), 27 (MC), and 26 (MD).PCM1716 can also be operated in hardware mode, where static control signals are used on pin 28 (115, pin 27 (DM1), pin 26 (DM0) and pin 23 (IWO).This basic operation mode as software or hardware can be selected by pin 24 (MODE) as shown in Table II.MODE (pin 24) = HSoftware ModeMODE (pin 24) = LHardware ModeTABLE II.

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